4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
26 #include <sys/syscall.h>
27 #include <sys/resource.h>
30 #include "qemu-common.h"
31 #include "qemu/cache-utils.h"
34 #include "qemu/timer.h"
35 #include "qemu/envlist.h"
45 const char *cpu_model
;
46 unsigned long mmap_min_addr
;
47 #if defined(CONFIG_USE_GUEST_BASE)
48 unsigned long guest_base
;
50 #if (TARGET_LONG_BITS == 32) && (HOST_LONG_BITS == 64)
52 * When running 32-on-64 we should make sure we can fit all of the possible
53 * guest address space into a contiguous chunk of virtual host memory.
55 * This way we will never overlap with our own libraries or binaries or stack
56 * or anything else that QEMU maps.
59 /* MIPS only supports 31 bits of virtual address space for user space */
60 unsigned long reserved_va
= 0x77000000;
62 unsigned long reserved_va
= 0xf7000000;
65 unsigned long reserved_va
;
69 static void usage(void);
71 static const char *interp_prefix
= CONFIG_QEMU_INTERP_PREFIX
;
72 const char *qemu_uname_release
= CONFIG_UNAME_RELEASE
;
74 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
75 we allocate a bigger stack. Need a better solution, for example
76 by remapping the process stack directly at the right place */
77 unsigned long guest_stack_size
= 8 * 1024 * 1024UL;
79 void gemu_log(const char *fmt
, ...)
84 vfprintf(stderr
, fmt
, ap
);
88 #if defined(TARGET_I386)
89 int cpu_get_pic_interrupt(CPUX86State
*env
)
95 /***********************************************************/
96 /* Helper routines for implementing atomic operations. */
98 /* To implement exclusive operations we force all cpus to syncronise.
99 We don't require a full sync, only that no cpus are executing guest code.
100 The alternative is to map target atomic ops onto host equivalents,
101 which requires quite a lot of per host/target work. */
102 static pthread_mutex_t cpu_list_mutex
= PTHREAD_MUTEX_INITIALIZER
;
103 static pthread_mutex_t exclusive_lock
= PTHREAD_MUTEX_INITIALIZER
;
104 static pthread_cond_t exclusive_cond
= PTHREAD_COND_INITIALIZER
;
105 static pthread_cond_t exclusive_resume
= PTHREAD_COND_INITIALIZER
;
106 static int pending_cpus
;
108 /* Make sure everything is in a consistent state for calling fork(). */
109 void fork_start(void)
111 pthread_mutex_lock(&tcg_ctx
.tb_ctx
.tb_lock
);
112 pthread_mutex_lock(&exclusive_lock
);
116 void fork_end(int child
)
118 mmap_fork_end(child
);
120 /* Child processes created by fork() only have a single thread.
121 Discard information about the parent threads. */
122 first_cpu
= thread_cpu
;
123 first_cpu
->next_cpu
= NULL
;
125 pthread_mutex_init(&exclusive_lock
, NULL
);
126 pthread_mutex_init(&cpu_list_mutex
, NULL
);
127 pthread_cond_init(&exclusive_cond
, NULL
);
128 pthread_cond_init(&exclusive_resume
, NULL
);
129 pthread_mutex_init(&tcg_ctx
.tb_ctx
.tb_lock
, NULL
);
130 gdbserver_fork((CPUArchState
*)thread_cpu
->env_ptr
);
132 pthread_mutex_unlock(&exclusive_lock
);
133 pthread_mutex_unlock(&tcg_ctx
.tb_ctx
.tb_lock
);
137 /* Wait for pending exclusive operations to complete. The exclusive lock
139 static inline void exclusive_idle(void)
141 while (pending_cpus
) {
142 pthread_cond_wait(&exclusive_resume
, &exclusive_lock
);
146 /* Start an exclusive operation.
147 Must only be called from outside cpu_arm_exec. */
148 static inline void start_exclusive(void)
152 pthread_mutex_lock(&exclusive_lock
);
156 /* Make all other cpus stop executing. */
157 for (other_cpu
= first_cpu
; other_cpu
; other_cpu
= other_cpu
->next_cpu
) {
158 if (other_cpu
->running
) {
163 if (pending_cpus
> 1) {
164 pthread_cond_wait(&exclusive_cond
, &exclusive_lock
);
168 /* Finish an exclusive operation. */
169 static inline void end_exclusive(void)
172 pthread_cond_broadcast(&exclusive_resume
);
173 pthread_mutex_unlock(&exclusive_lock
);
176 /* Wait for exclusive ops to finish, and begin cpu execution. */
177 static inline void cpu_exec_start(CPUState
*cpu
)
179 pthread_mutex_lock(&exclusive_lock
);
182 pthread_mutex_unlock(&exclusive_lock
);
185 /* Mark cpu as not executing, and release pending exclusive ops. */
186 static inline void cpu_exec_end(CPUState
*cpu
)
188 pthread_mutex_lock(&exclusive_lock
);
189 cpu
->running
= false;
190 if (pending_cpus
> 1) {
192 if (pending_cpus
== 1) {
193 pthread_cond_signal(&exclusive_cond
);
197 pthread_mutex_unlock(&exclusive_lock
);
200 void cpu_list_lock(void)
202 pthread_mutex_lock(&cpu_list_mutex
);
205 void cpu_list_unlock(void)
207 pthread_mutex_unlock(&cpu_list_mutex
);
212 /***********************************************************/
213 /* CPUX86 core interface */
215 void cpu_smm_update(CPUX86State
*env
)
219 uint64_t cpu_get_tsc(CPUX86State
*env
)
221 return cpu_get_real_ticks();
224 static void write_dt(void *ptr
, unsigned long addr
, unsigned long limit
,
229 e1
= (addr
<< 16) | (limit
& 0xffff);
230 e2
= ((addr
>> 16) & 0xff) | (addr
& 0xff000000) | (limit
& 0x000f0000);
237 static uint64_t *idt_table
;
239 static void set_gate64(void *ptr
, unsigned int type
, unsigned int dpl
,
240 uint64_t addr
, unsigned int sel
)
243 e1
= (addr
& 0xffff) | (sel
<< 16);
244 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
248 p
[2] = tswap32(addr
>> 32);
251 /* only dpl matters as we do only user space emulation */
252 static void set_idt(int n
, unsigned int dpl
)
254 set_gate64(idt_table
+ n
* 2, 0, dpl
, 0, 0);
257 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
258 uint32_t addr
, unsigned int sel
)
261 e1
= (addr
& 0xffff) | (sel
<< 16);
262 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
268 /* only dpl matters as we do only user space emulation */
269 static void set_idt(int n
, unsigned int dpl
)
271 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
275 void cpu_loop(CPUX86State
*env
)
279 target_siginfo_t info
;
282 trapnr
= cpu_x86_exec(env
);
285 /* linux syscall from int $0x80 */
286 env
->regs
[R_EAX
] = do_syscall(env
,
298 /* linux syscall from syscall instruction */
299 env
->regs
[R_EAX
] = do_syscall(env
,
308 env
->eip
= env
->exception_next_eip
;
313 info
.si_signo
= SIGBUS
;
315 info
.si_code
= TARGET_SI_KERNEL
;
316 info
._sifields
._sigfault
._addr
= 0;
317 queue_signal(env
, info
.si_signo
, &info
);
320 /* XXX: potential problem if ABI32 */
321 #ifndef TARGET_X86_64
322 if (env
->eflags
& VM_MASK
) {
323 handle_vm86_fault(env
);
327 info
.si_signo
= SIGSEGV
;
329 info
.si_code
= TARGET_SI_KERNEL
;
330 info
._sifields
._sigfault
._addr
= 0;
331 queue_signal(env
, info
.si_signo
, &info
);
335 info
.si_signo
= SIGSEGV
;
337 if (!(env
->error_code
& 1))
338 info
.si_code
= TARGET_SEGV_MAPERR
;
340 info
.si_code
= TARGET_SEGV_ACCERR
;
341 info
._sifields
._sigfault
._addr
= env
->cr
[2];
342 queue_signal(env
, info
.si_signo
, &info
);
345 #ifndef TARGET_X86_64
346 if (env
->eflags
& VM_MASK
) {
347 handle_vm86_trap(env
, trapnr
);
351 /* division by zero */
352 info
.si_signo
= SIGFPE
;
354 info
.si_code
= TARGET_FPE_INTDIV
;
355 info
._sifields
._sigfault
._addr
= env
->eip
;
356 queue_signal(env
, info
.si_signo
, &info
);
361 #ifndef TARGET_X86_64
362 if (env
->eflags
& VM_MASK
) {
363 handle_vm86_trap(env
, trapnr
);
367 info
.si_signo
= SIGTRAP
;
369 if (trapnr
== EXCP01_DB
) {
370 info
.si_code
= TARGET_TRAP_BRKPT
;
371 info
._sifields
._sigfault
._addr
= env
->eip
;
373 info
.si_code
= TARGET_SI_KERNEL
;
374 info
._sifields
._sigfault
._addr
= 0;
376 queue_signal(env
, info
.si_signo
, &info
);
381 #ifndef TARGET_X86_64
382 if (env
->eflags
& VM_MASK
) {
383 handle_vm86_trap(env
, trapnr
);
387 info
.si_signo
= SIGSEGV
;
389 info
.si_code
= TARGET_SI_KERNEL
;
390 info
._sifields
._sigfault
._addr
= 0;
391 queue_signal(env
, info
.si_signo
, &info
);
395 info
.si_signo
= SIGILL
;
397 info
.si_code
= TARGET_ILL_ILLOPN
;
398 info
._sifields
._sigfault
._addr
= env
->eip
;
399 queue_signal(env
, info
.si_signo
, &info
);
402 /* just indicate that signals should be handled asap */
408 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
413 info
.si_code
= TARGET_TRAP_BRKPT
;
414 queue_signal(env
, info
.si_signo
, &info
);
419 pc
= env
->segs
[R_CS
].base
+ env
->eip
;
420 fprintf(stderr
, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
424 process_pending_signals(env
);
431 #define get_user_code_u32(x, gaddr, doswap) \
432 ({ abi_long __r = get_user_u32((x), (gaddr)); \
433 if (!__r && (doswap)) { \
439 #define get_user_code_u16(x, gaddr, doswap) \
440 ({ abi_long __r = get_user_u16((x), (gaddr)); \
441 if (!__r && (doswap)) { \
448 * See the Linux kernel's Documentation/arm/kernel_user_helpers.txt
450 * r0 = pointer to oldval
451 * r1 = pointer to newval
452 * r2 = pointer to target value
455 * r0 = 0 if *ptr was changed, non-0 if no exchange happened
456 * C set if *ptr was changed, clear if no exchange happened
458 * Note segv's in kernel helpers are a bit tricky, we can set the
459 * data address sensibly but the PC address is just the entry point.
461 static void arm_kernel_cmpxchg64_helper(CPUARMState
*env
)
463 uint64_t oldval
, newval
, val
;
465 target_siginfo_t info
;
467 /* Based on the 32 bit code in do_kernel_trap */
469 /* XXX: This only works between threads, not between processes.
470 It's probably possible to implement this with native host
471 operations. However things like ldrex/strex are much harder so
472 there's not much point trying. */
474 cpsr
= cpsr_read(env
);
477 if (get_user_u64(oldval
, env
->regs
[0])) {
478 env
->cp15
.c6_data
= env
->regs
[0];
482 if (get_user_u64(newval
, env
->regs
[1])) {
483 env
->cp15
.c6_data
= env
->regs
[1];
487 if (get_user_u64(val
, addr
)) {
488 env
->cp15
.c6_data
= addr
;
495 if (put_user_u64(val
, addr
)) {
496 env
->cp15
.c6_data
= addr
;
506 cpsr_write(env
, cpsr
, CPSR_C
);
512 /* We get the PC of the entry address - which is as good as anything,
513 on a real kernel what you get depends on which mode it uses. */
514 info
.si_signo
= SIGSEGV
;
516 /* XXX: check env->error_code */
517 info
.si_code
= TARGET_SEGV_MAPERR
;
518 info
._sifields
._sigfault
._addr
= env
->cp15
.c6_data
;
519 queue_signal(env
, info
.si_signo
, &info
);
524 /* Handle a jump to the kernel code page. */
526 do_kernel_trap(CPUARMState
*env
)
532 switch (env
->regs
[15]) {
533 case 0xffff0fa0: /* __kernel_memory_barrier */
534 /* ??? No-op. Will need to do better for SMP. */
536 case 0xffff0fc0: /* __kernel_cmpxchg */
537 /* XXX: This only works between threads, not between processes.
538 It's probably possible to implement this with native host
539 operations. However things like ldrex/strex are much harder so
540 there's not much point trying. */
542 cpsr
= cpsr_read(env
);
544 /* FIXME: This should SEGV if the access fails. */
545 if (get_user_u32(val
, addr
))
547 if (val
== env
->regs
[0]) {
549 /* FIXME: Check for segfaults. */
550 put_user_u32(val
, addr
);
557 cpsr_write(env
, cpsr
, CPSR_C
);
560 case 0xffff0fe0: /* __kernel_get_tls */
561 env
->regs
[0] = env
->cp15
.c13_tls2
;
563 case 0xffff0f60: /* __kernel_cmpxchg64 */
564 arm_kernel_cmpxchg64_helper(env
);
570 /* Jump back to the caller. */
571 addr
= env
->regs
[14];
576 env
->regs
[15] = addr
;
581 static int do_strex(CPUARMState
*env
)
589 addr
= env
->exclusive_addr
;
590 if (addr
!= env
->exclusive_test
) {
593 size
= env
->exclusive_info
& 0xf;
596 segv
= get_user_u8(val
, addr
);
599 segv
= get_user_u16(val
, addr
);
603 segv
= get_user_u32(val
, addr
);
609 env
->cp15
.c6_data
= addr
;
612 if (val
!= env
->exclusive_val
) {
616 segv
= get_user_u32(val
, addr
+ 4);
618 env
->cp15
.c6_data
= addr
+ 4;
621 if (val
!= env
->exclusive_high
) {
625 val
= env
->regs
[(env
->exclusive_info
>> 8) & 0xf];
628 segv
= put_user_u8(val
, addr
);
631 segv
= put_user_u16(val
, addr
);
635 segv
= put_user_u32(val
, addr
);
639 env
->cp15
.c6_data
= addr
;
643 val
= env
->regs
[(env
->exclusive_info
>> 12) & 0xf];
644 segv
= put_user_u32(val
, addr
+ 4);
646 env
->cp15
.c6_data
= addr
+ 4;
653 env
->regs
[(env
->exclusive_info
>> 4) & 0xf] = rc
;
659 void cpu_loop(CPUARMState
*env
)
661 CPUState
*cs
= CPU(arm_env_get_cpu(env
));
663 unsigned int n
, insn
;
664 target_siginfo_t info
;
669 trapnr
= cpu_arm_exec(env
);
674 TaskState
*ts
= env
->opaque
;
678 /* we handle the FPU emulation here, as Linux */
679 /* we get the opcode */
680 /* FIXME - what to do if get_user() fails? */
681 get_user_code_u32(opcode
, env
->regs
[15], env
->bswap_code
);
683 rc
= EmulateAll(opcode
, &ts
->fpa
, env
);
684 if (rc
== 0) { /* illegal instruction */
685 info
.si_signo
= SIGILL
;
687 info
.si_code
= TARGET_ILL_ILLOPN
;
688 info
._sifields
._sigfault
._addr
= env
->regs
[15];
689 queue_signal(env
, info
.si_signo
, &info
);
690 } else if (rc
< 0) { /* FP exception */
693 /* translate softfloat flags to FPSR flags */
694 if (-rc
& float_flag_invalid
)
696 if (-rc
& float_flag_divbyzero
)
698 if (-rc
& float_flag_overflow
)
700 if (-rc
& float_flag_underflow
)
702 if (-rc
& float_flag_inexact
)
705 FPSR fpsr
= ts
->fpa
.fpsr
;
706 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
708 if (fpsr
& (arm_fpe
<< 16)) { /* exception enabled? */
709 info
.si_signo
= SIGFPE
;
712 /* ordered by priority, least first */
713 if (arm_fpe
& BIT_IXC
) info
.si_code
= TARGET_FPE_FLTRES
;
714 if (arm_fpe
& BIT_UFC
) info
.si_code
= TARGET_FPE_FLTUND
;
715 if (arm_fpe
& BIT_OFC
) info
.si_code
= TARGET_FPE_FLTOVF
;
716 if (arm_fpe
& BIT_DZC
) info
.si_code
= TARGET_FPE_FLTDIV
;
717 if (arm_fpe
& BIT_IOC
) info
.si_code
= TARGET_FPE_FLTINV
;
719 info
._sifields
._sigfault
._addr
= env
->regs
[15];
720 queue_signal(env
, info
.si_signo
, &info
);
725 /* accumulate unenabled exceptions */
726 if ((!(fpsr
& BIT_IXE
)) && (arm_fpe
& BIT_IXC
))
728 if ((!(fpsr
& BIT_UFE
)) && (arm_fpe
& BIT_UFC
))
730 if ((!(fpsr
& BIT_OFE
)) && (arm_fpe
& BIT_OFC
))
732 if ((!(fpsr
& BIT_DZE
)) && (arm_fpe
& BIT_DZC
))
734 if ((!(fpsr
& BIT_IOE
)) && (arm_fpe
& BIT_IOC
))
737 } else { /* everything OK */
748 if (trapnr
== EXCP_BKPT
) {
750 /* FIXME - what to do if get_user() fails? */
751 get_user_code_u16(insn
, env
->regs
[15], env
->bswap_code
);
755 /* FIXME - what to do if get_user() fails? */
756 get_user_code_u32(insn
, env
->regs
[15], env
->bswap_code
);
757 n
= (insn
& 0xf) | ((insn
>> 4) & 0xff0);
762 /* FIXME - what to do if get_user() fails? */
763 get_user_code_u16(insn
, env
->regs
[15] - 2,
767 /* FIXME - what to do if get_user() fails? */
768 get_user_code_u32(insn
, env
->regs
[15] - 4,
774 if (n
== ARM_NR_cacheflush
) {
776 } else if (n
== ARM_NR_semihosting
777 || n
== ARM_NR_thumb_semihosting
) {
778 env
->regs
[0] = do_arm_semihosting (env
);
779 } else if (n
== 0 || n
>= ARM_SYSCALL_BASE
|| env
->thumb
) {
781 if (env
->thumb
|| n
== 0) {
784 n
-= ARM_SYSCALL_BASE
;
787 if ( n
> ARM_NR_BASE
) {
789 case ARM_NR_cacheflush
:
793 cpu_set_tls(env
, env
->regs
[0]);
797 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
799 env
->regs
[0] = -TARGET_ENOSYS
;
803 env
->regs
[0] = do_syscall(env
,
819 /* just indicate that signals should be handled asap */
821 case EXCP_PREFETCH_ABORT
:
822 addr
= env
->cp15
.c6_insn
;
824 case EXCP_DATA_ABORT
:
825 addr
= env
->cp15
.c6_data
;
828 info
.si_signo
= SIGSEGV
;
830 /* XXX: check env->error_code */
831 info
.si_code
= TARGET_SEGV_MAPERR
;
832 info
._sifields
._sigfault
._addr
= addr
;
833 queue_signal(env
, info
.si_signo
, &info
);
840 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
845 info
.si_code
= TARGET_TRAP_BRKPT
;
846 queue_signal(env
, info
.si_signo
, &info
);
850 case EXCP_KERNEL_TRAP
:
851 if (do_kernel_trap(env
))
856 addr
= env
->cp15
.c6_data
;
862 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
864 cpu_dump_state(cs
, stderr
, fprintf
, 0);
867 process_pending_signals(env
);
873 #ifdef TARGET_UNICORE32
875 void cpu_loop(CPUUniCore32State
*env
)
877 CPUState
*cs
= CPU(uc32_env_get_cpu(env
));
879 unsigned int n
, insn
;
880 target_siginfo_t info
;
884 trapnr
= uc32_cpu_exec(env
);
890 get_user_u32(insn
, env
->regs
[31] - 4);
893 if (n
>= UC32_SYSCALL_BASE
) {
895 n
-= UC32_SYSCALL_BASE
;
896 if (n
== UC32_SYSCALL_NR_set_tls
) {
897 cpu_set_tls(env
, env
->regs
[0]);
900 env
->regs
[0] = do_syscall(env
,
915 case UC32_EXCP_DTRAP
:
916 case UC32_EXCP_ITRAP
:
917 info
.si_signo
= SIGSEGV
;
919 /* XXX: check env->error_code */
920 info
.si_code
= TARGET_SEGV_MAPERR
;
921 info
._sifields
._sigfault
._addr
= env
->cp0
.c4_faultaddr
;
922 queue_signal(env
, info
.si_signo
, &info
);
925 /* just indicate that signals should be handled asap */
931 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
935 info
.si_code
= TARGET_TRAP_BRKPT
;
936 queue_signal(env
, info
.si_signo
, &info
);
943 process_pending_signals(env
);
947 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr
);
948 cpu_dump_state(cs
, stderr
, fprintf
, 0);
954 #define SPARC64_STACK_BIAS 2047
958 /* WARNING: dealing with register windows _is_ complicated. More info
959 can be found at http://www.sics.se/~psm/sparcstack.html */
960 static inline int get_reg_index(CPUSPARCState
*env
, int cwp
, int index
)
962 index
= (index
+ cwp
* 16) % (16 * env
->nwindows
);
963 /* wrap handling : if cwp is on the last window, then we use the
964 registers 'after' the end */
965 if (index
< 8 && env
->cwp
== env
->nwindows
- 1)
966 index
+= 16 * env
->nwindows
;
970 /* save the register window 'cwp1' */
971 static inline void save_window_offset(CPUSPARCState
*env
, int cwp1
)
976 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
977 #ifdef TARGET_SPARC64
979 sp_ptr
+= SPARC64_STACK_BIAS
;
981 #if defined(DEBUG_WIN)
982 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" save_cwp=%d\n",
985 for(i
= 0; i
< 16; i
++) {
986 /* FIXME - what to do if put_user() fails? */
987 put_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
988 sp_ptr
+= sizeof(abi_ulong
);
992 static void save_window(CPUSPARCState
*env
)
994 #ifndef TARGET_SPARC64
995 unsigned int new_wim
;
996 new_wim
= ((env
->wim
>> 1) | (env
->wim
<< (env
->nwindows
- 1))) &
997 ((1LL << env
->nwindows
) - 1);
998 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1001 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
1007 static void restore_window(CPUSPARCState
*env
)
1009 #ifndef TARGET_SPARC64
1010 unsigned int new_wim
;
1012 unsigned int i
, cwp1
;
1015 #ifndef TARGET_SPARC64
1016 new_wim
= ((env
->wim
<< 1) | (env
->wim
>> (env
->nwindows
- 1))) &
1017 ((1LL << env
->nwindows
) - 1);
1020 /* restore the invalid window */
1021 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1022 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
1023 #ifdef TARGET_SPARC64
1025 sp_ptr
+= SPARC64_STACK_BIAS
;
1027 #if defined(DEBUG_WIN)
1028 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" load_cwp=%d\n",
1031 for(i
= 0; i
< 16; i
++) {
1032 /* FIXME - what to do if get_user() fails? */
1033 get_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
1034 sp_ptr
+= sizeof(abi_ulong
);
1036 #ifdef TARGET_SPARC64
1038 if (env
->cleanwin
< env
->nwindows
- 1)
1046 static void flush_windows(CPUSPARCState
*env
)
1052 /* if restore would invoke restore_window(), then we can stop */
1053 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ offset
);
1054 #ifndef TARGET_SPARC64
1055 if (env
->wim
& (1 << cwp1
))
1058 if (env
->canrestore
== 0)
1063 save_window_offset(env
, cwp1
);
1066 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
1067 #ifndef TARGET_SPARC64
1068 /* set wim so that restore will reload the registers */
1069 env
->wim
= 1 << cwp1
;
1071 #if defined(DEBUG_WIN)
1072 printf("flush_windows: nb=%d\n", offset
- 1);
1076 void cpu_loop (CPUSPARCState
*env
)
1078 CPUState
*cs
= CPU(sparc_env_get_cpu(env
));
1081 target_siginfo_t info
;
1084 trapnr
= cpu_sparc_exec (env
);
1086 /* Compute PSR before exposing state. */
1087 if (env
->cc_op
!= CC_OP_FLAGS
) {
1092 #ifndef TARGET_SPARC64
1099 ret
= do_syscall (env
, env
->gregs
[1],
1100 env
->regwptr
[0], env
->regwptr
[1],
1101 env
->regwptr
[2], env
->regwptr
[3],
1102 env
->regwptr
[4], env
->regwptr
[5],
1104 if ((abi_ulong
)ret
>= (abi_ulong
)(-515)) {
1105 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1106 env
->xcc
|= PSR_CARRY
;
1108 env
->psr
|= PSR_CARRY
;
1112 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1113 env
->xcc
&= ~PSR_CARRY
;
1115 env
->psr
&= ~PSR_CARRY
;
1118 env
->regwptr
[0] = ret
;
1119 /* next instruction */
1121 env
->npc
= env
->npc
+ 4;
1123 case 0x83: /* flush windows */
1128 /* next instruction */
1130 env
->npc
= env
->npc
+ 4;
1132 #ifndef TARGET_SPARC64
1133 case TT_WIN_OVF
: /* window overflow */
1136 case TT_WIN_UNF
: /* window underflow */
1137 restore_window(env
);
1142 info
.si_signo
= TARGET_SIGSEGV
;
1144 /* XXX: check env->error_code */
1145 info
.si_code
= TARGET_SEGV_MAPERR
;
1146 info
._sifields
._sigfault
._addr
= env
->mmuregs
[4];
1147 queue_signal(env
, info
.si_signo
, &info
);
1151 case TT_SPILL
: /* window overflow */
1154 case TT_FILL
: /* window underflow */
1155 restore_window(env
);
1160 info
.si_signo
= TARGET_SIGSEGV
;
1162 /* XXX: check env->error_code */
1163 info
.si_code
= TARGET_SEGV_MAPERR
;
1164 if (trapnr
== TT_DFAULT
)
1165 info
._sifields
._sigfault
._addr
= env
->dmmuregs
[4];
1167 info
._sifields
._sigfault
._addr
= cpu_tsptr(env
)->tpc
;
1168 queue_signal(env
, info
.si_signo
, &info
);
1171 #ifndef TARGET_ABI32
1174 sparc64_get_context(env
);
1178 sparc64_set_context(env
);
1182 case EXCP_INTERRUPT
:
1183 /* just indicate that signals should be handled asap */
1187 info
.si_signo
= TARGET_SIGILL
;
1189 info
.si_code
= TARGET_ILL_ILLOPC
;
1190 info
._sifields
._sigfault
._addr
= env
->pc
;
1191 queue_signal(env
, info
.si_signo
, &info
);
1198 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
1201 info
.si_signo
= sig
;
1203 info
.si_code
= TARGET_TRAP_BRKPT
;
1204 queue_signal(env
, info
.si_signo
, &info
);
1209 printf ("Unhandled trap: 0x%x\n", trapnr
);
1210 cpu_dump_state(cs
, stderr
, fprintf
, 0);
1213 process_pending_signals (env
);
1220 static inline uint64_t cpu_ppc_get_tb(CPUPPCState
*env
)
1226 uint64_t cpu_ppc_load_tbl(CPUPPCState
*env
)
1228 return cpu_ppc_get_tb(env
);
1231 uint32_t cpu_ppc_load_tbu(CPUPPCState
*env
)
1233 return cpu_ppc_get_tb(env
) >> 32;
1236 uint64_t cpu_ppc_load_atbl(CPUPPCState
*env
)
1238 return cpu_ppc_get_tb(env
);
1241 uint32_t cpu_ppc_load_atbu(CPUPPCState
*env
)
1243 return cpu_ppc_get_tb(env
) >> 32;
1246 uint32_t cpu_ppc601_load_rtcu(CPUPPCState
*env
)
1247 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1249 uint32_t cpu_ppc601_load_rtcl(CPUPPCState
*env
)
1251 return cpu_ppc_load_tbl(env
) & 0x3FFFFF80;
1254 /* XXX: to be fixed */
1255 int ppc_dcr_read (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t *valp
)
1260 int ppc_dcr_write (ppc_dcr_t
*dcr_env
, int dcrn
, uint32_t val
)
1265 #define EXCP_DUMP(env, fmt, ...) \
1267 CPUState *cs = ENV_GET_CPU(env); \
1268 fprintf(stderr, fmt , ## __VA_ARGS__); \
1269 cpu_dump_state(cs, stderr, fprintf, 0); \
1270 qemu_log(fmt, ## __VA_ARGS__); \
1271 if (qemu_log_enabled()) { \
1272 log_cpu_state(cs, 0); \
1276 static int do_store_exclusive(CPUPPCState
*env
)
1279 target_ulong page_addr
;
1284 addr
= env
->reserve_ea
;
1285 page_addr
= addr
& TARGET_PAGE_MASK
;
1288 flags
= page_get_flags(page_addr
);
1289 if ((flags
& PAGE_READ
) == 0) {
1292 int reg
= env
->reserve_info
& 0x1f;
1293 int size
= (env
->reserve_info
>> 5) & 0xf;
1296 if (addr
== env
->reserve_addr
) {
1298 case 1: segv
= get_user_u8(val
, addr
); break;
1299 case 2: segv
= get_user_u16(val
, addr
); break;
1300 case 4: segv
= get_user_u32(val
, addr
); break;
1301 #if defined(TARGET_PPC64)
1302 case 8: segv
= get_user_u64(val
, addr
); break;
1306 if (!segv
&& val
== env
->reserve_val
) {
1307 val
= env
->gpr
[reg
];
1309 case 1: segv
= put_user_u8(val
, addr
); break;
1310 case 2: segv
= put_user_u16(val
, addr
); break;
1311 case 4: segv
= put_user_u32(val
, addr
); break;
1312 #if defined(TARGET_PPC64)
1313 case 8: segv
= put_user_u64(val
, addr
); break;
1322 env
->crf
[0] = (stored
<< 1) | xer_so
;
1323 env
->reserve_addr
= (target_ulong
)-1;
1333 void cpu_loop(CPUPPCState
*env
)
1335 CPUState
*cs
= CPU(ppc_env_get_cpu(env
));
1336 target_siginfo_t info
;
1342 trapnr
= cpu_ppc_exec(env
);
1345 case POWERPC_EXCP_NONE
:
1348 case POWERPC_EXCP_CRITICAL
: /* Critical input */
1349 cpu_abort(env
, "Critical interrupt while in user mode. "
1352 case POWERPC_EXCP_MCHECK
: /* Machine check exception */
1353 cpu_abort(env
, "Machine check exception while in user mode. "
1356 case POWERPC_EXCP_DSI
: /* Data storage exception */
1357 EXCP_DUMP(env
, "Invalid data memory access: 0x" TARGET_FMT_lx
"\n",
1359 /* XXX: check this. Seems bugged */
1360 switch (env
->error_code
& 0xFF000000) {
1362 info
.si_signo
= TARGET_SIGSEGV
;
1364 info
.si_code
= TARGET_SEGV_MAPERR
;
1367 info
.si_signo
= TARGET_SIGILL
;
1369 info
.si_code
= TARGET_ILL_ILLADR
;
1372 info
.si_signo
= TARGET_SIGSEGV
;
1374 info
.si_code
= TARGET_SEGV_ACCERR
;
1377 /* Let's send a regular segfault... */
1378 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1380 info
.si_signo
= TARGET_SIGSEGV
;
1382 info
.si_code
= TARGET_SEGV_MAPERR
;
1385 info
._sifields
._sigfault
._addr
= env
->nip
;
1386 queue_signal(env
, info
.si_signo
, &info
);
1388 case POWERPC_EXCP_ISI
: /* Instruction storage exception */
1389 EXCP_DUMP(env
, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1390 "\n", env
->spr
[SPR_SRR0
]);
1391 /* XXX: check this */
1392 switch (env
->error_code
& 0xFF000000) {
1394 info
.si_signo
= TARGET_SIGSEGV
;
1396 info
.si_code
= TARGET_SEGV_MAPERR
;
1400 info
.si_signo
= TARGET_SIGSEGV
;
1402 info
.si_code
= TARGET_SEGV_ACCERR
;
1405 /* Let's send a regular segfault... */
1406 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1408 info
.si_signo
= TARGET_SIGSEGV
;
1410 info
.si_code
= TARGET_SEGV_MAPERR
;
1413 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1414 queue_signal(env
, info
.si_signo
, &info
);
1416 case POWERPC_EXCP_EXTERNAL
: /* External input */
1417 cpu_abort(env
, "External interrupt while in user mode. "
1420 case POWERPC_EXCP_ALIGN
: /* Alignment exception */
1421 EXCP_DUMP(env
, "Unaligned memory access\n");
1422 /* XXX: check this */
1423 info
.si_signo
= TARGET_SIGBUS
;
1425 info
.si_code
= TARGET_BUS_ADRALN
;
1426 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1427 queue_signal(env
, info
.si_signo
, &info
);
1429 case POWERPC_EXCP_PROGRAM
: /* Program exception */
1430 /* XXX: check this */
1431 switch (env
->error_code
& ~0xF) {
1432 case POWERPC_EXCP_FP
:
1433 EXCP_DUMP(env
, "Floating point program exception\n");
1434 info
.si_signo
= TARGET_SIGFPE
;
1436 switch (env
->error_code
& 0xF) {
1437 case POWERPC_EXCP_FP_OX
:
1438 info
.si_code
= TARGET_FPE_FLTOVF
;
1440 case POWERPC_EXCP_FP_UX
:
1441 info
.si_code
= TARGET_FPE_FLTUND
;
1443 case POWERPC_EXCP_FP_ZX
:
1444 case POWERPC_EXCP_FP_VXZDZ
:
1445 info
.si_code
= TARGET_FPE_FLTDIV
;
1447 case POWERPC_EXCP_FP_XX
:
1448 info
.si_code
= TARGET_FPE_FLTRES
;
1450 case POWERPC_EXCP_FP_VXSOFT
:
1451 info
.si_code
= TARGET_FPE_FLTINV
;
1453 case POWERPC_EXCP_FP_VXSNAN
:
1454 case POWERPC_EXCP_FP_VXISI
:
1455 case POWERPC_EXCP_FP_VXIDI
:
1456 case POWERPC_EXCP_FP_VXIMZ
:
1457 case POWERPC_EXCP_FP_VXVC
:
1458 case POWERPC_EXCP_FP_VXSQRT
:
1459 case POWERPC_EXCP_FP_VXCVI
:
1460 info
.si_code
= TARGET_FPE_FLTSUB
;
1463 EXCP_DUMP(env
, "Unknown floating point exception (%02x)\n",
1468 case POWERPC_EXCP_INVAL
:
1469 EXCP_DUMP(env
, "Invalid instruction\n");
1470 info
.si_signo
= TARGET_SIGILL
;
1472 switch (env
->error_code
& 0xF) {
1473 case POWERPC_EXCP_INVAL_INVAL
:
1474 info
.si_code
= TARGET_ILL_ILLOPC
;
1476 case POWERPC_EXCP_INVAL_LSWX
:
1477 info
.si_code
= TARGET_ILL_ILLOPN
;
1479 case POWERPC_EXCP_INVAL_SPR
:
1480 info
.si_code
= TARGET_ILL_PRVREG
;
1482 case POWERPC_EXCP_INVAL_FP
:
1483 info
.si_code
= TARGET_ILL_COPROC
;
1486 EXCP_DUMP(env
, "Unknown invalid operation (%02x)\n",
1487 env
->error_code
& 0xF);
1488 info
.si_code
= TARGET_ILL_ILLADR
;
1492 case POWERPC_EXCP_PRIV
:
1493 EXCP_DUMP(env
, "Privilege violation\n");
1494 info
.si_signo
= TARGET_SIGILL
;
1496 switch (env
->error_code
& 0xF) {
1497 case POWERPC_EXCP_PRIV_OPC
:
1498 info
.si_code
= TARGET_ILL_PRVOPC
;
1500 case POWERPC_EXCP_PRIV_REG
:
1501 info
.si_code
= TARGET_ILL_PRVREG
;
1504 EXCP_DUMP(env
, "Unknown privilege violation (%02x)\n",
1505 env
->error_code
& 0xF);
1506 info
.si_code
= TARGET_ILL_PRVOPC
;
1510 case POWERPC_EXCP_TRAP
:
1511 cpu_abort(env
, "Tried to call a TRAP\n");
1514 /* Should not happen ! */
1515 cpu_abort(env
, "Unknown program exception (%02x)\n",
1519 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1520 queue_signal(env
, info
.si_signo
, &info
);
1522 case POWERPC_EXCP_FPU
: /* Floating-point unavailable exception */
1523 EXCP_DUMP(env
, "No floating point allowed\n");
1524 info
.si_signo
= TARGET_SIGILL
;
1526 info
.si_code
= TARGET_ILL_COPROC
;
1527 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1528 queue_signal(env
, info
.si_signo
, &info
);
1530 case POWERPC_EXCP_SYSCALL
: /* System call exception */
1531 cpu_abort(env
, "Syscall exception while in user mode. "
1534 case POWERPC_EXCP_APU
: /* Auxiliary processor unavailable */
1535 EXCP_DUMP(env
, "No APU instruction allowed\n");
1536 info
.si_signo
= TARGET_SIGILL
;
1538 info
.si_code
= TARGET_ILL_COPROC
;
1539 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1540 queue_signal(env
, info
.si_signo
, &info
);
1542 case POWERPC_EXCP_DECR
: /* Decrementer exception */
1543 cpu_abort(env
, "Decrementer interrupt while in user mode. "
1546 case POWERPC_EXCP_FIT
: /* Fixed-interval timer interrupt */
1547 cpu_abort(env
, "Fix interval timer interrupt while in user mode. "
1550 case POWERPC_EXCP_WDT
: /* Watchdog timer interrupt */
1551 cpu_abort(env
, "Watchdog timer interrupt while in user mode. "
1554 case POWERPC_EXCP_DTLB
: /* Data TLB error */
1555 cpu_abort(env
, "Data TLB exception while in user mode. "
1558 case POWERPC_EXCP_ITLB
: /* Instruction TLB error */
1559 cpu_abort(env
, "Instruction TLB exception while in user mode. "
1562 case POWERPC_EXCP_SPEU
: /* SPE/embedded floating-point unavail. */
1563 EXCP_DUMP(env
, "No SPE/floating-point instruction allowed\n");
1564 info
.si_signo
= TARGET_SIGILL
;
1566 info
.si_code
= TARGET_ILL_COPROC
;
1567 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1568 queue_signal(env
, info
.si_signo
, &info
);
1570 case POWERPC_EXCP_EFPDI
: /* Embedded floating-point data IRQ */
1571 cpu_abort(env
, "Embedded floating-point data IRQ not handled\n");
1573 case POWERPC_EXCP_EFPRI
: /* Embedded floating-point round IRQ */
1574 cpu_abort(env
, "Embedded floating-point round IRQ not handled\n");
1576 case POWERPC_EXCP_EPERFM
: /* Embedded performance monitor IRQ */
1577 cpu_abort(env
, "Performance monitor exception not handled\n");
1579 case POWERPC_EXCP_DOORI
: /* Embedded doorbell interrupt */
1580 cpu_abort(env
, "Doorbell interrupt while in user mode. "
1583 case POWERPC_EXCP_DOORCI
: /* Embedded doorbell critical interrupt */
1584 cpu_abort(env
, "Doorbell critical interrupt while in user mode. "
1587 case POWERPC_EXCP_RESET
: /* System reset exception */
1588 cpu_abort(env
, "Reset interrupt while in user mode. "
1591 case POWERPC_EXCP_DSEG
: /* Data segment exception */
1592 cpu_abort(env
, "Data segment exception while in user mode. "
1595 case POWERPC_EXCP_ISEG
: /* Instruction segment exception */
1596 cpu_abort(env
, "Instruction segment exception "
1597 "while in user mode. Aborting\n");
1599 /* PowerPC 64 with hypervisor mode support */
1600 case POWERPC_EXCP_HDECR
: /* Hypervisor decrementer exception */
1601 cpu_abort(env
, "Hypervisor decrementer interrupt "
1602 "while in user mode. Aborting\n");
1604 case POWERPC_EXCP_TRACE
: /* Trace exception */
1606 * we use this exception to emulate step-by-step execution mode.
1609 /* PowerPC 64 with hypervisor mode support */
1610 case POWERPC_EXCP_HDSI
: /* Hypervisor data storage exception */
1611 cpu_abort(env
, "Hypervisor data storage exception "
1612 "while in user mode. Aborting\n");
1614 case POWERPC_EXCP_HISI
: /* Hypervisor instruction storage excp */
1615 cpu_abort(env
, "Hypervisor instruction storage exception "
1616 "while in user mode. Aborting\n");
1618 case POWERPC_EXCP_HDSEG
: /* Hypervisor data segment exception */
1619 cpu_abort(env
, "Hypervisor data segment exception "
1620 "while in user mode. Aborting\n");
1622 case POWERPC_EXCP_HISEG
: /* Hypervisor instruction segment excp */
1623 cpu_abort(env
, "Hypervisor instruction segment exception "
1624 "while in user mode. Aborting\n");
1626 case POWERPC_EXCP_VPU
: /* Vector unavailable exception */
1627 EXCP_DUMP(env
, "No Altivec instructions allowed\n");
1628 info
.si_signo
= TARGET_SIGILL
;
1630 info
.si_code
= TARGET_ILL_COPROC
;
1631 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1632 queue_signal(env
, info
.si_signo
, &info
);
1634 case POWERPC_EXCP_PIT
: /* Programmable interval timer IRQ */
1635 cpu_abort(env
, "Programmable interval timer interrupt "
1636 "while in user mode. Aborting\n");
1638 case POWERPC_EXCP_IO
: /* IO error exception */
1639 cpu_abort(env
, "IO error exception while in user mode. "
1642 case POWERPC_EXCP_RUNM
: /* Run mode exception */
1643 cpu_abort(env
, "Run mode exception while in user mode. "
1646 case POWERPC_EXCP_EMUL
: /* Emulation trap exception */
1647 cpu_abort(env
, "Emulation trap exception not handled\n");
1649 case POWERPC_EXCP_IFTLB
: /* Instruction fetch TLB error */
1650 cpu_abort(env
, "Instruction fetch TLB exception "
1651 "while in user-mode. Aborting");
1653 case POWERPC_EXCP_DLTLB
: /* Data load TLB miss */
1654 cpu_abort(env
, "Data load TLB exception while in user-mode. "
1657 case POWERPC_EXCP_DSTLB
: /* Data store TLB miss */
1658 cpu_abort(env
, "Data store TLB exception while in user-mode. "
1661 case POWERPC_EXCP_FPA
: /* Floating-point assist exception */
1662 cpu_abort(env
, "Floating-point assist exception not handled\n");
1664 case POWERPC_EXCP_IABR
: /* Instruction address breakpoint */
1665 cpu_abort(env
, "Instruction address breakpoint exception "
1668 case POWERPC_EXCP_SMI
: /* System management interrupt */
1669 cpu_abort(env
, "System management interrupt while in user mode. "
1672 case POWERPC_EXCP_THERM
: /* Thermal interrupt */
1673 cpu_abort(env
, "Thermal interrupt interrupt while in user mode. "
1676 case POWERPC_EXCP_PERFM
: /* Embedded performance monitor IRQ */
1677 cpu_abort(env
, "Performance monitor exception not handled\n");
1679 case POWERPC_EXCP_VPUA
: /* Vector assist exception */
1680 cpu_abort(env
, "Vector assist exception not handled\n");
1682 case POWERPC_EXCP_SOFTP
: /* Soft patch exception */
1683 cpu_abort(env
, "Soft patch exception not handled\n");
1685 case POWERPC_EXCP_MAINT
: /* Maintenance exception */
1686 cpu_abort(env
, "Maintenance exception while in user mode. "
1689 case POWERPC_EXCP_STOP
: /* stop translation */
1690 /* We did invalidate the instruction cache. Go on */
1692 case POWERPC_EXCP_BRANCH
: /* branch instruction: */
1693 /* We just stopped because of a branch. Go on */
1695 case POWERPC_EXCP_SYSCALL_USER
:
1696 /* system call in user-mode emulation */
1698 * PPC ABI uses overflow flag in cr0 to signal an error
1701 env
->crf
[0] &= ~0x1;
1702 ret
= do_syscall(env
, env
->gpr
[0], env
->gpr
[3], env
->gpr
[4],
1703 env
->gpr
[5], env
->gpr
[6], env
->gpr
[7],
1705 if (ret
== (target_ulong
)(-TARGET_QEMU_ESIGRETURN
)) {
1706 /* Returning from a successful sigreturn syscall.
1707 Avoid corrupting register state. */
1710 if (ret
> (target_ulong
)(-515)) {
1716 case POWERPC_EXCP_STCX
:
1717 if (do_store_exclusive(env
)) {
1718 info
.si_signo
= TARGET_SIGSEGV
;
1720 info
.si_code
= TARGET_SEGV_MAPERR
;
1721 info
._sifields
._sigfault
._addr
= env
->nip
;
1722 queue_signal(env
, info
.si_signo
, &info
);
1729 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
1731 info
.si_signo
= sig
;
1733 info
.si_code
= TARGET_TRAP_BRKPT
;
1734 queue_signal(env
, info
.si_signo
, &info
);
1738 case EXCP_INTERRUPT
:
1739 /* just indicate that signals should be handled asap */
1742 cpu_abort(env
, "Unknown exception 0x%d. Aborting\n", trapnr
);
1745 process_pending_signals(env
);
1752 # ifdef TARGET_ABI_MIPSO32
1753 # define MIPS_SYS(name, args) args,
1754 static const uint8_t mips_syscall_args
[] = {
1755 MIPS_SYS(sys_syscall
, 8) /* 4000 */
1756 MIPS_SYS(sys_exit
, 1)
1757 MIPS_SYS(sys_fork
, 0)
1758 MIPS_SYS(sys_read
, 3)
1759 MIPS_SYS(sys_write
, 3)
1760 MIPS_SYS(sys_open
, 3) /* 4005 */
1761 MIPS_SYS(sys_close
, 1)
1762 MIPS_SYS(sys_waitpid
, 3)
1763 MIPS_SYS(sys_creat
, 2)
1764 MIPS_SYS(sys_link
, 2)
1765 MIPS_SYS(sys_unlink
, 1) /* 4010 */
1766 MIPS_SYS(sys_execve
, 0)
1767 MIPS_SYS(sys_chdir
, 1)
1768 MIPS_SYS(sys_time
, 1)
1769 MIPS_SYS(sys_mknod
, 3)
1770 MIPS_SYS(sys_chmod
, 2) /* 4015 */
1771 MIPS_SYS(sys_lchown
, 3)
1772 MIPS_SYS(sys_ni_syscall
, 0)
1773 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_stat */
1774 MIPS_SYS(sys_lseek
, 3)
1775 MIPS_SYS(sys_getpid
, 0) /* 4020 */
1776 MIPS_SYS(sys_mount
, 5)
1777 MIPS_SYS(sys_oldumount
, 1)
1778 MIPS_SYS(sys_setuid
, 1)
1779 MIPS_SYS(sys_getuid
, 0)
1780 MIPS_SYS(sys_stime
, 1) /* 4025 */
1781 MIPS_SYS(sys_ptrace
, 4)
1782 MIPS_SYS(sys_alarm
, 1)
1783 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_fstat */
1784 MIPS_SYS(sys_pause
, 0)
1785 MIPS_SYS(sys_utime
, 2) /* 4030 */
1786 MIPS_SYS(sys_ni_syscall
, 0)
1787 MIPS_SYS(sys_ni_syscall
, 0)
1788 MIPS_SYS(sys_access
, 2)
1789 MIPS_SYS(sys_nice
, 1)
1790 MIPS_SYS(sys_ni_syscall
, 0) /* 4035 */
1791 MIPS_SYS(sys_sync
, 0)
1792 MIPS_SYS(sys_kill
, 2)
1793 MIPS_SYS(sys_rename
, 2)
1794 MIPS_SYS(sys_mkdir
, 2)
1795 MIPS_SYS(sys_rmdir
, 1) /* 4040 */
1796 MIPS_SYS(sys_dup
, 1)
1797 MIPS_SYS(sys_pipe
, 0)
1798 MIPS_SYS(sys_times
, 1)
1799 MIPS_SYS(sys_ni_syscall
, 0)
1800 MIPS_SYS(sys_brk
, 1) /* 4045 */
1801 MIPS_SYS(sys_setgid
, 1)
1802 MIPS_SYS(sys_getgid
, 0)
1803 MIPS_SYS(sys_ni_syscall
, 0) /* was signal(2) */
1804 MIPS_SYS(sys_geteuid
, 0)
1805 MIPS_SYS(sys_getegid
, 0) /* 4050 */
1806 MIPS_SYS(sys_acct
, 0)
1807 MIPS_SYS(sys_umount
, 2)
1808 MIPS_SYS(sys_ni_syscall
, 0)
1809 MIPS_SYS(sys_ioctl
, 3)
1810 MIPS_SYS(sys_fcntl
, 3) /* 4055 */
1811 MIPS_SYS(sys_ni_syscall
, 2)
1812 MIPS_SYS(sys_setpgid
, 2)
1813 MIPS_SYS(sys_ni_syscall
, 0)
1814 MIPS_SYS(sys_olduname
, 1)
1815 MIPS_SYS(sys_umask
, 1) /* 4060 */
1816 MIPS_SYS(sys_chroot
, 1)
1817 MIPS_SYS(sys_ustat
, 2)
1818 MIPS_SYS(sys_dup2
, 2)
1819 MIPS_SYS(sys_getppid
, 0)
1820 MIPS_SYS(sys_getpgrp
, 0) /* 4065 */
1821 MIPS_SYS(sys_setsid
, 0)
1822 MIPS_SYS(sys_sigaction
, 3)
1823 MIPS_SYS(sys_sgetmask
, 0)
1824 MIPS_SYS(sys_ssetmask
, 1)
1825 MIPS_SYS(sys_setreuid
, 2) /* 4070 */
1826 MIPS_SYS(sys_setregid
, 2)
1827 MIPS_SYS(sys_sigsuspend
, 0)
1828 MIPS_SYS(sys_sigpending
, 1)
1829 MIPS_SYS(sys_sethostname
, 2)
1830 MIPS_SYS(sys_setrlimit
, 2) /* 4075 */
1831 MIPS_SYS(sys_getrlimit
, 2)
1832 MIPS_SYS(sys_getrusage
, 2)
1833 MIPS_SYS(sys_gettimeofday
, 2)
1834 MIPS_SYS(sys_settimeofday
, 2)
1835 MIPS_SYS(sys_getgroups
, 2) /* 4080 */
1836 MIPS_SYS(sys_setgroups
, 2)
1837 MIPS_SYS(sys_ni_syscall
, 0) /* old_select */
1838 MIPS_SYS(sys_symlink
, 2)
1839 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_lstat */
1840 MIPS_SYS(sys_readlink
, 3) /* 4085 */
1841 MIPS_SYS(sys_uselib
, 1)
1842 MIPS_SYS(sys_swapon
, 2)
1843 MIPS_SYS(sys_reboot
, 3)
1844 MIPS_SYS(old_readdir
, 3)
1845 MIPS_SYS(old_mmap
, 6) /* 4090 */
1846 MIPS_SYS(sys_munmap
, 2)
1847 MIPS_SYS(sys_truncate
, 2)
1848 MIPS_SYS(sys_ftruncate
, 2)
1849 MIPS_SYS(sys_fchmod
, 2)
1850 MIPS_SYS(sys_fchown
, 3) /* 4095 */
1851 MIPS_SYS(sys_getpriority
, 2)
1852 MIPS_SYS(sys_setpriority
, 3)
1853 MIPS_SYS(sys_ni_syscall
, 0)
1854 MIPS_SYS(sys_statfs
, 2)
1855 MIPS_SYS(sys_fstatfs
, 2) /* 4100 */
1856 MIPS_SYS(sys_ni_syscall
, 0) /* was ioperm(2) */
1857 MIPS_SYS(sys_socketcall
, 2)
1858 MIPS_SYS(sys_syslog
, 3)
1859 MIPS_SYS(sys_setitimer
, 3)
1860 MIPS_SYS(sys_getitimer
, 2) /* 4105 */
1861 MIPS_SYS(sys_newstat
, 2)
1862 MIPS_SYS(sys_newlstat
, 2)
1863 MIPS_SYS(sys_newfstat
, 2)
1864 MIPS_SYS(sys_uname
, 1)
1865 MIPS_SYS(sys_ni_syscall
, 0) /* 4110 was iopl(2) */
1866 MIPS_SYS(sys_vhangup
, 0)
1867 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_idle() */
1868 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_vm86 */
1869 MIPS_SYS(sys_wait4
, 4)
1870 MIPS_SYS(sys_swapoff
, 1) /* 4115 */
1871 MIPS_SYS(sys_sysinfo
, 1)
1872 MIPS_SYS(sys_ipc
, 6)
1873 MIPS_SYS(sys_fsync
, 1)
1874 MIPS_SYS(sys_sigreturn
, 0)
1875 MIPS_SYS(sys_clone
, 6) /* 4120 */
1876 MIPS_SYS(sys_setdomainname
, 2)
1877 MIPS_SYS(sys_newuname
, 1)
1878 MIPS_SYS(sys_ni_syscall
, 0) /* sys_modify_ldt */
1879 MIPS_SYS(sys_adjtimex
, 1)
1880 MIPS_SYS(sys_mprotect
, 3) /* 4125 */
1881 MIPS_SYS(sys_sigprocmask
, 3)
1882 MIPS_SYS(sys_ni_syscall
, 0) /* was create_module */
1883 MIPS_SYS(sys_init_module
, 5)
1884 MIPS_SYS(sys_delete_module
, 1)
1885 MIPS_SYS(sys_ni_syscall
, 0) /* 4130 was get_kernel_syms */
1886 MIPS_SYS(sys_quotactl
, 0)
1887 MIPS_SYS(sys_getpgid
, 1)
1888 MIPS_SYS(sys_fchdir
, 1)
1889 MIPS_SYS(sys_bdflush
, 2)
1890 MIPS_SYS(sys_sysfs
, 3) /* 4135 */
1891 MIPS_SYS(sys_personality
, 1)
1892 MIPS_SYS(sys_ni_syscall
, 0) /* for afs_syscall */
1893 MIPS_SYS(sys_setfsuid
, 1)
1894 MIPS_SYS(sys_setfsgid
, 1)
1895 MIPS_SYS(sys_llseek
, 5) /* 4140 */
1896 MIPS_SYS(sys_getdents
, 3)
1897 MIPS_SYS(sys_select
, 5)
1898 MIPS_SYS(sys_flock
, 2)
1899 MIPS_SYS(sys_msync
, 3)
1900 MIPS_SYS(sys_readv
, 3) /* 4145 */
1901 MIPS_SYS(sys_writev
, 3)
1902 MIPS_SYS(sys_cacheflush
, 3)
1903 MIPS_SYS(sys_cachectl
, 3)
1904 MIPS_SYS(sys_sysmips
, 4)
1905 MIPS_SYS(sys_ni_syscall
, 0) /* 4150 */
1906 MIPS_SYS(sys_getsid
, 1)
1907 MIPS_SYS(sys_fdatasync
, 0)
1908 MIPS_SYS(sys_sysctl
, 1)
1909 MIPS_SYS(sys_mlock
, 2)
1910 MIPS_SYS(sys_munlock
, 2) /* 4155 */
1911 MIPS_SYS(sys_mlockall
, 1)
1912 MIPS_SYS(sys_munlockall
, 0)
1913 MIPS_SYS(sys_sched_setparam
, 2)
1914 MIPS_SYS(sys_sched_getparam
, 2)
1915 MIPS_SYS(sys_sched_setscheduler
, 3) /* 4160 */
1916 MIPS_SYS(sys_sched_getscheduler
, 1)
1917 MIPS_SYS(sys_sched_yield
, 0)
1918 MIPS_SYS(sys_sched_get_priority_max
, 1)
1919 MIPS_SYS(sys_sched_get_priority_min
, 1)
1920 MIPS_SYS(sys_sched_rr_get_interval
, 2) /* 4165 */
1921 MIPS_SYS(sys_nanosleep
, 2)
1922 MIPS_SYS(sys_mremap
, 4)
1923 MIPS_SYS(sys_accept
, 3)
1924 MIPS_SYS(sys_bind
, 3)
1925 MIPS_SYS(sys_connect
, 3) /* 4170 */
1926 MIPS_SYS(sys_getpeername
, 3)
1927 MIPS_SYS(sys_getsockname
, 3)
1928 MIPS_SYS(sys_getsockopt
, 5)
1929 MIPS_SYS(sys_listen
, 2)
1930 MIPS_SYS(sys_recv
, 4) /* 4175 */
1931 MIPS_SYS(sys_recvfrom
, 6)
1932 MIPS_SYS(sys_recvmsg
, 3)
1933 MIPS_SYS(sys_send
, 4)
1934 MIPS_SYS(sys_sendmsg
, 3)
1935 MIPS_SYS(sys_sendto
, 6) /* 4180 */
1936 MIPS_SYS(sys_setsockopt
, 5)
1937 MIPS_SYS(sys_shutdown
, 2)
1938 MIPS_SYS(sys_socket
, 3)
1939 MIPS_SYS(sys_socketpair
, 4)
1940 MIPS_SYS(sys_setresuid
, 3) /* 4185 */
1941 MIPS_SYS(sys_getresuid
, 3)
1942 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_query_module */
1943 MIPS_SYS(sys_poll
, 3)
1944 MIPS_SYS(sys_nfsservctl
, 3)
1945 MIPS_SYS(sys_setresgid
, 3) /* 4190 */
1946 MIPS_SYS(sys_getresgid
, 3)
1947 MIPS_SYS(sys_prctl
, 5)
1948 MIPS_SYS(sys_rt_sigreturn
, 0)
1949 MIPS_SYS(sys_rt_sigaction
, 4)
1950 MIPS_SYS(sys_rt_sigprocmask
, 4) /* 4195 */
1951 MIPS_SYS(sys_rt_sigpending
, 2)
1952 MIPS_SYS(sys_rt_sigtimedwait
, 4)
1953 MIPS_SYS(sys_rt_sigqueueinfo
, 3)
1954 MIPS_SYS(sys_rt_sigsuspend
, 0)
1955 MIPS_SYS(sys_pread64
, 6) /* 4200 */
1956 MIPS_SYS(sys_pwrite64
, 6)
1957 MIPS_SYS(sys_chown
, 3)
1958 MIPS_SYS(sys_getcwd
, 2)
1959 MIPS_SYS(sys_capget
, 2)
1960 MIPS_SYS(sys_capset
, 2) /* 4205 */
1961 MIPS_SYS(sys_sigaltstack
, 2)
1962 MIPS_SYS(sys_sendfile
, 4)
1963 MIPS_SYS(sys_ni_syscall
, 0)
1964 MIPS_SYS(sys_ni_syscall
, 0)
1965 MIPS_SYS(sys_mmap2
, 6) /* 4210 */
1966 MIPS_SYS(sys_truncate64
, 4)
1967 MIPS_SYS(sys_ftruncate64
, 4)
1968 MIPS_SYS(sys_stat64
, 2)
1969 MIPS_SYS(sys_lstat64
, 2)
1970 MIPS_SYS(sys_fstat64
, 2) /* 4215 */
1971 MIPS_SYS(sys_pivot_root
, 2)
1972 MIPS_SYS(sys_mincore
, 3)
1973 MIPS_SYS(sys_madvise
, 3)
1974 MIPS_SYS(sys_getdents64
, 3)
1975 MIPS_SYS(sys_fcntl64
, 3) /* 4220 */
1976 MIPS_SYS(sys_ni_syscall
, 0)
1977 MIPS_SYS(sys_gettid
, 0)
1978 MIPS_SYS(sys_readahead
, 5)
1979 MIPS_SYS(sys_setxattr
, 5)
1980 MIPS_SYS(sys_lsetxattr
, 5) /* 4225 */
1981 MIPS_SYS(sys_fsetxattr
, 5)
1982 MIPS_SYS(sys_getxattr
, 4)
1983 MIPS_SYS(sys_lgetxattr
, 4)
1984 MIPS_SYS(sys_fgetxattr
, 4)
1985 MIPS_SYS(sys_listxattr
, 3) /* 4230 */
1986 MIPS_SYS(sys_llistxattr
, 3)
1987 MIPS_SYS(sys_flistxattr
, 3)
1988 MIPS_SYS(sys_removexattr
, 2)
1989 MIPS_SYS(sys_lremovexattr
, 2)
1990 MIPS_SYS(sys_fremovexattr
, 2) /* 4235 */
1991 MIPS_SYS(sys_tkill
, 2)
1992 MIPS_SYS(sys_sendfile64
, 5)
1993 MIPS_SYS(sys_futex
, 6)
1994 MIPS_SYS(sys_sched_setaffinity
, 3)
1995 MIPS_SYS(sys_sched_getaffinity
, 3) /* 4240 */
1996 MIPS_SYS(sys_io_setup
, 2)
1997 MIPS_SYS(sys_io_destroy
, 1)
1998 MIPS_SYS(sys_io_getevents
, 5)
1999 MIPS_SYS(sys_io_submit
, 3)
2000 MIPS_SYS(sys_io_cancel
, 3) /* 4245 */
2001 MIPS_SYS(sys_exit_group
, 1)
2002 MIPS_SYS(sys_lookup_dcookie
, 3)
2003 MIPS_SYS(sys_epoll_create
, 1)
2004 MIPS_SYS(sys_epoll_ctl
, 4)
2005 MIPS_SYS(sys_epoll_wait
, 3) /* 4250 */
2006 MIPS_SYS(sys_remap_file_pages
, 5)
2007 MIPS_SYS(sys_set_tid_address
, 1)
2008 MIPS_SYS(sys_restart_syscall
, 0)
2009 MIPS_SYS(sys_fadvise64_64
, 7)
2010 MIPS_SYS(sys_statfs64
, 3) /* 4255 */
2011 MIPS_SYS(sys_fstatfs64
, 2)
2012 MIPS_SYS(sys_timer_create
, 3)
2013 MIPS_SYS(sys_timer_settime
, 4)
2014 MIPS_SYS(sys_timer_gettime
, 2)
2015 MIPS_SYS(sys_timer_getoverrun
, 1) /* 4260 */
2016 MIPS_SYS(sys_timer_delete
, 1)
2017 MIPS_SYS(sys_clock_settime
, 2)
2018 MIPS_SYS(sys_clock_gettime
, 2)
2019 MIPS_SYS(sys_clock_getres
, 2)
2020 MIPS_SYS(sys_clock_nanosleep
, 4) /* 4265 */
2021 MIPS_SYS(sys_tgkill
, 3)
2022 MIPS_SYS(sys_utimes
, 2)
2023 MIPS_SYS(sys_mbind
, 4)
2024 MIPS_SYS(sys_ni_syscall
, 0) /* sys_get_mempolicy */
2025 MIPS_SYS(sys_ni_syscall
, 0) /* 4270 sys_set_mempolicy */
2026 MIPS_SYS(sys_mq_open
, 4)
2027 MIPS_SYS(sys_mq_unlink
, 1)
2028 MIPS_SYS(sys_mq_timedsend
, 5)
2029 MIPS_SYS(sys_mq_timedreceive
, 5)
2030 MIPS_SYS(sys_mq_notify
, 2) /* 4275 */
2031 MIPS_SYS(sys_mq_getsetattr
, 3)
2032 MIPS_SYS(sys_ni_syscall
, 0) /* sys_vserver */
2033 MIPS_SYS(sys_waitid
, 4)
2034 MIPS_SYS(sys_ni_syscall
, 0) /* available, was setaltroot */
2035 MIPS_SYS(sys_add_key
, 5)
2036 MIPS_SYS(sys_request_key
, 4)
2037 MIPS_SYS(sys_keyctl
, 5)
2038 MIPS_SYS(sys_set_thread_area
, 1)
2039 MIPS_SYS(sys_inotify_init
, 0)
2040 MIPS_SYS(sys_inotify_add_watch
, 3) /* 4285 */
2041 MIPS_SYS(sys_inotify_rm_watch
, 2)
2042 MIPS_SYS(sys_migrate_pages
, 4)
2043 MIPS_SYS(sys_openat
, 4)
2044 MIPS_SYS(sys_mkdirat
, 3)
2045 MIPS_SYS(sys_mknodat
, 4) /* 4290 */
2046 MIPS_SYS(sys_fchownat
, 5)
2047 MIPS_SYS(sys_futimesat
, 3)
2048 MIPS_SYS(sys_fstatat64
, 4)
2049 MIPS_SYS(sys_unlinkat
, 3)
2050 MIPS_SYS(sys_renameat
, 4) /* 4295 */
2051 MIPS_SYS(sys_linkat
, 5)
2052 MIPS_SYS(sys_symlinkat
, 3)
2053 MIPS_SYS(sys_readlinkat
, 4)
2054 MIPS_SYS(sys_fchmodat
, 3)
2055 MIPS_SYS(sys_faccessat
, 3) /* 4300 */
2056 MIPS_SYS(sys_pselect6
, 6)
2057 MIPS_SYS(sys_ppoll
, 5)
2058 MIPS_SYS(sys_unshare
, 1)
2059 MIPS_SYS(sys_splice
, 4)
2060 MIPS_SYS(sys_sync_file_range
, 7) /* 4305 */
2061 MIPS_SYS(sys_tee
, 4)
2062 MIPS_SYS(sys_vmsplice
, 4)
2063 MIPS_SYS(sys_move_pages
, 6)
2064 MIPS_SYS(sys_set_robust_list
, 2)
2065 MIPS_SYS(sys_get_robust_list
, 3) /* 4310 */
2066 MIPS_SYS(sys_kexec_load
, 4)
2067 MIPS_SYS(sys_getcpu
, 3)
2068 MIPS_SYS(sys_epoll_pwait
, 6)
2069 MIPS_SYS(sys_ioprio_set
, 3)
2070 MIPS_SYS(sys_ioprio_get
, 2)
2071 MIPS_SYS(sys_utimensat
, 4)
2072 MIPS_SYS(sys_signalfd
, 3)
2073 MIPS_SYS(sys_ni_syscall
, 0) /* was timerfd */
2074 MIPS_SYS(sys_eventfd
, 1)
2075 MIPS_SYS(sys_fallocate
, 6) /* 4320 */
2076 MIPS_SYS(sys_timerfd_create
, 2)
2077 MIPS_SYS(sys_timerfd_gettime
, 2)
2078 MIPS_SYS(sys_timerfd_settime
, 4)
2079 MIPS_SYS(sys_signalfd4
, 4)
2080 MIPS_SYS(sys_eventfd2
, 2) /* 4325 */
2081 MIPS_SYS(sys_epoll_create1
, 1)
2082 MIPS_SYS(sys_dup3
, 3)
2083 MIPS_SYS(sys_pipe2
, 2)
2084 MIPS_SYS(sys_inotify_init1
, 1)
2085 MIPS_SYS(sys_preadv
, 6) /* 4330 */
2086 MIPS_SYS(sys_pwritev
, 6)
2087 MIPS_SYS(sys_rt_tgsigqueueinfo
, 4)
2088 MIPS_SYS(sys_perf_event_open
, 5)
2089 MIPS_SYS(sys_accept4
, 4)
2090 MIPS_SYS(sys_recvmmsg
, 5) /* 4335 */
2091 MIPS_SYS(sys_fanotify_init
, 2)
2092 MIPS_SYS(sys_fanotify_mark
, 6)
2093 MIPS_SYS(sys_prlimit64
, 4)
2094 MIPS_SYS(sys_name_to_handle_at
, 5)
2095 MIPS_SYS(sys_open_by_handle_at
, 3) /* 4340 */
2096 MIPS_SYS(sys_clock_adjtime
, 2)
2097 MIPS_SYS(sys_syncfs
, 1)
2102 static int do_store_exclusive(CPUMIPSState
*env
)
2105 target_ulong page_addr
;
2113 page_addr
= addr
& TARGET_PAGE_MASK
;
2116 flags
= page_get_flags(page_addr
);
2117 if ((flags
& PAGE_READ
) == 0) {
2120 reg
= env
->llreg
& 0x1f;
2121 d
= (env
->llreg
& 0x20) != 0;
2123 segv
= get_user_s64(val
, addr
);
2125 segv
= get_user_s32(val
, addr
);
2128 if (val
!= env
->llval
) {
2129 env
->active_tc
.gpr
[reg
] = 0;
2132 segv
= put_user_u64(env
->llnewval
, addr
);
2134 segv
= put_user_u32(env
->llnewval
, addr
);
2137 env
->active_tc
.gpr
[reg
] = 1;
2144 env
->active_tc
.PC
+= 4;
2157 static int do_break(CPUMIPSState
*env
, target_siginfo_t
*info
,
2165 info
->si_signo
= TARGET_SIGFPE
;
2167 info
->si_code
= (code
== BRK_OVERFLOW
) ? FPE_INTOVF
: FPE_INTDIV
;
2168 queue_signal(env
, info
->si_signo
, &*info
);
2178 void cpu_loop(CPUMIPSState
*env
)
2180 CPUState
*cs
= CPU(mips_env_get_cpu(env
));
2181 target_siginfo_t info
;
2184 # ifdef TARGET_ABI_MIPSO32
2185 unsigned int syscall_num
;
2190 trapnr
= cpu_mips_exec(env
);
2194 env
->active_tc
.PC
+= 4;
2195 # ifdef TARGET_ABI_MIPSO32
2196 syscall_num
= env
->active_tc
.gpr
[2] - 4000;
2197 if (syscall_num
>= sizeof(mips_syscall_args
)) {
2198 ret
= -TARGET_ENOSYS
;
2202 abi_ulong arg5
= 0, arg6
= 0, arg7
= 0, arg8
= 0;
2204 nb_args
= mips_syscall_args
[syscall_num
];
2205 sp_reg
= env
->active_tc
.gpr
[29];
2207 /* these arguments are taken from the stack */
2209 if ((ret
= get_user_ual(arg8
, sp_reg
+ 28)) != 0) {
2213 if ((ret
= get_user_ual(arg7
, sp_reg
+ 24)) != 0) {
2217 if ((ret
= get_user_ual(arg6
, sp_reg
+ 20)) != 0) {
2221 if ((ret
= get_user_ual(arg5
, sp_reg
+ 16)) != 0) {
2227 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2228 env
->active_tc
.gpr
[4],
2229 env
->active_tc
.gpr
[5],
2230 env
->active_tc
.gpr
[6],
2231 env
->active_tc
.gpr
[7],
2232 arg5
, arg6
, arg7
, arg8
);
2236 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
2237 env
->active_tc
.gpr
[4], env
->active_tc
.gpr
[5],
2238 env
->active_tc
.gpr
[6], env
->active_tc
.gpr
[7],
2239 env
->active_tc
.gpr
[8], env
->active_tc
.gpr
[9],
2240 env
->active_tc
.gpr
[10], env
->active_tc
.gpr
[11]);
2242 if (ret
== -TARGET_QEMU_ESIGRETURN
) {
2243 /* Returning from a successful sigreturn syscall.
2244 Avoid clobbering register state. */
2247 if ((abi_ulong
)ret
>= (abi_ulong
)-1133) {
2248 env
->active_tc
.gpr
[7] = 1; /* error flag */
2251 env
->active_tc
.gpr
[7] = 0; /* error flag */
2253 env
->active_tc
.gpr
[2] = ret
;
2259 info
.si_signo
= TARGET_SIGSEGV
;
2261 /* XXX: check env->error_code */
2262 info
.si_code
= TARGET_SEGV_MAPERR
;
2263 info
._sifields
._sigfault
._addr
= env
->CP0_BadVAddr
;
2264 queue_signal(env
, info
.si_signo
, &info
);
2268 info
.si_signo
= TARGET_SIGILL
;
2271 queue_signal(env
, info
.si_signo
, &info
);
2273 case EXCP_INTERRUPT
:
2274 /* just indicate that signals should be handled asap */
2280 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2283 info
.si_signo
= sig
;
2285 info
.si_code
= TARGET_TRAP_BRKPT
;
2286 queue_signal(env
, info
.si_signo
, &info
);
2291 if (do_store_exclusive(env
)) {
2292 info
.si_signo
= TARGET_SIGSEGV
;
2294 info
.si_code
= TARGET_SEGV_MAPERR
;
2295 info
._sifields
._sigfault
._addr
= env
->active_tc
.PC
;
2296 queue_signal(env
, info
.si_signo
, &info
);
2300 info
.si_signo
= TARGET_SIGILL
;
2302 info
.si_code
= TARGET_ILL_ILLOPC
;
2303 queue_signal(env
, info
.si_signo
, &info
);
2305 /* The code below was inspired by the MIPS Linux kernel trap
2306 * handling code in arch/mips/kernel/traps.c.
2310 abi_ulong trap_instr
;
2313 ret
= get_user_ual(trap_instr
, env
->active_tc
.PC
);
2318 /* As described in the original Linux kernel code, the
2319 * below checks on 'code' are to work around an old
2322 code
= ((trap_instr
>> 6) & ((1 << 20) - 1));
2323 if (code
>= (1 << 10)) {
2327 if (do_break(env
, &info
, code
) != 0) {
2334 abi_ulong trap_instr
;
2335 unsigned int code
= 0;
2337 ret
= get_user_ual(trap_instr
, env
->active_tc
.PC
);
2342 /* The immediate versions don't provide a code. */
2343 if (!(trap_instr
& 0xFC000000)) {
2344 code
= ((trap_instr
>> 6) & ((1 << 10) - 1));
2347 if (do_break(env
, &info
, code
) != 0) {
2354 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2356 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2359 process_pending_signals(env
);
2364 #ifdef TARGET_OPENRISC
2366 void cpu_loop(CPUOpenRISCState
*env
)
2368 CPUState
*cs
= CPU(openrisc_env_get_cpu(env
));
2372 trapnr
= cpu_exec(env
);
2377 qemu_log("\nReset request, exit, pc is %#x\n", env
->pc
);
2381 qemu_log("\nBus error, exit, pc is %#x\n", env
->pc
);
2386 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2387 gdbsig
= TARGET_SIGSEGV
;
2390 qemu_log("\nTick time interrupt pc is %#x\n", env
->pc
);
2393 qemu_log("\nAlignment pc is %#x\n", env
->pc
);
2397 qemu_log("\nIllegal instructionpc is %#x\n", env
->pc
);
2401 qemu_log("\nExternal interruptpc is %#x\n", env
->pc
);
2405 qemu_log("\nTLB miss\n");
2408 qemu_log("\nRange\n");
2412 env
->pc
+= 4; /* 0xc00; */
2413 env
->gpr
[11] = do_syscall(env
,
2414 env
->gpr
[11], /* return value */
2415 env
->gpr
[3], /* r3 - r7 are params */
2423 qemu_log("\nFloating point error\n");
2426 qemu_log("\nTrap\n");
2433 qemu_log("\nqemu: unhandled CPU exception %#x - aborting\n",
2435 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2436 gdbsig
= TARGET_SIGILL
;
2440 gdb_handlesig(env
, gdbsig
);
2441 if (gdbsig
!= TARGET_SIGTRAP
) {
2446 process_pending_signals(env
);
2450 #endif /* TARGET_OPENRISC */
2453 void cpu_loop(CPUSH4State
*env
)
2455 CPUState
*cs
= CPU(sh_env_get_cpu(env
));
2457 target_siginfo_t info
;
2460 trapnr
= cpu_sh4_exec (env
);
2465 ret
= do_syscall(env
,
2474 env
->gregs
[0] = ret
;
2476 case EXCP_INTERRUPT
:
2477 /* just indicate that signals should be handled asap */
2483 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2486 info
.si_signo
= sig
;
2488 info
.si_code
= TARGET_TRAP_BRKPT
;
2489 queue_signal(env
, info
.si_signo
, &info
);
2495 info
.si_signo
= SIGSEGV
;
2497 info
.si_code
= TARGET_SEGV_MAPERR
;
2498 info
._sifields
._sigfault
._addr
= env
->tea
;
2499 queue_signal(env
, info
.si_signo
, &info
);
2503 printf ("Unhandled trap: 0x%x\n", trapnr
);
2504 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2507 process_pending_signals (env
);
2513 void cpu_loop(CPUCRISState
*env
)
2515 CPUState
*cs
= CPU(cris_env_get_cpu(env
));
2517 target_siginfo_t info
;
2520 trapnr
= cpu_cris_exec (env
);
2524 info
.si_signo
= SIGSEGV
;
2526 /* XXX: check env->error_code */
2527 info
.si_code
= TARGET_SEGV_MAPERR
;
2528 info
._sifields
._sigfault
._addr
= env
->pregs
[PR_EDA
];
2529 queue_signal(env
, info
.si_signo
, &info
);
2532 case EXCP_INTERRUPT
:
2533 /* just indicate that signals should be handled asap */
2536 ret
= do_syscall(env
,
2545 env
->regs
[10] = ret
;
2551 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2554 info
.si_signo
= sig
;
2556 info
.si_code
= TARGET_TRAP_BRKPT
;
2557 queue_signal(env
, info
.si_signo
, &info
);
2562 printf ("Unhandled trap: 0x%x\n", trapnr
);
2563 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2566 process_pending_signals (env
);
2571 #ifdef TARGET_MICROBLAZE
2572 void cpu_loop(CPUMBState
*env
)
2574 CPUState
*cs
= CPU(mb_env_get_cpu(env
));
2576 target_siginfo_t info
;
2579 trapnr
= cpu_mb_exec (env
);
2583 info
.si_signo
= SIGSEGV
;
2585 /* XXX: check env->error_code */
2586 info
.si_code
= TARGET_SEGV_MAPERR
;
2587 info
._sifields
._sigfault
._addr
= 0;
2588 queue_signal(env
, info
.si_signo
, &info
);
2591 case EXCP_INTERRUPT
:
2592 /* just indicate that signals should be handled asap */
2595 /* Return address is 4 bytes after the call. */
2597 env
->sregs
[SR_PC
] = env
->regs
[14];
2598 ret
= do_syscall(env
,
2610 env
->regs
[17] = env
->sregs
[SR_PC
] + 4;
2611 if (env
->iflags
& D_FLAG
) {
2612 env
->sregs
[SR_ESR
] |= 1 << 12;
2613 env
->sregs
[SR_PC
] -= 4;
2614 /* FIXME: if branch was immed, replay the imm as well. */
2617 env
->iflags
&= ~(IMM_FLAG
| D_FLAG
);
2619 switch (env
->sregs
[SR_ESR
] & 31) {
2620 case ESR_EC_DIVZERO
:
2621 info
.si_signo
= SIGFPE
;
2623 info
.si_code
= TARGET_FPE_FLTDIV
;
2624 info
._sifields
._sigfault
._addr
= 0;
2625 queue_signal(env
, info
.si_signo
, &info
);
2628 info
.si_signo
= SIGFPE
;
2630 if (env
->sregs
[SR_FSR
] & FSR_IO
) {
2631 info
.si_code
= TARGET_FPE_FLTINV
;
2633 if (env
->sregs
[SR_FSR
] & FSR_DZ
) {
2634 info
.si_code
= TARGET_FPE_FLTDIV
;
2636 info
._sifields
._sigfault
._addr
= 0;
2637 queue_signal(env
, info
.si_signo
, &info
);
2640 printf ("Unhandled hw-exception: 0x%x\n",
2641 env
->sregs
[SR_ESR
] & ESR_EC_MASK
);
2642 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2651 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2654 info
.si_signo
= sig
;
2656 info
.si_code
= TARGET_TRAP_BRKPT
;
2657 queue_signal(env
, info
.si_signo
, &info
);
2662 printf ("Unhandled trap: 0x%x\n", trapnr
);
2663 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2666 process_pending_signals (env
);
2673 void cpu_loop(CPUM68KState
*env
)
2675 CPUState
*cs
= CPU(m68k_env_get_cpu(env
));
2678 target_siginfo_t info
;
2679 TaskState
*ts
= env
->opaque
;
2682 trapnr
= cpu_m68k_exec(env
);
2686 if (ts
->sim_syscalls
) {
2688 nr
= lduw(env
->pc
+ 2);
2690 do_m68k_simcall(env
, nr
);
2696 case EXCP_HALT_INSN
:
2697 /* Semihosing syscall. */
2699 do_m68k_semihosting(env
, env
->dregs
[0]);
2703 case EXCP_UNSUPPORTED
:
2705 info
.si_signo
= SIGILL
;
2707 info
.si_code
= TARGET_ILL_ILLOPN
;
2708 info
._sifields
._sigfault
._addr
= env
->pc
;
2709 queue_signal(env
, info
.si_signo
, &info
);
2713 ts
->sim_syscalls
= 0;
2716 env
->dregs
[0] = do_syscall(env
,
2727 case EXCP_INTERRUPT
:
2728 /* just indicate that signals should be handled asap */
2732 info
.si_signo
= SIGSEGV
;
2734 /* XXX: check env->error_code */
2735 info
.si_code
= TARGET_SEGV_MAPERR
;
2736 info
._sifields
._sigfault
._addr
= env
->mmu
.ar
;
2737 queue_signal(env
, info
.si_signo
, &info
);
2744 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2747 info
.si_signo
= sig
;
2749 info
.si_code
= TARGET_TRAP_BRKPT
;
2750 queue_signal(env
, info
.si_signo
, &info
);
2755 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2757 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2760 process_pending_signals(env
);
2763 #endif /* TARGET_M68K */
2766 static void do_store_exclusive(CPUAlphaState
*env
, int reg
, int quad
)
2768 target_ulong addr
, val
, tmp
;
2769 target_siginfo_t info
;
2772 addr
= env
->lock_addr
;
2773 tmp
= env
->lock_st_addr
;
2774 env
->lock_addr
= -1;
2775 env
->lock_st_addr
= 0;
2781 if (quad
? get_user_s64(val
, addr
) : get_user_s32(val
, addr
)) {
2785 if (val
== env
->lock_value
) {
2787 if (quad
? put_user_u64(tmp
, addr
) : put_user_u32(tmp
, addr
)) {
2804 info
.si_signo
= TARGET_SIGSEGV
;
2806 info
.si_code
= TARGET_SEGV_MAPERR
;
2807 info
._sifields
._sigfault
._addr
= addr
;
2808 queue_signal(env
, TARGET_SIGSEGV
, &info
);
2811 void cpu_loop(CPUAlphaState
*env
)
2813 CPUState
*cs
= CPU(alpha_env_get_cpu(env
));
2815 target_siginfo_t info
;
2819 trapnr
= cpu_alpha_exec (env
);
2821 /* All of the traps imply a transition through PALcode, which
2822 implies an REI instruction has been executed. Which means
2823 that the intr_flag should be cleared. */
2828 fprintf(stderr
, "Reset requested. Exit\n");
2832 fprintf(stderr
, "Machine check exception. Exit\n");
2835 case EXCP_SMP_INTERRUPT
:
2836 case EXCP_CLK_INTERRUPT
:
2837 case EXCP_DEV_INTERRUPT
:
2838 fprintf(stderr
, "External interrupt. Exit\n");
2842 env
->lock_addr
= -1;
2843 info
.si_signo
= TARGET_SIGSEGV
;
2845 info
.si_code
= (page_get_flags(env
->trap_arg0
) & PAGE_VALID
2846 ? TARGET_SEGV_ACCERR
: TARGET_SEGV_MAPERR
);
2847 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
2848 queue_signal(env
, info
.si_signo
, &info
);
2851 env
->lock_addr
= -1;
2852 info
.si_signo
= TARGET_SIGBUS
;
2854 info
.si_code
= TARGET_BUS_ADRALN
;
2855 info
._sifields
._sigfault
._addr
= env
->trap_arg0
;
2856 queue_signal(env
, info
.si_signo
, &info
);
2860 env
->lock_addr
= -1;
2861 info
.si_signo
= TARGET_SIGILL
;
2863 info
.si_code
= TARGET_ILL_ILLOPC
;
2864 info
._sifields
._sigfault
._addr
= env
->pc
;
2865 queue_signal(env
, info
.si_signo
, &info
);
2868 env
->lock_addr
= -1;
2869 info
.si_signo
= TARGET_SIGFPE
;
2871 info
.si_code
= TARGET_FPE_FLTINV
;
2872 info
._sifields
._sigfault
._addr
= env
->pc
;
2873 queue_signal(env
, info
.si_signo
, &info
);
2876 /* No-op. Linux simply re-enables the FPU. */
2879 env
->lock_addr
= -1;
2880 switch (env
->error_code
) {
2883 info
.si_signo
= TARGET_SIGTRAP
;
2885 info
.si_code
= TARGET_TRAP_BRKPT
;
2886 info
._sifields
._sigfault
._addr
= env
->pc
;
2887 queue_signal(env
, info
.si_signo
, &info
);
2891 info
.si_signo
= TARGET_SIGTRAP
;
2894 info
._sifields
._sigfault
._addr
= env
->pc
;
2895 queue_signal(env
, info
.si_signo
, &info
);
2899 trapnr
= env
->ir
[IR_V0
];
2900 sysret
= do_syscall(env
, trapnr
,
2901 env
->ir
[IR_A0
], env
->ir
[IR_A1
],
2902 env
->ir
[IR_A2
], env
->ir
[IR_A3
],
2903 env
->ir
[IR_A4
], env
->ir
[IR_A5
],
2905 if (trapnr
== TARGET_NR_sigreturn
2906 || trapnr
== TARGET_NR_rt_sigreturn
) {
2909 /* Syscall writes 0 to V0 to bypass error check, similar
2910 to how this is handled internal to Linux kernel.
2911 (Ab)use trapnr temporarily as boolean indicating error. */
2912 trapnr
= (env
->ir
[IR_V0
] != 0 && sysret
< 0);
2913 env
->ir
[IR_V0
] = (trapnr
? -sysret
: sysret
);
2914 env
->ir
[IR_A3
] = trapnr
;
2918 /* ??? We can probably elide the code using page_unprotect
2919 that is checking for self-modifying code. Instead we
2920 could simply call tb_flush here. Until we work out the
2921 changes required to turn off the extra write protection,
2922 this can be a no-op. */
2926 /* Handled in the translator for usermode. */
2930 /* Handled in the translator for usermode. */
2934 info
.si_signo
= TARGET_SIGFPE
;
2935 switch (env
->ir
[IR_A0
]) {
2936 case TARGET_GEN_INTOVF
:
2937 info
.si_code
= TARGET_FPE_INTOVF
;
2939 case TARGET_GEN_INTDIV
:
2940 info
.si_code
= TARGET_FPE_INTDIV
;
2942 case TARGET_GEN_FLTOVF
:
2943 info
.si_code
= TARGET_FPE_FLTOVF
;
2945 case TARGET_GEN_FLTUND
:
2946 info
.si_code
= TARGET_FPE_FLTUND
;
2948 case TARGET_GEN_FLTINV
:
2949 info
.si_code
= TARGET_FPE_FLTINV
;
2951 case TARGET_GEN_FLTINE
:
2952 info
.si_code
= TARGET_FPE_FLTRES
;
2954 case TARGET_GEN_ROPRAND
:
2958 info
.si_signo
= TARGET_SIGTRAP
;
2963 info
._sifields
._sigfault
._addr
= env
->pc
;
2964 queue_signal(env
, info
.si_signo
, &info
);
2971 info
.si_signo
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2972 if (info
.si_signo
) {
2973 env
->lock_addr
= -1;
2975 info
.si_code
= TARGET_TRAP_BRKPT
;
2976 queue_signal(env
, info
.si_signo
, &info
);
2981 do_store_exclusive(env
, env
->error_code
, trapnr
- EXCP_STL_C
);
2983 case EXCP_INTERRUPT
:
2984 /* Just indicate that signals should be handled asap. */
2987 printf ("Unhandled trap: 0x%x\n", trapnr
);
2988 cpu_dump_state(cs
, stderr
, fprintf
, 0);
2991 process_pending_signals (env
);
2994 #endif /* TARGET_ALPHA */
2997 void cpu_loop(CPUS390XState
*env
)
2999 CPUState
*cs
= CPU(s390_env_get_cpu(env
));
3001 target_siginfo_t info
;
3005 trapnr
= cpu_s390x_exec(env
);
3007 case EXCP_INTERRUPT
:
3008 /* Just indicate that signals should be handled asap. */
3012 n
= env
->int_svc_code
;
3014 /* syscalls > 255 */
3017 env
->psw
.addr
+= env
->int_svc_ilen
;
3018 env
->regs
[2] = do_syscall(env
, n
, env
->regs
[2], env
->regs
[3],
3019 env
->regs
[4], env
->regs
[5],
3020 env
->regs
[6], env
->regs
[7], 0, 0);
3024 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
3026 n
= TARGET_TRAP_BRKPT
;
3031 n
= env
->int_pgm_code
;
3034 case PGM_PRIVILEGED
:
3036 n
= TARGET_ILL_ILLOPC
;
3038 case PGM_PROTECTION
:
3039 case PGM_ADDRESSING
:
3041 /* XXX: check env->error_code */
3042 n
= TARGET_SEGV_MAPERR
;
3043 addr
= env
->__excp_addr
;
3046 case PGM_SPECIFICATION
:
3047 case PGM_SPECIAL_OP
:
3051 n
= TARGET_ILL_ILLOPN
;
3054 case PGM_FIXPT_OVERFLOW
:
3056 n
= TARGET_FPE_INTOVF
;
3058 case PGM_FIXPT_DIVIDE
:
3060 n
= TARGET_FPE_INTDIV
;
3064 n
= (env
->fpc
>> 8) & 0xff;
3066 /* compare-and-trap */
3069 /* An IEEE exception, simulated or otherwise. */
3071 n
= TARGET_FPE_FLTINV
;
3072 } else if (n
& 0x40) {
3073 n
= TARGET_FPE_FLTDIV
;
3074 } else if (n
& 0x20) {
3075 n
= TARGET_FPE_FLTOVF
;
3076 } else if (n
& 0x10) {
3077 n
= TARGET_FPE_FLTUND
;
3078 } else if (n
& 0x08) {
3079 n
= TARGET_FPE_FLTRES
;
3081 /* ??? Quantum exception; BFP, DFP error. */
3089 fprintf(stderr
, "Unhandled program exception: %#x\n", n
);
3090 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3096 addr
= env
->psw
.addr
;
3098 info
.si_signo
= sig
;
3101 info
._sifields
._sigfault
._addr
= addr
;
3102 queue_signal(env
, info
.si_signo
, &info
);
3106 fprintf(stderr
, "Unhandled trap: 0x%x\n", trapnr
);
3107 cpu_dump_state(cs
, stderr
, fprintf
, 0);
3110 process_pending_signals (env
);
3114 #endif /* TARGET_S390X */
3116 THREAD CPUState
*thread_cpu
;
3118 void task_settid(TaskState
*ts
)
3120 if (ts
->ts_tid
== 0) {
3121 ts
->ts_tid
= (pid_t
)syscall(SYS_gettid
);
3125 void stop_all_tasks(void)
3128 * We trust that when using NPTL, start_exclusive()
3129 * handles thread stopping correctly.
3134 /* Assumes contents are already zeroed. */
3135 void init_task_state(TaskState
*ts
)
3140 ts
->first_free
= ts
->sigqueue_table
;
3141 for (i
= 0; i
< MAX_SIGQUEUE_SIZE
- 1; i
++) {
3142 ts
->sigqueue_table
[i
].next
= &ts
->sigqueue_table
[i
+ 1];
3144 ts
->sigqueue_table
[i
].next
= NULL
;
3147 static void handle_arg_help(const char *arg
)
3152 static void handle_arg_log(const char *arg
)
3156 mask
= qemu_str_to_log_mask(arg
);
3158 qemu_print_log_usage(stdout
);
3164 static void handle_arg_log_filename(const char *arg
)
3166 qemu_set_log_filename(arg
);
3169 static void handle_arg_set_env(const char *arg
)
3171 char *r
, *p
, *token
;
3172 r
= p
= strdup(arg
);
3173 while ((token
= strsep(&p
, ",")) != NULL
) {
3174 if (envlist_setenv(envlist
, token
) != 0) {
3181 static void handle_arg_unset_env(const char *arg
)
3183 char *r
, *p
, *token
;
3184 r
= p
= strdup(arg
);
3185 while ((token
= strsep(&p
, ",")) != NULL
) {
3186 if (envlist_unsetenv(envlist
, token
) != 0) {
3193 static void handle_arg_argv0(const char *arg
)
3195 argv0
= strdup(arg
);
3198 static void handle_arg_stack_size(const char *arg
)
3201 guest_stack_size
= strtoul(arg
, &p
, 0);
3202 if (guest_stack_size
== 0) {
3207 guest_stack_size
*= 1024 * 1024;
3208 } else if (*p
== 'k' || *p
== 'K') {
3209 guest_stack_size
*= 1024;
3213 static void handle_arg_ld_prefix(const char *arg
)
3215 interp_prefix
= strdup(arg
);
3218 static void handle_arg_pagesize(const char *arg
)
3220 qemu_host_page_size
= atoi(arg
);
3221 if (qemu_host_page_size
== 0 ||
3222 (qemu_host_page_size
& (qemu_host_page_size
- 1)) != 0) {
3223 fprintf(stderr
, "page size must be a power of two\n");
3228 static void handle_arg_gdb(const char *arg
)
3230 gdbstub_port
= atoi(arg
);
3233 static void handle_arg_uname(const char *arg
)
3235 qemu_uname_release
= strdup(arg
);
3238 static void handle_arg_cpu(const char *arg
)
3240 cpu_model
= strdup(arg
);
3241 if (cpu_model
== NULL
|| is_help_option(cpu_model
)) {
3242 /* XXX: implement xxx_cpu_list for targets that still miss it */
3243 #if defined(cpu_list)
3244 cpu_list(stdout
, &fprintf
);
3250 #if defined(CONFIG_USE_GUEST_BASE)
3251 static void handle_arg_guest_base(const char *arg
)
3253 guest_base
= strtol(arg
, NULL
, 0);
3254 have_guest_base
= 1;
3257 static void handle_arg_reserved_va(const char *arg
)
3261 reserved_va
= strtoul(arg
, &p
, 0);
3275 unsigned long unshifted
= reserved_va
;
3277 reserved_va
<<= shift
;
3278 if (((reserved_va
>> shift
) != unshifted
)
3279 #if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
3280 || (reserved_va
> (1ul << TARGET_VIRT_ADDR_SPACE_BITS
))
3283 fprintf(stderr
, "Reserved virtual address too big\n");
3288 fprintf(stderr
, "Unrecognised -R size suffix '%s'\n", p
);
3294 static void handle_arg_singlestep(const char *arg
)
3299 static void handle_arg_strace(const char *arg
)
3304 static void handle_arg_version(const char *arg
)
3306 printf("qemu-" TARGET_NAME
" version " QEMU_VERSION QEMU_PKGVERSION
3307 ", Copyright (c) 2003-2008 Fabrice Bellard\n");
3311 struct qemu_argument
{
3315 void (*handle_opt
)(const char *arg
);
3316 const char *example
;
3320 static const struct qemu_argument arg_table
[] = {
3321 {"h", "", false, handle_arg_help
,
3322 "", "print this help"},
3323 {"g", "QEMU_GDB", true, handle_arg_gdb
,
3324 "port", "wait gdb connection to 'port'"},
3325 {"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix
,
3326 "path", "set the elf interpreter prefix to 'path'"},
3327 {"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size
,
3328 "size", "set the stack size to 'size' bytes"},
3329 {"cpu", "QEMU_CPU", true, handle_arg_cpu
,
3330 "model", "select CPU (-cpu help for list)"},
3331 {"E", "QEMU_SET_ENV", true, handle_arg_set_env
,
3332 "var=value", "sets targets environment variable (see below)"},
3333 {"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env
,
3334 "var", "unsets targets environment variable (see below)"},
3335 {"0", "QEMU_ARGV0", true, handle_arg_argv0
,
3336 "argv0", "forces target process argv[0] to be 'argv0'"},
3337 {"r", "QEMU_UNAME", true, handle_arg_uname
,
3338 "uname", "set qemu uname release string to 'uname'"},
3339 #if defined(CONFIG_USE_GUEST_BASE)
3340 {"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base
,
3341 "address", "set guest_base address to 'address'"},
3342 {"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va
,
3343 "size", "reserve 'size' bytes for guest virtual address space"},
3345 {"d", "QEMU_LOG", true, handle_arg_log
,
3346 "item[,...]", "enable logging of specified items "
3347 "(use '-d help' for a list of items)"},
3348 {"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename
,
3349 "logfile", "write logs to 'logfile' (default stderr)"},
3350 {"p", "QEMU_PAGESIZE", true, handle_arg_pagesize
,
3351 "pagesize", "set the host page size to 'pagesize'"},
3352 {"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep
,
3353 "", "run in singlestep mode"},
3354 {"strace", "QEMU_STRACE", false, handle_arg_strace
,
3355 "", "log system calls"},
3356 {"version", "QEMU_VERSION", false, handle_arg_version
,
3357 "", "display version information and exit"},
3358 {NULL
, NULL
, false, NULL
, NULL
, NULL
}
3361 static void usage(void)
3363 const struct qemu_argument
*arginfo
;
3367 printf("usage: qemu-" TARGET_NAME
" [options] program [arguments...]\n"
3368 "Linux CPU emulator (compiled for " TARGET_NAME
" emulation)\n"
3370 "Options and associated environment variables:\n"
3373 /* Calculate column widths. We must always have at least enough space
3374 * for the column header.
3376 maxarglen
= strlen("Argument");
3377 maxenvlen
= strlen("Env-variable");
3379 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3380 int arglen
= strlen(arginfo
->argv
);
3381 if (arginfo
->has_arg
) {
3382 arglen
+= strlen(arginfo
->example
) + 1;
3384 if (strlen(arginfo
->env
) > maxenvlen
) {
3385 maxenvlen
= strlen(arginfo
->env
);
3387 if (arglen
> maxarglen
) {
3392 printf("%-*s %-*s Description\n", maxarglen
+1, "Argument",
3393 maxenvlen
, "Env-variable");
3395 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3396 if (arginfo
->has_arg
) {
3397 printf("-%s %-*s %-*s %s\n", arginfo
->argv
,
3398 (int)(maxarglen
- strlen(arginfo
->argv
) - 1),
3399 arginfo
->example
, maxenvlen
, arginfo
->env
, arginfo
->help
);
3401 printf("-%-*s %-*s %s\n", maxarglen
, arginfo
->argv
,
3402 maxenvlen
, arginfo
->env
,
3409 "QEMU_LD_PREFIX = %s\n"
3410 "QEMU_STACK_SIZE = %ld byte\n",
3415 "You can use -E and -U options or the QEMU_SET_ENV and\n"
3416 "QEMU_UNSET_ENV environment variables to set and unset\n"
3417 "environment variables for the target process.\n"
3418 "It is possible to provide several variables by separating them\n"
3419 "by commas in getsubopt(3) style. Additionally it is possible to\n"
3420 "provide the -E and -U options multiple times.\n"
3421 "The following lines are equivalent:\n"
3422 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
3423 " -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n"
3424 " QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n"
3425 "Note that if you provide several changes to a single variable\n"
3426 "the last change will stay in effect.\n");
3431 static int parse_args(int argc
, char **argv
)
3435 const struct qemu_argument
*arginfo
;
3437 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3438 if (arginfo
->env
== NULL
) {
3442 r
= getenv(arginfo
->env
);
3444 arginfo
->handle_opt(r
);
3450 if (optind
>= argc
) {
3459 if (!strcmp(r
, "-")) {
3463 for (arginfo
= arg_table
; arginfo
->handle_opt
!= NULL
; arginfo
++) {
3464 if (!strcmp(r
, arginfo
->argv
)) {
3465 if (arginfo
->has_arg
) {
3466 if (optind
>= argc
) {
3469 arginfo
->handle_opt(argv
[optind
]);
3472 arginfo
->handle_opt(NULL
);
3478 /* no option matched the current argv */
3479 if (arginfo
->handle_opt
== NULL
) {
3484 if (optind
>= argc
) {
3488 filename
= argv
[optind
];
3489 exec_path
= argv
[optind
];
3494 int main(int argc
, char **argv
, char **envp
)
3496 struct target_pt_regs regs1
, *regs
= ®s1
;
3497 struct image_info info1
, *info
= &info1
;
3498 struct linux_binprm bprm
;
3502 char **target_environ
, **wrk
;
3508 module_call_init(MODULE_INIT_QOM
);
3510 qemu_cache_utils_init(envp
);
3512 if ((envlist
= envlist_create()) == NULL
) {
3513 (void) fprintf(stderr
, "Unable to allocate envlist\n");
3517 /* add current environment into the list */
3518 for (wrk
= environ
; *wrk
!= NULL
; wrk
++) {
3519 (void) envlist_setenv(envlist
, *wrk
);
3522 /* Read the stack limit from the kernel. If it's "unlimited",
3523 then we can do little else besides use the default. */
3526 if (getrlimit(RLIMIT_STACK
, &lim
) == 0
3527 && lim
.rlim_cur
!= RLIM_INFINITY
3528 && lim
.rlim_cur
== (target_long
)lim
.rlim_cur
) {
3529 guest_stack_size
= lim
.rlim_cur
;
3534 #if defined(cpudef_setup)
3535 cpudef_setup(); /* parse cpu definitions in target config file (TBD) */
3538 optind
= parse_args(argc
, argv
);
3541 memset(regs
, 0, sizeof(struct target_pt_regs
));
3543 /* Zero out image_info */
3544 memset(info
, 0, sizeof(struct image_info
));
3546 memset(&bprm
, 0, sizeof (bprm
));
3548 /* Scan interp_prefix dir for replacement files. */
3549 init_paths(interp_prefix
);
3551 if (cpu_model
== NULL
) {
3552 #if defined(TARGET_I386)
3553 #ifdef TARGET_X86_64
3554 cpu_model
= "qemu64";
3556 cpu_model
= "qemu32";
3558 #elif defined(TARGET_ARM)
3560 #elif defined(TARGET_UNICORE32)
3562 #elif defined(TARGET_M68K)
3564 #elif defined(TARGET_SPARC)
3565 #ifdef TARGET_SPARC64
3566 cpu_model
= "TI UltraSparc II";
3568 cpu_model
= "Fujitsu MB86904";
3570 #elif defined(TARGET_MIPS)
3571 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
3576 #elif defined TARGET_OPENRISC
3577 cpu_model
= "or1200";
3578 #elif defined(TARGET_PPC)
3580 cpu_model
= "970fx";
3589 cpu_exec_init_all();
3590 /* NOTE: we need to init the CPU at this stage to get
3591 qemu_host_page_size */
3592 env
= cpu_init(cpu_model
);
3594 fprintf(stderr
, "Unable to find CPU definition\n");
3597 cpu_reset(ENV_GET_CPU(env
));
3599 thread_cpu
= ENV_GET_CPU(env
);
3601 if (getenv("QEMU_STRACE")) {
3605 target_environ
= envlist_to_environ(envlist
, NULL
);
3606 envlist_free(envlist
);
3608 #if defined(CONFIG_USE_GUEST_BASE)
3610 * Now that page sizes are configured in cpu_init() we can do
3611 * proper page alignment for guest_base.
3613 guest_base
= HOST_PAGE_ALIGN(guest_base
);
3615 if (reserved_va
|| have_guest_base
) {
3616 guest_base
= init_guest_space(guest_base
, reserved_va
, 0,
3618 if (guest_base
== (unsigned long)-1) {
3619 fprintf(stderr
, "Unable to reserve 0x%lx bytes of virtual address "
3620 "space for use as guest address space (check your virtual "
3621 "memory ulimit setting or reserve less using -R option)\n",
3627 mmap_next_start
= reserved_va
;
3630 #endif /* CONFIG_USE_GUEST_BASE */
3633 * Read in mmap_min_addr kernel parameter. This value is used
3634 * When loading the ELF image to determine whether guest_base
3635 * is needed. It is also used in mmap_find_vma.
3640 if ((fp
= fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL
) {
3642 if (fscanf(fp
, "%lu", &tmp
) == 1) {
3643 mmap_min_addr
= tmp
;
3644 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr
);
3651 * Prepare copy of argv vector for target.
3653 target_argc
= argc
- optind
;
3654 target_argv
= calloc(target_argc
+ 1, sizeof (char *));
3655 if (target_argv
== NULL
) {
3656 (void) fprintf(stderr
, "Unable to allocate memory for target_argv\n");
3661 * If argv0 is specified (using '-0' switch) we replace
3662 * argv[0] pointer with the given one.
3665 if (argv0
!= NULL
) {
3666 target_argv
[i
++] = strdup(argv0
);
3668 for (; i
< target_argc
; i
++) {
3669 target_argv
[i
] = strdup(argv
[optind
+ i
]);
3671 target_argv
[target_argc
] = NULL
;
3673 ts
= g_malloc0 (sizeof(TaskState
));
3674 init_task_state(ts
);
3675 /* build Task State */
3681 ret
= loader_exec(filename
, target_argv
, target_environ
, regs
,
3684 printf("Error while loading %s: %s\n", filename
, strerror(-ret
));
3688 for (wrk
= target_environ
; *wrk
; wrk
++) {
3692 free(target_environ
);
3694 if (qemu_log_enabled()) {
3695 #if defined(CONFIG_USE_GUEST_BASE)
3696 qemu_log("guest_base 0x%lx\n", guest_base
);
3700 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx
"\n", info
->start_brk
);
3701 qemu_log("end_code 0x" TARGET_ABI_FMT_lx
"\n", info
->end_code
);
3702 qemu_log("start_code 0x" TARGET_ABI_FMT_lx
"\n",
3704 qemu_log("start_data 0x" TARGET_ABI_FMT_lx
"\n",
3706 qemu_log("end_data 0x" TARGET_ABI_FMT_lx
"\n", info
->end_data
);
3707 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx
"\n",
3709 qemu_log("brk 0x" TARGET_ABI_FMT_lx
"\n", info
->brk
);
3710 qemu_log("entry 0x" TARGET_ABI_FMT_lx
"\n", info
->entry
);
3713 target_set_brk(info
->brk
);
3717 #if defined(CONFIG_USE_GUEST_BASE)
3718 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
3719 generating the prologue until now so that the prologue can take
3720 the real value of GUEST_BASE into account. */
3721 tcg_prologue_init(&tcg_ctx
);
3724 #if defined(TARGET_I386)
3725 cpu_x86_set_cpl(env
, 3);
3727 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
3728 env
->hflags
|= HF_PE_MASK
;
3729 if (env
->features
[FEAT_1_EDX
] & CPUID_SSE
) {
3730 env
->cr
[4] |= CR4_OSFXSR_MASK
;
3731 env
->hflags
|= HF_OSFXSR_MASK
;
3733 #ifndef TARGET_ABI32
3734 /* enable 64 bit mode if possible */
3735 if (!(env
->features
[FEAT_8000_0001_EDX
] & CPUID_EXT2_LM
)) {
3736 fprintf(stderr
, "The selected x86 CPU does not support 64 bit mode\n");
3739 env
->cr
[4] |= CR4_PAE_MASK
;
3740 env
->efer
|= MSR_EFER_LMA
| MSR_EFER_LME
;
3741 env
->hflags
|= HF_LMA_MASK
;
3744 /* flags setup : we activate the IRQs by default as in user mode */
3745 env
->eflags
|= IF_MASK
;
3747 /* linux register setup */
3748 #ifndef TARGET_ABI32
3749 env
->regs
[R_EAX
] = regs
->rax
;
3750 env
->regs
[R_EBX
] = regs
->rbx
;
3751 env
->regs
[R_ECX
] = regs
->rcx
;
3752 env
->regs
[R_EDX
] = regs
->rdx
;
3753 env
->regs
[R_ESI
] = regs
->rsi
;
3754 env
->regs
[R_EDI
] = regs
->rdi
;
3755 env
->regs
[R_EBP
] = regs
->rbp
;
3756 env
->regs
[R_ESP
] = regs
->rsp
;
3757 env
->eip
= regs
->rip
;
3759 env
->regs
[R_EAX
] = regs
->eax
;
3760 env
->regs
[R_EBX
] = regs
->ebx
;
3761 env
->regs
[R_ECX
] = regs
->ecx
;
3762 env
->regs
[R_EDX
] = regs
->edx
;
3763 env
->regs
[R_ESI
] = regs
->esi
;
3764 env
->regs
[R_EDI
] = regs
->edi
;
3765 env
->regs
[R_EBP
] = regs
->ebp
;
3766 env
->regs
[R_ESP
] = regs
->esp
;
3767 env
->eip
= regs
->eip
;
3770 /* linux interrupt setup */
3771 #ifndef TARGET_ABI32
3772 env
->idt
.limit
= 511;
3774 env
->idt
.limit
= 255;
3776 env
->idt
.base
= target_mmap(0, sizeof(uint64_t) * (env
->idt
.limit
+ 1),
3777 PROT_READ
|PROT_WRITE
,
3778 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
3779 idt_table
= g2h(env
->idt
.base
);
3802 /* linux segment setup */
3804 uint64_t *gdt_table
;
3805 env
->gdt
.base
= target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES
,
3806 PROT_READ
|PROT_WRITE
,
3807 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
3808 env
->gdt
.limit
= sizeof(uint64_t) * TARGET_GDT_ENTRIES
- 1;
3809 gdt_table
= g2h(env
->gdt
.base
);
3811 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
3812 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3813 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
3815 /* 64 bit code segment */
3816 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
3817 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3819 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
3821 write_dt(&gdt_table
[__USER_DS
>> 3], 0, 0xfffff,
3822 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
3823 (3 << DESC_DPL_SHIFT
) | (0x2 << DESC_TYPE_SHIFT
));
3825 cpu_x86_load_seg(env
, R_CS
, __USER_CS
);
3826 cpu_x86_load_seg(env
, R_SS
, __USER_DS
);
3828 cpu_x86_load_seg(env
, R_DS
, __USER_DS
);
3829 cpu_x86_load_seg(env
, R_ES
, __USER_DS
);
3830 cpu_x86_load_seg(env
, R_FS
, __USER_DS
);
3831 cpu_x86_load_seg(env
, R_GS
, __USER_DS
);
3832 /* This hack makes Wine work... */
3833 env
->segs
[R_FS
].selector
= 0;
3835 cpu_x86_load_seg(env
, R_DS
, 0);
3836 cpu_x86_load_seg(env
, R_ES
, 0);
3837 cpu_x86_load_seg(env
, R_FS
, 0);
3838 cpu_x86_load_seg(env
, R_GS
, 0);
3840 #elif defined(TARGET_ARM)
3843 cpsr_write(env
, regs
->uregs
[16], 0xffffffff);
3844 for(i
= 0; i
< 16; i
++) {
3845 env
->regs
[i
] = regs
->uregs
[i
];
3848 if (EF_ARM_EABI_VERSION(info
->elf_flags
) >= EF_ARM_EABI_VER4
3849 && (info
->elf_flags
& EF_ARM_BE8
)) {
3850 env
->bswap_code
= 1;
3853 #elif defined(TARGET_UNICORE32)
3856 cpu_asr_write(env
, regs
->uregs
[32], 0xffffffff);
3857 for (i
= 0; i
< 32; i
++) {
3858 env
->regs
[i
] = regs
->uregs
[i
];
3861 #elif defined(TARGET_SPARC)
3865 env
->npc
= regs
->npc
;
3867 for(i
= 0; i
< 8; i
++)
3868 env
->gregs
[i
] = regs
->u_regs
[i
];
3869 for(i
= 0; i
< 8; i
++)
3870 env
->regwptr
[i
] = regs
->u_regs
[i
+ 8];
3872 #elif defined(TARGET_PPC)
3876 #if defined(TARGET_PPC64)
3877 #if defined(TARGET_ABI32)
3878 env
->msr
&= ~((target_ulong
)1 << MSR_SF
);
3880 env
->msr
|= (target_ulong
)1 << MSR_SF
;
3883 env
->nip
= regs
->nip
;
3884 for(i
= 0; i
< 32; i
++) {
3885 env
->gpr
[i
] = regs
->gpr
[i
];
3888 #elif defined(TARGET_M68K)
3891 env
->dregs
[0] = regs
->d0
;
3892 env
->dregs
[1] = regs
->d1
;
3893 env
->dregs
[2] = regs
->d2
;
3894 env
->dregs
[3] = regs
->d3
;
3895 env
->dregs
[4] = regs
->d4
;
3896 env
->dregs
[5] = regs
->d5
;
3897 env
->dregs
[6] = regs
->d6
;
3898 env
->dregs
[7] = regs
->d7
;
3899 env
->aregs
[0] = regs
->a0
;
3900 env
->aregs
[1] = regs
->a1
;
3901 env
->aregs
[2] = regs
->a2
;
3902 env
->aregs
[3] = regs
->a3
;
3903 env
->aregs
[4] = regs
->a4
;
3904 env
->aregs
[5] = regs
->a5
;
3905 env
->aregs
[6] = regs
->a6
;
3906 env
->aregs
[7] = regs
->usp
;
3908 ts
->sim_syscalls
= 1;
3910 #elif defined(TARGET_MICROBLAZE)
3912 env
->regs
[0] = regs
->r0
;
3913 env
->regs
[1] = regs
->r1
;
3914 env
->regs
[2] = regs
->r2
;
3915 env
->regs
[3] = regs
->r3
;
3916 env
->regs
[4] = regs
->r4
;
3917 env
->regs
[5] = regs
->r5
;
3918 env
->regs
[6] = regs
->r6
;
3919 env
->regs
[7] = regs
->r7
;
3920 env
->regs
[8] = regs
->r8
;
3921 env
->regs
[9] = regs
->r9
;
3922 env
->regs
[10] = regs
->r10
;
3923 env
->regs
[11] = regs
->r11
;
3924 env
->regs
[12] = regs
->r12
;
3925 env
->regs
[13] = regs
->r13
;
3926 env
->regs
[14] = regs
->r14
;
3927 env
->regs
[15] = regs
->r15
;
3928 env
->regs
[16] = regs
->r16
;
3929 env
->regs
[17] = regs
->r17
;
3930 env
->regs
[18] = regs
->r18
;
3931 env
->regs
[19] = regs
->r19
;
3932 env
->regs
[20] = regs
->r20
;
3933 env
->regs
[21] = regs
->r21
;
3934 env
->regs
[22] = regs
->r22
;
3935 env
->regs
[23] = regs
->r23
;
3936 env
->regs
[24] = regs
->r24
;
3937 env
->regs
[25] = regs
->r25
;
3938 env
->regs
[26] = regs
->r26
;
3939 env
->regs
[27] = regs
->r27
;
3940 env
->regs
[28] = regs
->r28
;
3941 env
->regs
[29] = regs
->r29
;
3942 env
->regs
[30] = regs
->r30
;
3943 env
->regs
[31] = regs
->r31
;
3944 env
->sregs
[SR_PC
] = regs
->pc
;
3946 #elif defined(TARGET_MIPS)
3950 for(i
= 0; i
< 32; i
++) {
3951 env
->active_tc
.gpr
[i
] = regs
->regs
[i
];
3953 env
->active_tc
.PC
= regs
->cp0_epc
& ~(target_ulong
)1;
3954 if (regs
->cp0_epc
& 1) {
3955 env
->hflags
|= MIPS_HFLAG_M16
;
3958 #elif defined(TARGET_OPENRISC)
3962 for (i
= 0; i
< 32; i
++) {
3963 env
->gpr
[i
] = regs
->gpr
[i
];
3969 #elif defined(TARGET_SH4)
3973 for(i
= 0; i
< 16; i
++) {
3974 env
->gregs
[i
] = regs
->regs
[i
];
3978 #elif defined(TARGET_ALPHA)
3982 for(i
= 0; i
< 28; i
++) {
3983 env
->ir
[i
] = ((abi_ulong
*)regs
)[i
];
3985 env
->ir
[IR_SP
] = regs
->usp
;
3988 #elif defined(TARGET_CRIS)
3990 env
->regs
[0] = regs
->r0
;
3991 env
->regs
[1] = regs
->r1
;
3992 env
->regs
[2] = regs
->r2
;
3993 env
->regs
[3] = regs
->r3
;
3994 env
->regs
[4] = regs
->r4
;
3995 env
->regs
[5] = regs
->r5
;
3996 env
->regs
[6] = regs
->r6
;
3997 env
->regs
[7] = regs
->r7
;
3998 env
->regs
[8] = regs
->r8
;
3999 env
->regs
[9] = regs
->r9
;
4000 env
->regs
[10] = regs
->r10
;
4001 env
->regs
[11] = regs
->r11
;
4002 env
->regs
[12] = regs
->r12
;
4003 env
->regs
[13] = regs
->r13
;
4004 env
->regs
[14] = info
->start_stack
;
4005 env
->regs
[15] = regs
->acr
;
4006 env
->pc
= regs
->erp
;
4008 #elif defined(TARGET_S390X)
4011 for (i
= 0; i
< 16; i
++) {
4012 env
->regs
[i
] = regs
->gprs
[i
];
4014 env
->psw
.mask
= regs
->psw
.mask
;
4015 env
->psw
.addr
= regs
->psw
.addr
;
4018 #error unsupported target CPU
4021 #if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
4022 ts
->stack_base
= info
->start_stack
;
4023 ts
->heap_base
= info
->brk
;
4024 /* This will be filled in on the first SYS_HEAPINFO call. */
4029 if (gdbserver_start(gdbstub_port
) < 0) {
4030 fprintf(stderr
, "qemu: could not open gdbserver on port %d\n",
4034 gdb_handlesig(env
, 0);