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memory: remove memory_region_set_offset()
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1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "memory.h"
17 #include "exec-memory.h"
18 #include "ioport.h"
19 #include "bitops.h"
20 #include "kvm.h"
21 #include <assert.h>
22
23 #define WANT_EXEC_OBSOLETE
24 #include "exec-obsolete.h"
25
26 unsigned memory_region_transaction_depth = 0;
27 static bool memory_region_update_pending = false;
28 static bool global_dirty_log = false;
29
30 static QLIST_HEAD(, MemoryListener) memory_listeners
31 = QLIST_HEAD_INITIALIZER(memory_listeners);
32
33 typedef struct AddrRange AddrRange;
34
35 /*
36 * Note using signed integers limits us to physical addresses at most
37 * 63 bits wide. They are needed for negative offsetting in aliases
38 * (large MemoryRegion::alias_offset).
39 */
40 struct AddrRange {
41 Int128 start;
42 Int128 size;
43 };
44
45 static AddrRange addrrange_make(Int128 start, Int128 size)
46 {
47 return (AddrRange) { start, size };
48 }
49
50 static bool addrrange_equal(AddrRange r1, AddrRange r2)
51 {
52 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
53 }
54
55 static Int128 addrrange_end(AddrRange r)
56 {
57 return int128_add(r.start, r.size);
58 }
59
60 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
61 {
62 int128_addto(&range.start, delta);
63 return range;
64 }
65
66 static bool addrrange_contains(AddrRange range, Int128 addr)
67 {
68 return int128_ge(addr, range.start)
69 && int128_lt(addr, addrrange_end(range));
70 }
71
72 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
73 {
74 return addrrange_contains(r1, r2.start)
75 || addrrange_contains(r2, r1.start);
76 }
77
78 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
79 {
80 Int128 start = int128_max(r1.start, r2.start);
81 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
82 return addrrange_make(start, int128_sub(end, start));
83 }
84
85 struct CoalescedMemoryRange {
86 AddrRange addr;
87 QTAILQ_ENTRY(CoalescedMemoryRange) link;
88 };
89
90 struct MemoryRegionIoeventfd {
91 AddrRange addr;
92 bool match_data;
93 uint64_t data;
94 int fd;
95 };
96
97 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
98 MemoryRegionIoeventfd b)
99 {
100 if (int128_lt(a.addr.start, b.addr.start)) {
101 return true;
102 } else if (int128_gt(a.addr.start, b.addr.start)) {
103 return false;
104 } else if (int128_lt(a.addr.size, b.addr.size)) {
105 return true;
106 } else if (int128_gt(a.addr.size, b.addr.size)) {
107 return false;
108 } else if (a.match_data < b.match_data) {
109 return true;
110 } else if (a.match_data > b.match_data) {
111 return false;
112 } else if (a.match_data) {
113 if (a.data < b.data) {
114 return true;
115 } else if (a.data > b.data) {
116 return false;
117 }
118 }
119 if (a.fd < b.fd) {
120 return true;
121 } else if (a.fd > b.fd) {
122 return false;
123 }
124 return false;
125 }
126
127 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
128 MemoryRegionIoeventfd b)
129 {
130 return !memory_region_ioeventfd_before(a, b)
131 && !memory_region_ioeventfd_before(b, a);
132 }
133
134 typedef struct FlatRange FlatRange;
135 typedef struct FlatView FlatView;
136
137 /* Range of memory in the global map. Addresses are absolute. */
138 struct FlatRange {
139 MemoryRegion *mr;
140 target_phys_addr_t offset_in_region;
141 AddrRange addr;
142 uint8_t dirty_log_mask;
143 bool readable;
144 bool readonly;
145 };
146
147 /* Flattened global view of current active memory hierarchy. Kept in sorted
148 * order.
149 */
150 struct FlatView {
151 FlatRange *ranges;
152 unsigned nr;
153 unsigned nr_allocated;
154 };
155
156 typedef struct AddressSpace AddressSpace;
157 typedef struct AddressSpaceOps AddressSpaceOps;
158
159 /* A system address space - I/O, memory, etc. */
160 struct AddressSpace {
161 const AddressSpaceOps *ops;
162 MemoryRegion *root;
163 FlatView current_map;
164 int ioeventfd_nb;
165 MemoryRegionIoeventfd *ioeventfds;
166 };
167
168 struct AddressSpaceOps {
169 void (*range_add)(AddressSpace *as, FlatRange *fr);
170 void (*range_del)(AddressSpace *as, FlatRange *fr);
171 void (*log_start)(AddressSpace *as, FlatRange *fr);
172 void (*log_stop)(AddressSpace *as, FlatRange *fr);
173 void (*ioeventfd_add)(AddressSpace *as, MemoryRegionIoeventfd *fd);
174 void (*ioeventfd_del)(AddressSpace *as, MemoryRegionIoeventfd *fd);
175 };
176
177 #define FOR_EACH_FLAT_RANGE(var, view) \
178 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
179
180 static bool flatrange_equal(FlatRange *a, FlatRange *b)
181 {
182 return a->mr == b->mr
183 && addrrange_equal(a->addr, b->addr)
184 && a->offset_in_region == b->offset_in_region
185 && a->readable == b->readable
186 && a->readonly == b->readonly;
187 }
188
189 static void flatview_init(FlatView *view)
190 {
191 view->ranges = NULL;
192 view->nr = 0;
193 view->nr_allocated = 0;
194 }
195
196 /* Insert a range into a given position. Caller is responsible for maintaining
197 * sorting order.
198 */
199 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
200 {
201 if (view->nr == view->nr_allocated) {
202 view->nr_allocated = MAX(2 * view->nr, 10);
203 view->ranges = g_realloc(view->ranges,
204 view->nr_allocated * sizeof(*view->ranges));
205 }
206 memmove(view->ranges + pos + 1, view->ranges + pos,
207 (view->nr - pos) * sizeof(FlatRange));
208 view->ranges[pos] = *range;
209 ++view->nr;
210 }
211
212 static void flatview_destroy(FlatView *view)
213 {
214 g_free(view->ranges);
215 }
216
217 static bool can_merge(FlatRange *r1, FlatRange *r2)
218 {
219 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
220 && r1->mr == r2->mr
221 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
222 r1->addr.size),
223 int128_make64(r2->offset_in_region))
224 && r1->dirty_log_mask == r2->dirty_log_mask
225 && r1->readable == r2->readable
226 && r1->readonly == r2->readonly;
227 }
228
229 /* Attempt to simplify a view by merging ajacent ranges */
230 static void flatview_simplify(FlatView *view)
231 {
232 unsigned i, j;
233
234 i = 0;
235 while (i < view->nr) {
236 j = i + 1;
237 while (j < view->nr
238 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
239 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
240 ++j;
241 }
242 ++i;
243 memmove(&view->ranges[i], &view->ranges[j],
244 (view->nr - j) * sizeof(view->ranges[j]));
245 view->nr -= j - i;
246 }
247 }
248
249 static void memory_region_read_accessor(void *opaque,
250 target_phys_addr_t addr,
251 uint64_t *value,
252 unsigned size,
253 unsigned shift,
254 uint64_t mask)
255 {
256 MemoryRegion *mr = opaque;
257 uint64_t tmp;
258
259 tmp = mr->ops->read(mr->opaque, addr, size);
260 *value |= (tmp & mask) << shift;
261 }
262
263 static void memory_region_write_accessor(void *opaque,
264 target_phys_addr_t addr,
265 uint64_t *value,
266 unsigned size,
267 unsigned shift,
268 uint64_t mask)
269 {
270 MemoryRegion *mr = opaque;
271 uint64_t tmp;
272
273 tmp = (*value >> shift) & mask;
274 mr->ops->write(mr->opaque, addr, tmp, size);
275 }
276
277 static void access_with_adjusted_size(target_phys_addr_t addr,
278 uint64_t *value,
279 unsigned size,
280 unsigned access_size_min,
281 unsigned access_size_max,
282 void (*access)(void *opaque,
283 target_phys_addr_t addr,
284 uint64_t *value,
285 unsigned size,
286 unsigned shift,
287 uint64_t mask),
288 void *opaque)
289 {
290 uint64_t access_mask;
291 unsigned access_size;
292 unsigned i;
293
294 if (!access_size_min) {
295 access_size_min = 1;
296 }
297 if (!access_size_max) {
298 access_size_max = 4;
299 }
300 access_size = MAX(MIN(size, access_size_max), access_size_min);
301 access_mask = -1ULL >> (64 - access_size * 8);
302 for (i = 0; i < size; i += access_size) {
303 /* FIXME: big-endian support */
304 access(opaque, addr + i, value, access_size, i * 8, access_mask);
305 }
306 }
307
308 static void as_memory_range_add(AddressSpace *as, FlatRange *fr)
309 {
310 MemoryRegionSection section = {
311 .mr = fr->mr,
312 .offset_within_address_space = int128_get64(fr->addr.start),
313 .offset_within_region = fr->offset_in_region,
314 .size = int128_get64(fr->addr.size),
315 };
316
317 cpu_register_physical_memory_log(&section, fr->readable, fr->readonly);
318 }
319
320 static void as_memory_range_del(AddressSpace *as, FlatRange *fr)
321 {
322 MemoryRegionSection section = {
323 .mr = &io_mem_unassigned,
324 .offset_within_address_space = int128_get64(fr->addr.start),
325 .offset_within_region = int128_get64(fr->addr.start),
326 .size = int128_get64(fr->addr.size),
327 };
328
329 cpu_register_physical_memory_log(&section, true, false);
330 }
331
332 static void as_memory_log_start(AddressSpace *as, FlatRange *fr)
333 {
334 }
335
336 static void as_memory_log_stop(AddressSpace *as, FlatRange *fr)
337 {
338 }
339
340 static void as_memory_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
341 {
342 int r;
343
344 assert(fd->match_data && int128_get64(fd->addr.size) == 4);
345
346 r = kvm_set_ioeventfd_mmio_long(fd->fd, int128_get64(fd->addr.start),
347 fd->data, true);
348 if (r < 0) {
349 abort();
350 }
351 }
352
353 static void as_memory_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
354 {
355 int r;
356
357 r = kvm_set_ioeventfd_mmio_long(fd->fd, int128_get64(fd->addr.start),
358 fd->data, false);
359 if (r < 0) {
360 abort();
361 }
362 }
363
364 static const AddressSpaceOps address_space_ops_memory = {
365 .range_add = as_memory_range_add,
366 .range_del = as_memory_range_del,
367 .log_start = as_memory_log_start,
368 .log_stop = as_memory_log_stop,
369 .ioeventfd_add = as_memory_ioeventfd_add,
370 .ioeventfd_del = as_memory_ioeventfd_del,
371 };
372
373 static AddressSpace address_space_memory = {
374 .ops = &address_space_ops_memory,
375 };
376
377 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
378 unsigned width, bool write)
379 {
380 const MemoryRegionPortio *mrp;
381
382 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
383 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
384 && width == mrp->size
385 && (write ? (bool)mrp->write : (bool)mrp->read)) {
386 return mrp;
387 }
388 }
389 return NULL;
390 }
391
392 static void memory_region_iorange_read(IORange *iorange,
393 uint64_t offset,
394 unsigned width,
395 uint64_t *data)
396 {
397 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
398
399 if (mr->ops->old_portio) {
400 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, false);
401
402 *data = ((uint64_t)1 << (width * 8)) - 1;
403 if (mrp) {
404 *data = mrp->read(mr->opaque, offset);
405 } else if (width == 2) {
406 mrp = find_portio(mr, offset, 1, false);
407 assert(mrp);
408 *data = mrp->read(mr->opaque, offset) |
409 (mrp->read(mr->opaque, offset + 1) << 8);
410 }
411 return;
412 }
413 *data = 0;
414 access_with_adjusted_size(offset, data, width,
415 mr->ops->impl.min_access_size,
416 mr->ops->impl.max_access_size,
417 memory_region_read_accessor, mr);
418 }
419
420 static void memory_region_iorange_write(IORange *iorange,
421 uint64_t offset,
422 unsigned width,
423 uint64_t data)
424 {
425 MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
426
427 if (mr->ops->old_portio) {
428 const MemoryRegionPortio *mrp = find_portio(mr, offset, width, true);
429
430 if (mrp) {
431 mrp->write(mr->opaque, offset, data);
432 } else if (width == 2) {
433 mrp = find_portio(mr, offset, 1, false);
434 assert(mrp);
435 mrp->write(mr->opaque, offset, data & 0xff);
436 mrp->write(mr->opaque, offset + 1, data >> 8);
437 }
438 return;
439 }
440 access_with_adjusted_size(offset, &data, width,
441 mr->ops->impl.min_access_size,
442 mr->ops->impl.max_access_size,
443 memory_region_write_accessor, mr);
444 }
445
446 static const IORangeOps memory_region_iorange_ops = {
447 .read = memory_region_iorange_read,
448 .write = memory_region_iorange_write,
449 };
450
451 static void as_io_range_add(AddressSpace *as, FlatRange *fr)
452 {
453 iorange_init(&fr->mr->iorange, &memory_region_iorange_ops,
454 int128_get64(fr->addr.start), int128_get64(fr->addr.size));
455 ioport_register(&fr->mr->iorange);
456 }
457
458 static void as_io_range_del(AddressSpace *as, FlatRange *fr)
459 {
460 isa_unassign_ioport(int128_get64(fr->addr.start),
461 int128_get64(fr->addr.size));
462 }
463
464 static void as_io_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
465 {
466 int r;
467
468 assert(fd->match_data && int128_get64(fd->addr.size) == 2);
469
470 r = kvm_set_ioeventfd_pio_word(fd->fd, int128_get64(fd->addr.start),
471 fd->data, true);
472 if (r < 0) {
473 abort();
474 }
475 }
476
477 static void as_io_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
478 {
479 int r;
480
481 r = kvm_set_ioeventfd_pio_word(fd->fd, int128_get64(fd->addr.start),
482 fd->data, false);
483 if (r < 0) {
484 abort();
485 }
486 }
487
488 static const AddressSpaceOps address_space_ops_io = {
489 .range_add = as_io_range_add,
490 .range_del = as_io_range_del,
491 .ioeventfd_add = as_io_ioeventfd_add,
492 .ioeventfd_del = as_io_ioeventfd_del,
493 };
494
495 static AddressSpace address_space_io = {
496 .ops = &address_space_ops_io,
497 };
498
499 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
500 {
501 while (mr->parent) {
502 mr = mr->parent;
503 }
504 if (mr == address_space_memory.root) {
505 return &address_space_memory;
506 }
507 if (mr == address_space_io.root) {
508 return &address_space_io;
509 }
510 abort();
511 }
512
513 /* Render a memory region into the global view. Ranges in @view obscure
514 * ranges in @mr.
515 */
516 static void render_memory_region(FlatView *view,
517 MemoryRegion *mr,
518 Int128 base,
519 AddrRange clip,
520 bool readonly)
521 {
522 MemoryRegion *subregion;
523 unsigned i;
524 target_phys_addr_t offset_in_region;
525 Int128 remain;
526 Int128 now;
527 FlatRange fr;
528 AddrRange tmp;
529
530 if (!mr->enabled) {
531 return;
532 }
533
534 int128_addto(&base, int128_make64(mr->addr));
535 readonly |= mr->readonly;
536
537 tmp = addrrange_make(base, mr->size);
538
539 if (!addrrange_intersects(tmp, clip)) {
540 return;
541 }
542
543 clip = addrrange_intersection(tmp, clip);
544
545 if (mr->alias) {
546 int128_subfrom(&base, int128_make64(mr->alias->addr));
547 int128_subfrom(&base, int128_make64(mr->alias_offset));
548 render_memory_region(view, mr->alias, base, clip, readonly);
549 return;
550 }
551
552 /* Render subregions in priority order. */
553 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
554 render_memory_region(view, subregion, base, clip, readonly);
555 }
556
557 if (!mr->terminates) {
558 return;
559 }
560
561 offset_in_region = int128_get64(int128_sub(clip.start, base));
562 base = clip.start;
563 remain = clip.size;
564
565 /* Render the region itself into any gaps left by the current view. */
566 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
567 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
568 continue;
569 }
570 if (int128_lt(base, view->ranges[i].addr.start)) {
571 now = int128_min(remain,
572 int128_sub(view->ranges[i].addr.start, base));
573 fr.mr = mr;
574 fr.offset_in_region = offset_in_region;
575 fr.addr = addrrange_make(base, now);
576 fr.dirty_log_mask = mr->dirty_log_mask;
577 fr.readable = mr->readable;
578 fr.readonly = readonly;
579 flatview_insert(view, i, &fr);
580 ++i;
581 int128_addto(&base, now);
582 offset_in_region += int128_get64(now);
583 int128_subfrom(&remain, now);
584 }
585 if (int128_eq(base, view->ranges[i].addr.start)) {
586 now = int128_min(remain, view->ranges[i].addr.size);
587 int128_addto(&base, now);
588 offset_in_region += int128_get64(now);
589 int128_subfrom(&remain, now);
590 }
591 }
592 if (int128_nz(remain)) {
593 fr.mr = mr;
594 fr.offset_in_region = offset_in_region;
595 fr.addr = addrrange_make(base, remain);
596 fr.dirty_log_mask = mr->dirty_log_mask;
597 fr.readable = mr->readable;
598 fr.readonly = readonly;
599 flatview_insert(view, i, &fr);
600 }
601 }
602
603 /* Render a memory topology into a list of disjoint absolute ranges. */
604 static FlatView generate_memory_topology(MemoryRegion *mr)
605 {
606 FlatView view;
607
608 flatview_init(&view);
609
610 render_memory_region(&view, mr, int128_zero(),
611 addrrange_make(int128_zero(), int128_2_64()), false);
612 flatview_simplify(&view);
613
614 return view;
615 }
616
617 static void address_space_add_del_ioeventfds(AddressSpace *as,
618 MemoryRegionIoeventfd *fds_new,
619 unsigned fds_new_nb,
620 MemoryRegionIoeventfd *fds_old,
621 unsigned fds_old_nb)
622 {
623 unsigned iold, inew;
624
625 /* Generate a symmetric difference of the old and new fd sets, adding
626 * and deleting as necessary.
627 */
628
629 iold = inew = 0;
630 while (iold < fds_old_nb || inew < fds_new_nb) {
631 if (iold < fds_old_nb
632 && (inew == fds_new_nb
633 || memory_region_ioeventfd_before(fds_old[iold],
634 fds_new[inew]))) {
635 as->ops->ioeventfd_del(as, &fds_old[iold]);
636 ++iold;
637 } else if (inew < fds_new_nb
638 && (iold == fds_old_nb
639 || memory_region_ioeventfd_before(fds_new[inew],
640 fds_old[iold]))) {
641 as->ops->ioeventfd_add(as, &fds_new[inew]);
642 ++inew;
643 } else {
644 ++iold;
645 ++inew;
646 }
647 }
648 }
649
650 static void address_space_update_ioeventfds(AddressSpace *as)
651 {
652 FlatRange *fr;
653 unsigned ioeventfd_nb = 0;
654 MemoryRegionIoeventfd *ioeventfds = NULL;
655 AddrRange tmp;
656 unsigned i;
657
658 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
659 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
660 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
661 int128_sub(fr->addr.start,
662 int128_make64(fr->offset_in_region)));
663 if (addrrange_intersects(fr->addr, tmp)) {
664 ++ioeventfd_nb;
665 ioeventfds = g_realloc(ioeventfds,
666 ioeventfd_nb * sizeof(*ioeventfds));
667 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
668 ioeventfds[ioeventfd_nb-1].addr = tmp;
669 }
670 }
671 }
672
673 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
674 as->ioeventfds, as->ioeventfd_nb);
675
676 g_free(as->ioeventfds);
677 as->ioeventfds = ioeventfds;
678 as->ioeventfd_nb = ioeventfd_nb;
679 }
680
681 typedef void ListenerCallback(MemoryListener *listener,
682 MemoryRegionSection *mrs);
683
684 /* Want "void (&MemoryListener::*callback)(const MemoryRegionSection& s)" */
685 static void memory_listener_update_region(FlatRange *fr, AddressSpace *as,
686 size_t callback_offset)
687 {
688 MemoryRegionSection section = {
689 .mr = fr->mr,
690 .address_space = as->root,
691 .offset_within_region = fr->offset_in_region,
692 .size = int128_get64(fr->addr.size),
693 .offset_within_address_space = int128_get64(fr->addr.start),
694 };
695 MemoryListener *listener;
696
697 QLIST_FOREACH(listener, &memory_listeners, link) {
698 ListenerCallback *callback
699 = *(ListenerCallback **)((void *)listener + callback_offset);
700 callback(listener, &section);
701 }
702 }
703
704 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, callback) \
705 memory_listener_update_region(fr, as, offsetof(MemoryListener, callback))
706
707 static void address_space_update_topology_pass(AddressSpace *as,
708 FlatView old_view,
709 FlatView new_view,
710 bool adding)
711 {
712 unsigned iold, inew;
713 FlatRange *frold, *frnew;
714
715 /* Generate a symmetric difference of the old and new memory maps.
716 * Kill ranges in the old map, and instantiate ranges in the new map.
717 */
718 iold = inew = 0;
719 while (iold < old_view.nr || inew < new_view.nr) {
720 if (iold < old_view.nr) {
721 frold = &old_view.ranges[iold];
722 } else {
723 frold = NULL;
724 }
725 if (inew < new_view.nr) {
726 frnew = &new_view.ranges[inew];
727 } else {
728 frnew = NULL;
729 }
730
731 if (frold
732 && (!frnew
733 || int128_lt(frold->addr.start, frnew->addr.start)
734 || (int128_eq(frold->addr.start, frnew->addr.start)
735 && !flatrange_equal(frold, frnew)))) {
736 /* In old, but (not in new, or in new but attributes changed). */
737
738 if (!adding) {
739 MEMORY_LISTENER_UPDATE_REGION(frold, as, region_del);
740 as->ops->range_del(as, frold);
741 }
742
743 ++iold;
744 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
745 /* In both (logging may have changed) */
746
747 if (adding) {
748 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
749 MEMORY_LISTENER_UPDATE_REGION(frnew, as, log_stop);
750 as->ops->log_stop(as, frnew);
751 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
752 as->ops->log_start(as, frnew);
753 MEMORY_LISTENER_UPDATE_REGION(frnew, as, log_start);
754 }
755 }
756
757 ++iold;
758 ++inew;
759 } else {
760 /* In new */
761
762 if (adding) {
763 as->ops->range_add(as, frnew);
764 MEMORY_LISTENER_UPDATE_REGION(frnew, as, region_add);
765 }
766
767 ++inew;
768 }
769 }
770 }
771
772
773 static void address_space_update_topology(AddressSpace *as)
774 {
775 FlatView old_view = as->current_map;
776 FlatView new_view = generate_memory_topology(as->root);
777
778 address_space_update_topology_pass(as, old_view, new_view, false);
779 address_space_update_topology_pass(as, old_view, new_view, true);
780
781 as->current_map = new_view;
782 flatview_destroy(&old_view);
783 address_space_update_ioeventfds(as);
784 }
785
786 static void memory_region_update_topology(MemoryRegion *mr)
787 {
788 if (memory_region_transaction_depth) {
789 memory_region_update_pending |= !mr || mr->enabled;
790 return;
791 }
792
793 if (mr && !mr->enabled) {
794 return;
795 }
796
797 if (address_space_memory.root) {
798 address_space_update_topology(&address_space_memory);
799 }
800 if (address_space_io.root) {
801 address_space_update_topology(&address_space_io);
802 }
803
804 memory_region_update_pending = false;
805 }
806
807 void memory_region_transaction_begin(void)
808 {
809 ++memory_region_transaction_depth;
810 }
811
812 void memory_region_transaction_commit(void)
813 {
814 assert(memory_region_transaction_depth);
815 --memory_region_transaction_depth;
816 if (!memory_region_transaction_depth && memory_region_update_pending) {
817 memory_region_update_topology(NULL);
818 }
819 }
820
821 static void memory_region_destructor_none(MemoryRegion *mr)
822 {
823 }
824
825 static void memory_region_destructor_ram(MemoryRegion *mr)
826 {
827 qemu_ram_free(mr->ram_addr);
828 }
829
830 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
831 {
832 qemu_ram_free_from_ptr(mr->ram_addr);
833 }
834
835 static void memory_region_destructor_iomem(MemoryRegion *mr)
836 {
837 cpu_unregister_io_memory(mr->ram_addr);
838 }
839
840 static void memory_region_destructor_rom_device(MemoryRegion *mr)
841 {
842 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
843 cpu_unregister_io_memory(mr->ram_addr & ~TARGET_PAGE_MASK);
844 }
845
846 static bool memory_region_wrong_endianness(MemoryRegion *mr)
847 {
848 #ifdef TARGET_WORDS_BIGENDIAN
849 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
850 #else
851 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
852 #endif
853 }
854
855 void memory_region_init(MemoryRegion *mr,
856 const char *name,
857 uint64_t size)
858 {
859 mr->ops = NULL;
860 mr->parent = NULL;
861 mr->size = int128_make64(size);
862 if (size == UINT64_MAX) {
863 mr->size = int128_2_64();
864 }
865 mr->addr = 0;
866 mr->subpage = false;
867 mr->enabled = true;
868 mr->terminates = false;
869 mr->ram = false;
870 mr->readable = true;
871 mr->readonly = false;
872 mr->rom_device = false;
873 mr->destructor = memory_region_destructor_none;
874 mr->priority = 0;
875 mr->may_overlap = false;
876 mr->alias = NULL;
877 QTAILQ_INIT(&mr->subregions);
878 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
879 QTAILQ_INIT(&mr->coalesced);
880 mr->name = g_strdup(name);
881 mr->dirty_log_mask = 0;
882 mr->ioeventfd_nb = 0;
883 mr->ioeventfds = NULL;
884 }
885
886 static bool memory_region_access_valid(MemoryRegion *mr,
887 target_phys_addr_t addr,
888 unsigned size,
889 bool is_write)
890 {
891 if (mr->ops->valid.accepts
892 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
893 return false;
894 }
895
896 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
897 return false;
898 }
899
900 /* Treat zero as compatibility all valid */
901 if (!mr->ops->valid.max_access_size) {
902 return true;
903 }
904
905 if (size > mr->ops->valid.max_access_size
906 || size < mr->ops->valid.min_access_size) {
907 return false;
908 }
909 return true;
910 }
911
912 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
913 target_phys_addr_t addr,
914 unsigned size)
915 {
916 uint64_t data = 0;
917
918 if (!memory_region_access_valid(mr, addr, size, false)) {
919 return -1U; /* FIXME: better signalling */
920 }
921
922 if (!mr->ops->read) {
923 return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
924 }
925
926 /* FIXME: support unaligned access */
927 access_with_adjusted_size(addr, &data, size,
928 mr->ops->impl.min_access_size,
929 mr->ops->impl.max_access_size,
930 memory_region_read_accessor, mr);
931
932 return data;
933 }
934
935 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
936 {
937 if (memory_region_wrong_endianness(mr)) {
938 switch (size) {
939 case 1:
940 break;
941 case 2:
942 *data = bswap16(*data);
943 break;
944 case 4:
945 *data = bswap32(*data);
946 break;
947 default:
948 abort();
949 }
950 }
951 }
952
953 static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
954 target_phys_addr_t addr,
955 unsigned size)
956 {
957 uint64_t ret;
958
959 ret = memory_region_dispatch_read1(mr, addr, size);
960 adjust_endianness(mr, &ret, size);
961 return ret;
962 }
963
964 static void memory_region_dispatch_write(MemoryRegion *mr,
965 target_phys_addr_t addr,
966 uint64_t data,
967 unsigned size)
968 {
969 if (!memory_region_access_valid(mr, addr, size, true)) {
970 return; /* FIXME: better signalling */
971 }
972
973 adjust_endianness(mr, &data, size);
974
975 if (!mr->ops->write) {
976 mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
977 return;
978 }
979
980 /* FIXME: support unaligned access */
981 access_with_adjusted_size(addr, &data, size,
982 mr->ops->impl.min_access_size,
983 mr->ops->impl.max_access_size,
984 memory_region_write_accessor, mr);
985 }
986
987 void memory_region_init_io(MemoryRegion *mr,
988 const MemoryRegionOps *ops,
989 void *opaque,
990 const char *name,
991 uint64_t size)
992 {
993 memory_region_init(mr, name, size);
994 mr->ops = ops;
995 mr->opaque = opaque;
996 mr->terminates = true;
997 mr->destructor = memory_region_destructor_iomem;
998 mr->ram_addr = cpu_register_io_memory(mr);
999 }
1000
1001 void memory_region_init_ram(MemoryRegion *mr,
1002 const char *name,
1003 uint64_t size)
1004 {
1005 memory_region_init(mr, name, size);
1006 mr->ram = true;
1007 mr->terminates = true;
1008 mr->destructor = memory_region_destructor_ram;
1009 mr->ram_addr = qemu_ram_alloc(size, mr);
1010 }
1011
1012 void memory_region_init_ram_ptr(MemoryRegion *mr,
1013 const char *name,
1014 uint64_t size,
1015 void *ptr)
1016 {
1017 memory_region_init(mr, name, size);
1018 mr->ram = true;
1019 mr->terminates = true;
1020 mr->destructor = memory_region_destructor_ram_from_ptr;
1021 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
1022 }
1023
1024 void memory_region_init_alias(MemoryRegion *mr,
1025 const char *name,
1026 MemoryRegion *orig,
1027 target_phys_addr_t offset,
1028 uint64_t size)
1029 {
1030 memory_region_init(mr, name, size);
1031 mr->alias = orig;
1032 mr->alias_offset = offset;
1033 }
1034
1035 void memory_region_init_rom_device(MemoryRegion *mr,
1036 const MemoryRegionOps *ops,
1037 void *opaque,
1038 const char *name,
1039 uint64_t size)
1040 {
1041 memory_region_init(mr, name, size);
1042 mr->ops = ops;
1043 mr->opaque = opaque;
1044 mr->terminates = true;
1045 mr->rom_device = true;
1046 mr->destructor = memory_region_destructor_rom_device;
1047 mr->ram_addr = qemu_ram_alloc(size, mr);
1048 mr->ram_addr |= cpu_register_io_memory(mr);
1049 }
1050
1051 static uint64_t invalid_read(void *opaque, target_phys_addr_t addr,
1052 unsigned size)
1053 {
1054 MemoryRegion *mr = opaque;
1055
1056 if (!mr->warning_printed) {
1057 fprintf(stderr, "Invalid read from memory region %s\n", mr->name);
1058 mr->warning_printed = true;
1059 }
1060 return -1U;
1061 }
1062
1063 static void invalid_write(void *opaque, target_phys_addr_t addr, uint64_t data,
1064 unsigned size)
1065 {
1066 MemoryRegion *mr = opaque;
1067
1068 if (!mr->warning_printed) {
1069 fprintf(stderr, "Invalid write to memory region %s\n", mr->name);
1070 mr->warning_printed = true;
1071 }
1072 }
1073
1074 static const MemoryRegionOps reservation_ops = {
1075 .read = invalid_read,
1076 .write = invalid_write,
1077 .endianness = DEVICE_NATIVE_ENDIAN,
1078 };
1079
1080 void memory_region_init_reservation(MemoryRegion *mr,
1081 const char *name,
1082 uint64_t size)
1083 {
1084 memory_region_init_io(mr, &reservation_ops, mr, name, size);
1085 }
1086
1087 void memory_region_destroy(MemoryRegion *mr)
1088 {
1089 assert(QTAILQ_EMPTY(&mr->subregions));
1090 mr->destructor(mr);
1091 memory_region_clear_coalescing(mr);
1092 g_free((char *)mr->name);
1093 g_free(mr->ioeventfds);
1094 }
1095
1096 uint64_t memory_region_size(MemoryRegion *mr)
1097 {
1098 if (int128_eq(mr->size, int128_2_64())) {
1099 return UINT64_MAX;
1100 }
1101 return int128_get64(mr->size);
1102 }
1103
1104 const char *memory_region_name(MemoryRegion *mr)
1105 {
1106 return mr->name;
1107 }
1108
1109 bool memory_region_is_ram(MemoryRegion *mr)
1110 {
1111 return mr->ram;
1112 }
1113
1114 bool memory_region_is_logging(MemoryRegion *mr)
1115 {
1116 return mr->dirty_log_mask;
1117 }
1118
1119 bool memory_region_is_rom(MemoryRegion *mr)
1120 {
1121 return mr->ram && mr->readonly;
1122 }
1123
1124 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1125 {
1126 uint8_t mask = 1 << client;
1127
1128 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1129 memory_region_update_topology(mr);
1130 }
1131
1132 bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1133 target_phys_addr_t size, unsigned client)
1134 {
1135 assert(mr->terminates);
1136 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1137 1 << client);
1138 }
1139
1140 void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1141 target_phys_addr_t size)
1142 {
1143 assert(mr->terminates);
1144 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1145 }
1146
1147 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1148 {
1149 FlatRange *fr;
1150
1151 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1152 if (fr->mr == mr) {
1153 MEMORY_LISTENER_UPDATE_REGION(fr, &address_space_memory, log_sync);
1154 }
1155 }
1156 }
1157
1158 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1159 {
1160 if (mr->readonly != readonly) {
1161 mr->readonly = readonly;
1162 memory_region_update_topology(mr);
1163 }
1164 }
1165
1166 void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1167 {
1168 if (mr->readable != readable) {
1169 mr->readable = readable;
1170 memory_region_update_topology(mr);
1171 }
1172 }
1173
1174 void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
1175 target_phys_addr_t size, unsigned client)
1176 {
1177 assert(mr->terminates);
1178 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1179 mr->ram_addr + addr + size,
1180 1 << client);
1181 }
1182
1183 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1184 {
1185 if (mr->alias) {
1186 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1187 }
1188
1189 assert(mr->terminates);
1190
1191 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1192 }
1193
1194 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1195 {
1196 FlatRange *fr;
1197 CoalescedMemoryRange *cmr;
1198 AddrRange tmp;
1199
1200 FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
1201 if (fr->mr == mr) {
1202 qemu_unregister_coalesced_mmio(int128_get64(fr->addr.start),
1203 int128_get64(fr->addr.size));
1204 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1205 tmp = addrrange_shift(cmr->addr,
1206 int128_sub(fr->addr.start,
1207 int128_make64(fr->offset_in_region)));
1208 if (!addrrange_intersects(tmp, fr->addr)) {
1209 continue;
1210 }
1211 tmp = addrrange_intersection(tmp, fr->addr);
1212 qemu_register_coalesced_mmio(int128_get64(tmp.start),
1213 int128_get64(tmp.size));
1214 }
1215 }
1216 }
1217 }
1218
1219 void memory_region_set_coalescing(MemoryRegion *mr)
1220 {
1221 memory_region_clear_coalescing(mr);
1222 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1223 }
1224
1225 void memory_region_add_coalescing(MemoryRegion *mr,
1226 target_phys_addr_t offset,
1227 uint64_t size)
1228 {
1229 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1230
1231 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1232 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1233 memory_region_update_coalesced_range(mr);
1234 }
1235
1236 void memory_region_clear_coalescing(MemoryRegion *mr)
1237 {
1238 CoalescedMemoryRange *cmr;
1239
1240 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1241 cmr = QTAILQ_FIRST(&mr->coalesced);
1242 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1243 g_free(cmr);
1244 }
1245 memory_region_update_coalesced_range(mr);
1246 }
1247
1248 void memory_region_add_eventfd(MemoryRegion *mr,
1249 target_phys_addr_t addr,
1250 unsigned size,
1251 bool match_data,
1252 uint64_t data,
1253 int fd)
1254 {
1255 MemoryRegionIoeventfd mrfd = {
1256 .addr.start = int128_make64(addr),
1257 .addr.size = int128_make64(size),
1258 .match_data = match_data,
1259 .data = data,
1260 .fd = fd,
1261 };
1262 unsigned i;
1263
1264 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1265 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1266 break;
1267 }
1268 }
1269 ++mr->ioeventfd_nb;
1270 mr->ioeventfds = g_realloc(mr->ioeventfds,
1271 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1272 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1273 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1274 mr->ioeventfds[i] = mrfd;
1275 memory_region_update_topology(mr);
1276 }
1277
1278 void memory_region_del_eventfd(MemoryRegion *mr,
1279 target_phys_addr_t addr,
1280 unsigned size,
1281 bool match_data,
1282 uint64_t data,
1283 int fd)
1284 {
1285 MemoryRegionIoeventfd mrfd = {
1286 .addr.start = int128_make64(addr),
1287 .addr.size = int128_make64(size),
1288 .match_data = match_data,
1289 .data = data,
1290 .fd = fd,
1291 };
1292 unsigned i;
1293
1294 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1295 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1296 break;
1297 }
1298 }
1299 assert(i != mr->ioeventfd_nb);
1300 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1301 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1302 --mr->ioeventfd_nb;
1303 mr->ioeventfds = g_realloc(mr->ioeventfds,
1304 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1305 memory_region_update_topology(mr);
1306 }
1307
1308 static void memory_region_add_subregion_common(MemoryRegion *mr,
1309 target_phys_addr_t offset,
1310 MemoryRegion *subregion)
1311 {
1312 MemoryRegion *other;
1313
1314 assert(!subregion->parent);
1315 subregion->parent = mr;
1316 subregion->addr = offset;
1317 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1318 if (subregion->may_overlap || other->may_overlap) {
1319 continue;
1320 }
1321 if (int128_gt(int128_make64(offset),
1322 int128_add(int128_make64(other->addr), other->size))
1323 || int128_le(int128_add(int128_make64(offset), subregion->size),
1324 int128_make64(other->addr))) {
1325 continue;
1326 }
1327 #if 0
1328 printf("warning: subregion collision %llx/%llx (%s) "
1329 "vs %llx/%llx (%s)\n",
1330 (unsigned long long)offset,
1331 (unsigned long long)int128_get64(subregion->size),
1332 subregion->name,
1333 (unsigned long long)other->addr,
1334 (unsigned long long)int128_get64(other->size),
1335 other->name);
1336 #endif
1337 }
1338 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1339 if (subregion->priority >= other->priority) {
1340 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1341 goto done;
1342 }
1343 }
1344 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1345 done:
1346 memory_region_update_topology(mr);
1347 }
1348
1349
1350 void memory_region_add_subregion(MemoryRegion *mr,
1351 target_phys_addr_t offset,
1352 MemoryRegion *subregion)
1353 {
1354 subregion->may_overlap = false;
1355 subregion->priority = 0;
1356 memory_region_add_subregion_common(mr, offset, subregion);
1357 }
1358
1359 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1360 target_phys_addr_t offset,
1361 MemoryRegion *subregion,
1362 unsigned priority)
1363 {
1364 subregion->may_overlap = true;
1365 subregion->priority = priority;
1366 memory_region_add_subregion_common(mr, offset, subregion);
1367 }
1368
1369 void memory_region_del_subregion(MemoryRegion *mr,
1370 MemoryRegion *subregion)
1371 {
1372 assert(subregion->parent == mr);
1373 subregion->parent = NULL;
1374 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1375 memory_region_update_topology(mr);
1376 }
1377
1378 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1379 {
1380 if (enabled == mr->enabled) {
1381 return;
1382 }
1383 mr->enabled = enabled;
1384 memory_region_update_topology(NULL);
1385 }
1386
1387 void memory_region_set_address(MemoryRegion *mr, target_phys_addr_t addr)
1388 {
1389 MemoryRegion *parent = mr->parent;
1390 unsigned priority = mr->priority;
1391 bool may_overlap = mr->may_overlap;
1392
1393 if (addr == mr->addr || !parent) {
1394 mr->addr = addr;
1395 return;
1396 }
1397
1398 memory_region_transaction_begin();
1399 memory_region_del_subregion(parent, mr);
1400 if (may_overlap) {
1401 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1402 } else {
1403 memory_region_add_subregion(parent, addr, mr);
1404 }
1405 memory_region_transaction_commit();
1406 }
1407
1408 void memory_region_set_alias_offset(MemoryRegion *mr, target_phys_addr_t offset)
1409 {
1410 target_phys_addr_t old_offset = mr->alias_offset;
1411
1412 assert(mr->alias);
1413 mr->alias_offset = offset;
1414
1415 if (offset == old_offset || !mr->parent) {
1416 return;
1417 }
1418
1419 memory_region_update_topology(mr);
1420 }
1421
1422 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1423 {
1424 return mr->ram_addr;
1425 }
1426
1427 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1428 {
1429 const AddrRange *addr = addr_;
1430 const FlatRange *fr = fr_;
1431
1432 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1433 return -1;
1434 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1435 return 1;
1436 }
1437 return 0;
1438 }
1439
1440 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1441 {
1442 return bsearch(&addr, as->current_map.ranges, as->current_map.nr,
1443 sizeof(FlatRange), cmp_flatrange_addr);
1444 }
1445
1446 MemoryRegionSection memory_region_find(MemoryRegion *address_space,
1447 target_phys_addr_t addr, uint64_t size)
1448 {
1449 AddressSpace *as = memory_region_to_address_space(address_space);
1450 AddrRange range = addrrange_make(int128_make64(addr),
1451 int128_make64(size));
1452 FlatRange *fr = address_space_lookup(as, range);
1453 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1454
1455 if (!fr) {
1456 return ret;
1457 }
1458
1459 while (fr > as->current_map.ranges
1460 && addrrange_intersects(fr[-1].addr, range)) {
1461 --fr;
1462 }
1463
1464 ret.mr = fr->mr;
1465 range = addrrange_intersection(range, fr->addr);
1466 ret.offset_within_region = fr->offset_in_region;
1467 ret.offset_within_region += int128_get64(int128_sub(range.start,
1468 fr->addr.start));
1469 ret.size = int128_get64(range.size);
1470 ret.offset_within_address_space = int128_get64(range.start);
1471 return ret;
1472 }
1473
1474 void memory_global_sync_dirty_bitmap(MemoryRegion *address_space)
1475 {
1476 AddressSpace *as = memory_region_to_address_space(address_space);
1477 FlatRange *fr;
1478
1479 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1480 MEMORY_LISTENER_UPDATE_REGION(fr, as, log_sync);
1481 }
1482 }
1483
1484 void memory_global_dirty_log_start(void)
1485 {
1486 MemoryListener *listener;
1487
1488 cpu_physical_memory_set_dirty_tracking(1);
1489 global_dirty_log = true;
1490 QLIST_FOREACH(listener, &memory_listeners, link) {
1491 listener->log_global_start(listener);
1492 }
1493 }
1494
1495 void memory_global_dirty_log_stop(void)
1496 {
1497 MemoryListener *listener;
1498
1499 global_dirty_log = false;
1500 QLIST_FOREACH(listener, &memory_listeners, link) {
1501 listener->log_global_stop(listener);
1502 }
1503 cpu_physical_memory_set_dirty_tracking(0);
1504 }
1505
1506 static void listener_add_address_space(MemoryListener *listener,
1507 AddressSpace *as)
1508 {
1509 FlatRange *fr;
1510
1511 if (global_dirty_log) {
1512 listener->log_global_start(listener);
1513 }
1514 FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
1515 MemoryRegionSection section = {
1516 .mr = fr->mr,
1517 .address_space = as->root,
1518 .offset_within_region = fr->offset_in_region,
1519 .size = int128_get64(fr->addr.size),
1520 .offset_within_address_space = int128_get64(fr->addr.start),
1521 };
1522 listener->region_add(listener, &section);
1523 }
1524 }
1525
1526 void memory_listener_register(MemoryListener *listener)
1527 {
1528 QLIST_INSERT_HEAD(&memory_listeners, listener, link);
1529 listener_add_address_space(listener, &address_space_memory);
1530 listener_add_address_space(listener, &address_space_io);
1531 }
1532
1533 void memory_listener_unregister(MemoryListener *listener)
1534 {
1535 QLIST_REMOVE(listener, link);
1536 }
1537
1538 void set_system_memory_map(MemoryRegion *mr)
1539 {
1540 address_space_memory.root = mr;
1541 memory_region_update_topology(NULL);
1542 }
1543
1544 void set_system_io_map(MemoryRegion *mr)
1545 {
1546 address_space_io.root = mr;
1547 memory_region_update_topology(NULL);
1548 }
1549
1550 uint64_t io_mem_read(int io_index, target_phys_addr_t addr, unsigned size)
1551 {
1552 return memory_region_dispatch_read(io_mem_region[io_index], addr, size);
1553 }
1554
1555 void io_mem_write(int io_index, target_phys_addr_t addr,
1556 uint64_t val, unsigned size)
1557 {
1558 memory_region_dispatch_write(io_mem_region[io_index], addr, val, size);
1559 }
1560
1561 typedef struct MemoryRegionList MemoryRegionList;
1562
1563 struct MemoryRegionList {
1564 const MemoryRegion *mr;
1565 bool printed;
1566 QTAILQ_ENTRY(MemoryRegionList) queue;
1567 };
1568
1569 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1570
1571 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1572 const MemoryRegion *mr, unsigned int level,
1573 target_phys_addr_t base,
1574 MemoryRegionListHead *alias_print_queue)
1575 {
1576 MemoryRegionList *new_ml, *ml, *next_ml;
1577 MemoryRegionListHead submr_print_queue;
1578 const MemoryRegion *submr;
1579 unsigned int i;
1580
1581 if (!mr) {
1582 return;
1583 }
1584
1585 for (i = 0; i < level; i++) {
1586 mon_printf(f, " ");
1587 }
1588
1589 if (mr->alias) {
1590 MemoryRegionList *ml;
1591 bool found = false;
1592
1593 /* check if the alias is already in the queue */
1594 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1595 if (ml->mr == mr->alias && !ml->printed) {
1596 found = true;
1597 }
1598 }
1599
1600 if (!found) {
1601 ml = g_new(MemoryRegionList, 1);
1602 ml->mr = mr->alias;
1603 ml->printed = false;
1604 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1605 }
1606 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1607 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1608 "-" TARGET_FMT_plx "\n",
1609 base + mr->addr,
1610 base + mr->addr
1611 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1612 mr->priority,
1613 mr->readable ? 'R' : '-',
1614 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1615 : '-',
1616 mr->name,
1617 mr->alias->name,
1618 mr->alias_offset,
1619 mr->alias_offset
1620 + (target_phys_addr_t)int128_get64(mr->size) - 1);
1621 } else {
1622 mon_printf(f,
1623 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1624 base + mr->addr,
1625 base + mr->addr
1626 + (target_phys_addr_t)int128_get64(mr->size) - 1,
1627 mr->priority,
1628 mr->readable ? 'R' : '-',
1629 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1630 : '-',
1631 mr->name);
1632 }
1633
1634 QTAILQ_INIT(&submr_print_queue);
1635
1636 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1637 new_ml = g_new(MemoryRegionList, 1);
1638 new_ml->mr = submr;
1639 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1640 if (new_ml->mr->addr < ml->mr->addr ||
1641 (new_ml->mr->addr == ml->mr->addr &&
1642 new_ml->mr->priority > ml->mr->priority)) {
1643 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1644 new_ml = NULL;
1645 break;
1646 }
1647 }
1648 if (new_ml) {
1649 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1650 }
1651 }
1652
1653 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1654 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1655 alias_print_queue);
1656 }
1657
1658 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1659 g_free(ml);
1660 }
1661 }
1662
1663 void mtree_info(fprintf_function mon_printf, void *f)
1664 {
1665 MemoryRegionListHead ml_head;
1666 MemoryRegionList *ml, *ml2;
1667
1668 QTAILQ_INIT(&ml_head);
1669
1670 mon_printf(f, "memory\n");
1671 mtree_print_mr(mon_printf, f, address_space_memory.root, 0, 0, &ml_head);
1672
1673 /* print aliased regions */
1674 QTAILQ_FOREACH(ml, &ml_head, queue) {
1675 if (!ml->printed) {
1676 mon_printf(f, "%s\n", ml->mr->name);
1677 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1678 }
1679 }
1680
1681 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1682 g_free(ml);
1683 }
1684
1685 if (address_space_io.root &&
1686 !QTAILQ_EMPTY(&address_space_io.root->subregions)) {
1687 QTAILQ_INIT(&ml_head);
1688 mon_printf(f, "I/O\n");
1689 mtree_print_mr(mon_printf, f, address_space_io.root, 0, 0, &ml_head);
1690 }
1691 }