2 * Implement fast Fletcher4 using superscalar pipelines.
4 * Use regular C code to compute
5 * Fletcher4 in four incremental 64-bit parallel accumulator streams,
6 * and then combine the streams to form the final four checksum words.
7 * This implementation is a derivative of the AVX SIMD implementation by
8 * James Guilford and Jinshan Xiong from Intel (see zfs_fletcher_intel.c).
10 * Copyright (C) 2016 Romain Dolbeau.
13 * Romain Dolbeau <romain.dolbeau@atos.net>
15 * This software is available to you under a choice of one of two
16 * licenses. You may choose to be licensed under the terms of the GNU
17 * General Public License (GPL) Version 2, available from the file
18 * COPYING in the main directory of this source tree, or the
19 * OpenIB.org BSD license below:
21 * Redistribution and use in source and binary forms, with or
22 * without modification, are permitted provided that the following
25 * - Redistributions of source code must retain the above
26 * copyright notice, this list of conditions and the following
29 * - Redistributions in binary form must reproduce the above
30 * copyright notice, this list of conditions and the following
31 * disclaimer in the documentation and/or other materials
32 * provided with the distribution.
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
36 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
38 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
39 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
40 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
44 #include <sys/byteorder.h>
45 #include <sys/spa_checksum.h>
46 #include <sys/strings.h>
47 #include <zfs_fletcher.h>
50 fletcher_4_superscalar4_init(fletcher_4_ctx_t
*ctx
)
52 bzero(ctx
->superscalar
, 4 * sizeof (zfs_fletcher_superscalar_t
));
56 fletcher_4_superscalar4_fini(fletcher_4_ctx_t
*ctx
, zio_cksum_t
*zcp
)
60 A
= ctx
->superscalar
[0].v
[0] + ctx
->superscalar
[0].v
[1] +
61 ctx
->superscalar
[0].v
[2] + ctx
->superscalar
[0].v
[3];
62 B
= 0 - ctx
->superscalar
[0].v
[1] - 2 * ctx
->superscalar
[0].v
[2] -
63 3 * ctx
->superscalar
[0].v
[3] + 4 * ctx
->superscalar
[1].v
[0] +
64 4 * ctx
->superscalar
[1].v
[1] + 4 * ctx
->superscalar
[1].v
[2] +
65 4 * ctx
->superscalar
[1].v
[3];
67 C
= ctx
->superscalar
[0].v
[2] + 3 * ctx
->superscalar
[0].v
[3] -
68 6 * ctx
->superscalar
[1].v
[0] - 10 * ctx
->superscalar
[1].v
[1] -
69 14 * ctx
->superscalar
[1].v
[2] - 18 * ctx
->superscalar
[1].v
[3] +
70 16 * ctx
->superscalar
[2].v
[0] + 16 * ctx
->superscalar
[2].v
[1] +
71 16 * ctx
->superscalar
[2].v
[2] + 16 * ctx
->superscalar
[2].v
[3];
73 D
= 0 - ctx
->superscalar
[0].v
[3] + 4 * ctx
->superscalar
[1].v
[0] +
74 10 * ctx
->superscalar
[1].v
[1] + 20 * ctx
->superscalar
[1].v
[2] +
75 34 * ctx
->superscalar
[1].v
[3] - 48 * ctx
->superscalar
[2].v
[0] -
76 64 * ctx
->superscalar
[2].v
[1] - 80 * ctx
->superscalar
[2].v
[2] -
77 96 * ctx
->superscalar
[2].v
[3] + 64 * ctx
->superscalar
[3].v
[0] +
78 64 * ctx
->superscalar
[3].v
[1] + 64 * ctx
->superscalar
[3].v
[2] +
79 64 * ctx
->superscalar
[3].v
[3];
81 ZIO_SET_CHECKSUM(zcp
, A
, B
, C
, D
);
85 fletcher_4_superscalar4_native(fletcher_4_ctx_t
*ctx
,
86 const void *buf
, uint64_t size
)
88 const uint32_t *ip
= buf
;
89 const uint32_t *ipend
= ip
+ (size
/ sizeof (uint32_t));
91 uint64_t a2
, b2
, c2
, d2
;
92 uint64_t a3
, b3
, c3
, d3
;
93 uint64_t a4
, b4
, c4
, d4
;
95 a
= ctx
->superscalar
[0].v
[0];
96 b
= ctx
->superscalar
[1].v
[0];
97 c
= ctx
->superscalar
[2].v
[0];
98 d
= ctx
->superscalar
[3].v
[0];
99 a2
= ctx
->superscalar
[0].v
[1];
100 b2
= ctx
->superscalar
[1].v
[1];
101 c2
= ctx
->superscalar
[2].v
[1];
102 d2
= ctx
->superscalar
[3].v
[1];
103 a3
= ctx
->superscalar
[0].v
[2];
104 b3
= ctx
->superscalar
[1].v
[2];
105 c3
= ctx
->superscalar
[2].v
[2];
106 d3
= ctx
->superscalar
[3].v
[2];
107 a4
= ctx
->superscalar
[0].v
[3];
108 b4
= ctx
->superscalar
[1].v
[3];
109 c4
= ctx
->superscalar
[2].v
[3];
110 d4
= ctx
->superscalar
[3].v
[3];
112 for (; ip
< ipend
; ip
+= 4) {
131 ctx
->superscalar
[0].v
[0] = a
;
132 ctx
->superscalar
[1].v
[0] = b
;
133 ctx
->superscalar
[2].v
[0] = c
;
134 ctx
->superscalar
[3].v
[0] = d
;
135 ctx
->superscalar
[0].v
[1] = a2
;
136 ctx
->superscalar
[1].v
[1] = b2
;
137 ctx
->superscalar
[2].v
[1] = c2
;
138 ctx
->superscalar
[3].v
[1] = d2
;
139 ctx
->superscalar
[0].v
[2] = a3
;
140 ctx
->superscalar
[1].v
[2] = b3
;
141 ctx
->superscalar
[2].v
[2] = c3
;
142 ctx
->superscalar
[3].v
[2] = d3
;
143 ctx
->superscalar
[0].v
[3] = a4
;
144 ctx
->superscalar
[1].v
[3] = b4
;
145 ctx
->superscalar
[2].v
[3] = c4
;
146 ctx
->superscalar
[3].v
[3] = d4
;
150 fletcher_4_superscalar4_byteswap(fletcher_4_ctx_t
*ctx
,
151 const void *buf
, uint64_t size
)
153 const uint32_t *ip
= buf
;
154 const uint32_t *ipend
= ip
+ (size
/ sizeof (uint32_t));
156 uint64_t a2
, b2
, c2
, d2
;
157 uint64_t a3
, b3
, c3
, d3
;
158 uint64_t a4
, b4
, c4
, d4
;
160 a
= ctx
->superscalar
[0].v
[0];
161 b
= ctx
->superscalar
[1].v
[0];
162 c
= ctx
->superscalar
[2].v
[0];
163 d
= ctx
->superscalar
[3].v
[0];
164 a2
= ctx
->superscalar
[0].v
[1];
165 b2
= ctx
->superscalar
[1].v
[1];
166 c2
= ctx
->superscalar
[2].v
[1];
167 d2
= ctx
->superscalar
[3].v
[1];
168 a3
= ctx
->superscalar
[0].v
[2];
169 b3
= ctx
->superscalar
[1].v
[2];
170 c3
= ctx
->superscalar
[2].v
[2];
171 d3
= ctx
->superscalar
[3].v
[2];
172 a4
= ctx
->superscalar
[0].v
[3];
173 b4
= ctx
->superscalar
[1].v
[3];
174 c4
= ctx
->superscalar
[2].v
[3];
175 d4
= ctx
->superscalar
[3].v
[3];
177 for (; ip
< ipend
; ip
+= 4) {
178 a
+= BSWAP_32(ip
[0]);
179 a2
+= BSWAP_32(ip
[1]);
180 a3
+= BSWAP_32(ip
[2]);
181 a4
+= BSWAP_32(ip
[3]);
196 ctx
->superscalar
[0].v
[0] = a
;
197 ctx
->superscalar
[1].v
[0] = b
;
198 ctx
->superscalar
[2].v
[0] = c
;
199 ctx
->superscalar
[3].v
[0] = d
;
200 ctx
->superscalar
[0].v
[1] = a2
;
201 ctx
->superscalar
[1].v
[1] = b2
;
202 ctx
->superscalar
[2].v
[1] = c2
;
203 ctx
->superscalar
[3].v
[1] = d2
;
204 ctx
->superscalar
[0].v
[2] = a3
;
205 ctx
->superscalar
[1].v
[2] = b3
;
206 ctx
->superscalar
[2].v
[2] = c3
;
207 ctx
->superscalar
[3].v
[2] = d3
;
208 ctx
->superscalar
[0].v
[3] = a4
;
209 ctx
->superscalar
[1].v
[3] = b4
;
210 ctx
->superscalar
[2].v
[3] = c4
;
211 ctx
->superscalar
[3].v
[3] = d4
;
214 static boolean_t
fletcher_4_superscalar4_valid(void)
219 const fletcher_4_ops_t fletcher_4_superscalar4_ops
= {
220 .init_native
= fletcher_4_superscalar4_init
,
221 .compute_native
= fletcher_4_superscalar4_native
,
222 .fini_native
= fletcher_4_superscalar4_fini
,
223 .init_byteswap
= fletcher_4_superscalar4_init
,
224 .compute_byteswap
= fletcher_4_superscalar4_byteswap
,
225 .fini_byteswap
= fletcher_4_superscalar4_fini
,
226 .valid
= fletcher_4_superscalar4_valid
,
227 .name
= "superscalar4"