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1 // Copyright 2015 The Rust Project Developers. See the COPYRIGHT
2 // file at the top-level directory of this distribution and at
3 // http://rust-lang.org/COPYRIGHT.
4 //
5 // Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
6 // http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
7 // <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
8 // option. This file may not be copied, modified, or distributed
9 // except according to those terms.
10
11 // DO NOT EDIT: autogenerated by etc/platform-intrinsics/generator.py
12 // ignore-tidy-linelength
13
14 #![allow(unused_imports)]
15
16 use {Intrinsic, Type};
17 use IntrinsicDef::Named;
18
19 pub fn find(name: &str) -> Option<Intrinsic> {
20 if !name.starts_with("powerpc") { return None }
21 Some(match &name["powerpc".len()..] {
22 "_vec_perm" => Intrinsic {
23 inputs: { static INPUTS: [&'static Type; 3] = [&::I32x4, &::I32x4, &::I8x16]; &INPUTS },
24 output: &::I32x4,
25 definition: Named("llvm.ppc.altivec.vperm")
26 },
27 "_vec_mradds" => Intrinsic {
28 inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I16x8]; &INPUTS },
29 output: &::I16x8,
30 definition: Named("llvm.ppc.altivec.vmhraddshs")
31 },
32 "_vec_cmpb" => Intrinsic {
33 inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS },
34 output: &::I32x4,
35 definition: Named("llvm.ppc.altivec.vcmpbfp")
36 },
37 "_vec_cmpeqb" => Intrinsic {
38 inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
39 output: &::I8x16,
40 definition: Named("llvm.ppc.altivec.vcmpequb")
41 },
42 "_vec_cmpeqh" => Intrinsic {
43 inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
44 output: &::I16x8,
45 definition: Named("llvm.ppc.altivec.vcmpequh")
46 },
47 "_vec_cmpeqw" => Intrinsic {
48 inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
49 output: &::I32x4,
50 definition: Named("llvm.ppc.altivec.vcmpequw")
51 },
52 "_vec_cmpgtub" => Intrinsic {
53 inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
54 output: &::I8x16,
55 definition: Named("llvm.ppc.altivec.vcmpgtub")
56 },
57 "_vec_cmpgtuh" => Intrinsic {
58 inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
59 output: &::I16x8,
60 definition: Named("llvm.ppc.altivec.vcmpgtuh")
61 },
62 "_vec_cmpgtuw" => Intrinsic {
63 inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
64 output: &::I32x4,
65 definition: Named("llvm.ppc.altivec.vcmpgtuw")
66 },
67 "_vec_cmpgtsb" => Intrinsic {
68 inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
69 output: &::I8x16,
70 definition: Named("llvm.ppc.altivec.vcmpgtsb")
71 },
72 "_vec_cmpgtsh" => Intrinsic {
73 inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
74 output: &::I16x8,
75 definition: Named("llvm.ppc.altivec.vcmpgtsh")
76 },
77 "_vec_cmpgtsw" => Intrinsic {
78 inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
79 output: &::I32x4,
80 definition: Named("llvm.ppc.altivec.vcmpgtsw")
81 },
82 "_vec_maxsb" => Intrinsic {
83 inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
84 output: &::I8x16,
85 definition: Named("llvm.ppc.altivec.vmaxsb")
86 },
87 "_vec_maxub" => Intrinsic {
88 inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
89 output: &::U8x16,
90 definition: Named("llvm.ppc.altivec.vmaxub")
91 },
92 "_vec_maxsh" => Intrinsic {
93 inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
94 output: &::I16x8,
95 definition: Named("llvm.ppc.altivec.vmaxsh")
96 },
97 "_vec_maxuh" => Intrinsic {
98 inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
99 output: &::U16x8,
100 definition: Named("llvm.ppc.altivec.vmaxuh")
101 },
102 "_vec_maxsw" => Intrinsic {
103 inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
104 output: &::I32x4,
105 definition: Named("llvm.ppc.altivec.vmaxsw")
106 },
107 "_vec_maxuw" => Intrinsic {
108 inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
109 output: &::U32x4,
110 definition: Named("llvm.ppc.altivec.vmaxuw")
111 },
112 "_vec_minsb" => Intrinsic {
113 inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
114 output: &::I8x16,
115 definition: Named("llvm.ppc.altivec.vminsb")
116 },
117 "_vec_minub" => Intrinsic {
118 inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
119 output: &::U8x16,
120 definition: Named("llvm.ppc.altivec.vminub")
121 },
122 "_vec_minsh" => Intrinsic {
123 inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
124 output: &::I16x8,
125 definition: Named("llvm.ppc.altivec.vminsh")
126 },
127 "_vec_minuh" => Intrinsic {
128 inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
129 output: &::U16x8,
130 definition: Named("llvm.ppc.altivec.vminuh")
131 },
132 "_vec_minsw" => Intrinsic {
133 inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
134 output: &::I32x4,
135 definition: Named("llvm.ppc.altivec.vminsw")
136 },
137 "_vec_minuw" => Intrinsic {
138 inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
139 output: &::U32x4,
140 definition: Named("llvm.ppc.altivec.vminuw")
141 },
142 "_vec_subsbs" => Intrinsic {
143 inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
144 output: &::I8x16,
145 definition: Named("llvm.ppc.altivec.vsubsbs")
146 },
147 "_vec_sububs" => Intrinsic {
148 inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
149 output: &::U8x16,
150 definition: Named("llvm.ppc.altivec.vsububs")
151 },
152 "_vec_subshs" => Intrinsic {
153 inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
154 output: &::I16x8,
155 definition: Named("llvm.ppc.altivec.vsubshs")
156 },
157 "_vec_subuhs" => Intrinsic {
158 inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
159 output: &::U16x8,
160 definition: Named("llvm.ppc.altivec.vsubuhs")
161 },
162 "_vec_subsws" => Intrinsic {
163 inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
164 output: &::I32x4,
165 definition: Named("llvm.ppc.altivec.vsubsws")
166 },
167 "_vec_subuws" => Intrinsic {
168 inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
169 output: &::U32x4,
170 definition: Named("llvm.ppc.altivec.vsubuws")
171 },
172 "_vec_subc" => Intrinsic {
173 inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
174 output: &::U32x4,
175 definition: Named("llvm.ppc.altivec.vsubcuw")
176 },
177 "_vec_addsbs" => Intrinsic {
178 inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
179 output: &::I8x16,
180 definition: Named("llvm.ppc.altivec.vaddsbs")
181 },
182 "_vec_addubs" => Intrinsic {
183 inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
184 output: &::U8x16,
185 definition: Named("llvm.ppc.altivec.vaddubs")
186 },
187 "_vec_addshs" => Intrinsic {
188 inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
189 output: &::I16x8,
190 definition: Named("llvm.ppc.altivec.vaddshs")
191 },
192 "_vec_adduhs" => Intrinsic {
193 inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
194 output: &::U16x8,
195 definition: Named("llvm.ppc.altivec.vadduhs")
196 },
197 "_vec_addsws" => Intrinsic {
198 inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
199 output: &::I32x4,
200 definition: Named("llvm.ppc.altivec.vaddsws")
201 },
202 "_vec_adduws" => Intrinsic {
203 inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
204 output: &::U32x4,
205 definition: Named("llvm.ppc.altivec.vadduws")
206 },
207 "_vec_addc" => Intrinsic {
208 inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
209 output: &::U32x4,
210 definition: Named("llvm.ppc.altivec.vaddcuw")
211 },
212 "_vec_mulesb" => Intrinsic {
213 inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
214 output: &::I16x8,
215 definition: Named("llvm.ppc.altivec.vmulesb")
216 },
217 "_vec_muleub" => Intrinsic {
218 inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
219 output: &::U16x8,
220 definition: Named("llvm.ppc.altivec.vmuleub")
221 },
222 "_vec_mulesh" => Intrinsic {
223 inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
224 output: &::I32x4,
225 definition: Named("llvm.ppc.altivec.vmulesh")
226 },
227 "_vec_muleuh" => Intrinsic {
228 inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
229 output: &::U32x4,
230 definition: Named("llvm.ppc.altivec.vmuleuh")
231 },
232 "_vec_mulosb" => Intrinsic {
233 inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
234 output: &::I16x8,
235 definition: Named("llvm.ppc.altivec.vmulosb")
236 },
237 "_vec_muloub" => Intrinsic {
238 inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
239 output: &::U16x8,
240 definition: Named("llvm.ppc.altivec.vmuloub")
241 },
242 "_vec_mulosh" => Intrinsic {
243 inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
244 output: &::I32x4,
245 definition: Named("llvm.ppc.altivec.vmulosh")
246 },
247 "_vec_mulouh" => Intrinsic {
248 inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
249 output: &::U32x4,
250 definition: Named("llvm.ppc.altivec.vmulouh")
251 },
252 "_vec_avgsb" => Intrinsic {
253 inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
254 output: &::I8x16,
255 definition: Named("llvm.ppc.altivec.vavgsb")
256 },
257 "_vec_avgub" => Intrinsic {
258 inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
259 output: &::U8x16,
260 definition: Named("llvm.ppc.altivec.vavgub")
261 },
262 "_vec_avgsh" => Intrinsic {
263 inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
264 output: &::I16x8,
265 definition: Named("llvm.ppc.altivec.vavgsh")
266 },
267 "_vec_avguh" => Intrinsic {
268 inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
269 output: &::U16x8,
270 definition: Named("llvm.ppc.altivec.vavguh")
271 },
272 "_vec_avgsw" => Intrinsic {
273 inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
274 output: &::I32x4,
275 definition: Named("llvm.ppc.altivec.vavgsw")
276 },
277 "_vec_avguw" => Intrinsic {
278 inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
279 output: &::U32x4,
280 definition: Named("llvm.ppc.altivec.vavguw")
281 },
282 "_vec_packssh" => Intrinsic {
283 inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
284 output: &::I8x16,
285 definition: Named("llvm.ppc.altivec.vpkshss")
286 },
287 "_vec_packsuh" => Intrinsic {
288 inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
289 output: &::U8x16,
290 definition: Named("llvm.ppc.altivec.vpkuhus")
291 },
292 "_vec_packssw" => Intrinsic {
293 inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
294 output: &::I16x8,
295 definition: Named("llvm.ppc.altivec.vpkswss")
296 },
297 "_vec_packsuw" => Intrinsic {
298 inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
299 output: &::U16x8,
300 definition: Named("llvm.ppc.altivec.vpkuwus")
301 },
302 "_vec_packsush" => Intrinsic {
303 inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
304 output: &::U8x16,
305 definition: Named("llvm.ppc.altivec.vpkshus")
306 },
307 "_vec_packsusw" => Intrinsic {
308 inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
309 output: &::U16x8,
310 definition: Named("llvm.ppc.altivec.vpkswus")
311 },
312 "_vec_packpx" => Intrinsic {
313 inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
314 output: &::I16x8,
315 definition: Named("llvm.ppc.altivec.vpkpx")
316 },
317 "_vec_unpacklsb" => Intrinsic {
318 inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS },
319 output: &::I16x8,
320 definition: Named("llvm.ppc.altivec.vupklsb")
321 },
322 "_vec_unpacklsh" => Intrinsic {
323 inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS },
324 output: &::I32x4,
325 definition: Named("llvm.ppc.altivec.vupklsh")
326 },
327 "_vec_unpackhsb" => Intrinsic {
328 inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS },
329 output: &::I16x8,
330 definition: Named("llvm.ppc.altivec.vupkhsb")
331 },
332 "_vec_unpackhsh" => Intrinsic {
333 inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS },
334 output: &::I32x4,
335 definition: Named("llvm.ppc.altivec.vupkhsh")
336 },
337 "_vec_madds" => Intrinsic {
338 inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I16x8]; &INPUTS },
339 output: &::I16x8,
340 definition: Named("llvm.ppc.altivec.vmhaddshs")
341 },
342 "_vec_msumubm" => Intrinsic {
343 inputs: { static INPUTS: [&'static Type; 3] = [&::U8x16, &::U8x16, &::U32x4]; &INPUTS },
344 output: &::U32x4,
345 definition: Named("llvm.ppc.altivec.vmsumubm")
346 },
347 "_vec_msumuhm" => Intrinsic {
348 inputs: { static INPUTS: [&'static Type; 3] = [&::U16x8, &::U16x8, &::U32x4]; &INPUTS },
349 output: &::U32x4,
350 definition: Named("llvm.ppc.altivec.vmsumuhm")
351 },
352 "_vec_msummbm" => Intrinsic {
353 inputs: { static INPUTS: [&'static Type; 3] = [&::I8x16, &::U8x16, &::I32x4]; &INPUTS },
354 output: &::I32x4,
355 definition: Named("llvm.ppc.altivec.vmsummbm")
356 },
357 "_vec_msumshm" => Intrinsic {
358 inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I32x4]; &INPUTS },
359 output: &::I32x4,
360 definition: Named("llvm.ppc.altivec.vmsumshm")
361 },
362 "_vec_msumshs" => Intrinsic {
363 inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I32x4]; &INPUTS },
364 output: &::I32x4,
365 definition: Named("llvm.ppc.altivec.vmsumshs")
366 },
367 "_vec_msumuhs" => Intrinsic {
368 inputs: { static INPUTS: [&'static Type; 3] = [&::U16x8, &::U16x8, &::U32x4]; &INPUTS },
369 output: &::U32x4,
370 definition: Named("llvm.ppc.altivec.vmsumuhs")
371 },
372 "_vec_sum2s" => Intrinsic {
373 inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
374 output: &::I32x4,
375 definition: Named("llvm.ppc.altivec.vsum2sws")
376 },
377 "_vec_sum4sbs" => Intrinsic {
378 inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I32x4]; &INPUTS },
379 output: &::I32x4,
380 definition: Named("llvm.ppc.altivec.vsum4sbs")
381 },
382 "_vec_sum4ubs" => Intrinsic {
383 inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U32x4]; &INPUTS },
384 output: &::U32x4,
385 definition: Named("llvm.ppc.altivec.vsum4ubs")
386 },
387 "_vec_sum4shs" => Intrinsic {
388 inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I32x4]; &INPUTS },
389 output: &::I32x4,
390 definition: Named("llvm.ppc.altivec.vsum4shs")
391 },
392 "_vec_sums" => Intrinsic {
393 inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
394 output: &::I32x4,
395 definition: Named("llvm.ppc.altivec.vsumsws")
396 },
397 "_vec_madd" => Intrinsic {
398 inputs: { static INPUTS: [&'static Type; 3] = [&::F32x4, &::F32x4, &::F32x4]; &INPUTS },
399 output: &::F32x4,
400 definition: Named("llvm.ppc.altivec.vmaddfp")
401 },
402 "_vec_nmsub" => Intrinsic {
403 inputs: { static INPUTS: [&'static Type; 3] = [&::F32x4, &::F32x4, &::F32x4]; &INPUTS },
404 output: &::F32x4,
405 definition: Named("llvm.ppc.altivec.vnmsubfp")
406 },
407 "_vec_expte" => Intrinsic {
408 inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
409 output: &::F32x4,
410 definition: Named("llvm.ppc.altivec.vexptefp")
411 },
412 "_vec_floor" => Intrinsic {
413 inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
414 output: &::F32x4,
415 definition: Named("llvm.ppc.altivec.vrfim")
416 },
417 "_vec_ceil" => Intrinsic {
418 inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
419 output: &::F32x4,
420 definition: Named("llvm.ppc.altivec.vrfip")
421 },
422 "_vec_round" => Intrinsic {
423 inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
424 output: &::F32x4,
425 definition: Named("llvm.ppc.altivec.vrfin")
426 },
427 "_vec_trunc" => Intrinsic {
428 inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
429 output: &::F32x4,
430 definition: Named("llvm.ppc.altivec.vrfiz")
431 },
432 "_vec_loge" => Intrinsic {
433 inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
434 output: &::F32x4,
435 definition: Named("llvm.ppc.altivec.vlogefp")
436 },
437 "_vec_re" => Intrinsic {
438 inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
439 output: &::F32x4,
440 definition: Named("llvm.ppc.altivec.vrefp")
441 },
442 "_vec_rsqrte" => Intrinsic {
443 inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
444 output: &::F32x4,
445 definition: Named("llvm.ppc.altivec.vrsqrtefp")
446 },
447 _ => return None,
448 })
449 }