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1 /*
2 * Copyright 2008 IBM Corporation.
3 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
4 *
5 * This work is licensed under the GNU GPL license version 2 or later.
6 *
7 */
8
9 #ifndef KVM_PPC_H
10 #define KVM_PPC_H
11
12 #define TYPE_HOST_POWERPC_CPU "host-" TYPE_POWERPC_CPU
13
14 #ifdef CONFIG_KVM
15
16 uint32_t kvmppc_get_tbfreq(void);
17 uint64_t kvmppc_get_clockfreq(void);
18 uint32_t kvmppc_get_vmx(void);
19 uint32_t kvmppc_get_dfp(void);
20 bool kvmppc_get_host_model(char **buf);
21 bool kvmppc_get_host_serial(char **buf);
22 int kvmppc_get_hasidle(CPUPPCState *env);
23 int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len);
24 int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level);
25 void kvmppc_enable_logical_ci_hcalls(void);
26 void kvmppc_enable_set_mode_hcall(void);
27 void kvmppc_enable_clear_ref_mod_hcalls(void);
28 void kvmppc_set_papr(PowerPCCPU *cpu);
29 int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr);
30 void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy);
31 int kvmppc_smt_threads(void);
32 int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits);
33 int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits);
34 int kvmppc_set_tcr(PowerPCCPU *cpu);
35 int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu);
36 #ifndef CONFIG_USER_ONLY
37 off_t kvmppc_alloc_rma(void **rma);
38 bool kvmppc_spapr_use_multitce(void);
39 void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t page_shift,
40 uint64_t bus_offset, uint32_t nb_table,
41 int *pfd, bool need_vfio);
42 int kvmppc_remove_spapr_tce(void *table, int pfd, uint32_t window_size);
43 int kvmppc_reset_htab(int shift_hint);
44 uint64_t kvmppc_rma_size(uint64_t current_size, unsigned int hash_shift);
45 #endif /* !CONFIG_USER_ONLY */
46 bool kvmppc_has_cap_epr(void);
47 int kvmppc_define_rtas_kernel_token(uint32_t token, const char *function);
48 bool kvmppc_has_cap_htab_fd(void);
49 int kvmppc_get_htab_fd(bool write);
50 int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, int64_t max_ns);
51 int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index,
52 uint16_t n_valid, uint16_t n_invalid);
53 void kvmppc_read_hptes(ppc_hash_pte64_t *hptes, hwaddr ptex, int n);
54 void kvmppc_write_hpte(hwaddr ptex, uint64_t pte0, uint64_t pte1);
55 bool kvmppc_has_cap_fixup_hcalls(void);
56 bool kvmppc_has_cap_htm(void);
57 bool kvmppc_has_cap_mmu_radix(void);
58 bool kvmppc_has_cap_mmu_hash_v3(void);
59 int kvmppc_enable_hwrng(void);
60 int kvmppc_put_books_sregs(PowerPCCPU *cpu);
61 PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void);
62
63 bool kvmppc_is_mem_backend_page_size_ok(char *obj_path);
64
65 #else
66
67 static inline uint32_t kvmppc_get_tbfreq(void)
68 {
69 return 0;
70 }
71
72 static inline bool kvmppc_get_host_model(char **buf)
73 {
74 return false;
75 }
76
77 static inline bool kvmppc_get_host_serial(char **buf)
78 {
79 return false;
80 }
81
82 static inline uint64_t kvmppc_get_clockfreq(void)
83 {
84 return 0;
85 }
86
87 static inline uint32_t kvmppc_get_vmx(void)
88 {
89 return 0;
90 }
91
92 static inline uint32_t kvmppc_get_dfp(void)
93 {
94 return 0;
95 }
96
97 static inline int kvmppc_get_hasidle(CPUPPCState *env)
98 {
99 return 0;
100 }
101
102 static inline int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len)
103 {
104 return -1;
105 }
106
107 static inline int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level)
108 {
109 return -1;
110 }
111
112 static inline void kvmppc_enable_logical_ci_hcalls(void)
113 {
114 }
115
116 static inline void kvmppc_enable_set_mode_hcall(void)
117 {
118 }
119
120 static inline void kvmppc_enable_clear_ref_mod_hcalls(void)
121 {
122 }
123
124 static inline void kvmppc_set_papr(PowerPCCPU *cpu)
125 {
126 }
127
128 static inline int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr)
129 {
130 return 0;
131 }
132
133 static inline void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy)
134 {
135 }
136
137 static inline int kvmppc_smt_threads(void)
138 {
139 return 1;
140 }
141
142 static inline int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
143 {
144 return 0;
145 }
146
147 static inline int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
148 {
149 return 0;
150 }
151
152 static inline int kvmppc_set_tcr(PowerPCCPU *cpu)
153 {
154 return 0;
155 }
156
157 static inline int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu)
158 {
159 return -1;
160 }
161
162 #ifndef CONFIG_USER_ONLY
163 static inline off_t kvmppc_alloc_rma(void **rma)
164 {
165 return 0;
166 }
167
168 static inline bool kvmppc_spapr_use_multitce(void)
169 {
170 return false;
171 }
172
173 static inline void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t page_shift,
174 uint64_t bus_offset,
175 uint32_t nb_table,
176 int *pfd, bool need_vfio)
177 {
178 return NULL;
179 }
180
181 static inline int kvmppc_remove_spapr_tce(void *table, int pfd,
182 uint32_t nb_table)
183 {
184 return -1;
185 }
186
187 static inline int kvmppc_reset_htab(int shift_hint)
188 {
189 return 0;
190 }
191
192 static inline uint64_t kvmppc_rma_size(uint64_t current_size,
193 unsigned int hash_shift)
194 {
195 return ram_size;
196 }
197
198 static inline bool kvmppc_is_mem_backend_page_size_ok(char *obj_path)
199 {
200 return true;
201 }
202
203 #endif /* !CONFIG_USER_ONLY */
204
205 static inline bool kvmppc_has_cap_epr(void)
206 {
207 return false;
208 }
209
210 static inline int kvmppc_define_rtas_kernel_token(uint32_t token,
211 const char *function)
212 {
213 return -1;
214 }
215
216 static inline bool kvmppc_has_cap_htab_fd(void)
217 {
218 return false;
219 }
220
221 static inline int kvmppc_get_htab_fd(bool write)
222 {
223 return -1;
224 }
225
226 static inline int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize,
227 int64_t max_ns)
228 {
229 abort();
230 }
231
232 static inline int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index,
233 uint16_t n_valid, uint16_t n_invalid)
234 {
235 abort();
236 }
237
238 static inline void kvmppc_read_hptes(ppc_hash_pte64_t *hptes,
239 hwaddr ptex, int n)
240 {
241 abort();
242 }
243
244 static inline void kvmppc_write_hpte(hwaddr ptex, uint64_t pte0, uint64_t pte1)
245 {
246 abort();
247 }
248
249 static inline bool kvmppc_has_cap_fixup_hcalls(void)
250 {
251 abort();
252 }
253
254 static inline bool kvmppc_has_cap_htm(void)
255 {
256 return false;
257 }
258
259 static inline bool kvmppc_has_cap_mmu_radix(void)
260 {
261 return false;
262 }
263
264 static inline bool kvmppc_has_cap_mmu_hash_v3(void)
265 {
266 return false;
267 }
268
269 static inline int kvmppc_enable_hwrng(void)
270 {
271 return -1;
272 }
273
274 static inline int kvmppc_put_books_sregs(PowerPCCPU *cpu)
275 {
276 abort();
277 }
278
279 static inline PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void)
280 {
281 return NULL;
282 }
283
284 #endif
285
286 #ifndef CONFIG_KVM
287
288 #define kvmppc_eieio() do { } while (0)
289
290 static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len)
291 {
292 }
293
294 static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len)
295 {
296 }
297
298 #else /* CONFIG_KVM */
299
300 #define kvmppc_eieio() \
301 do { \
302 if (kvm_enabled()) { \
303 asm volatile("eieio" : : : "memory"); \
304 } \
305 } while (0)
306
307 /* Store data cache blocks back to memory */
308 static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len)
309 {
310 uint8_t *p;
311
312 for (p = addr; p < addr + len; p += cpu->env.dcache_line_size) {
313 asm volatile("dcbst 0,%0" : : "r"(p) : "memory");
314 }
315 }
316
317 /* Invalidate instruction cache blocks */
318 static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len)
319 {
320 uint8_t *p;
321
322 for (p = addr; p < addr + len; p += cpu->env.icache_line_size) {
323 asm volatile("icbi 0,%0" : : "r"(p));
324 }
325 }
326
327 #endif /* CONFIG_KVM */
328
329 #endif /* KVM_PPC_H */