2 * PowerPC integer and vector emulation helpers for QEMU.
4 * Copyright (c) 2003-2007 Jocelyn Mayer
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
21 #include "exec/exec-all.h"
22 #include "qemu/host-utils.h"
23 #include "exec/helper-proto.h"
24 #include "crypto/aes.h"
26 #include "helper_regs.h"
27 /*****************************************************************************/
28 /* Fixed point operations helpers */
30 target_ulong
helper_divweu(CPUPPCState
*env
, target_ulong ra
, target_ulong rb
,
36 uint64_t dividend
= (uint64_t)ra
<< 32;
37 uint64_t divisor
= (uint32_t)rb
;
39 if (unlikely(divisor
== 0)) {
42 rt
= dividend
/ divisor
;
43 overflow
= rt
> UINT32_MAX
;
46 if (unlikely(overflow
)) {
47 rt
= 0; /* Undefined */
51 if (unlikely(overflow
)) {
52 env
->so
= env
->ov
= 1;
58 return (target_ulong
)rt
;
61 target_ulong
helper_divwe(CPUPPCState
*env
, target_ulong ra
, target_ulong rb
,
67 int64_t dividend
= (int64_t)ra
<< 32;
68 int64_t divisor
= (int64_t)((int32_t)rb
);
70 if (unlikely((divisor
== 0) ||
71 ((divisor
== -1ull) && (dividend
== INT64_MIN
)))) {
74 rt
= dividend
/ divisor
;
75 overflow
= rt
!= (int32_t)rt
;
78 if (unlikely(overflow
)) {
79 rt
= 0; /* Undefined */
83 if (unlikely(overflow
)) {
84 env
->so
= env
->ov
= 1;
90 return (target_ulong
)rt
;
93 #if defined(TARGET_PPC64)
95 uint64_t helper_divdeu(CPUPPCState
*env
, uint64_t ra
, uint64_t rb
, uint32_t oe
)
100 overflow
= divu128(&rt
, &ra
, rb
);
102 if (unlikely(overflow
)) {
103 rt
= 0; /* Undefined */
107 if (unlikely(overflow
)) {
108 env
->so
= env
->ov
= 1;
117 uint64_t helper_divde(CPUPPCState
*env
, uint64_t rau
, uint64_t rbu
, uint32_t oe
)
120 int64_t ra
= (int64_t)rau
;
121 int64_t rb
= (int64_t)rbu
;
122 int overflow
= divs128(&rt
, &ra
, rb
);
124 if (unlikely(overflow
)) {
125 rt
= 0; /* Undefined */
130 if (unlikely(overflow
)) {
131 env
->so
= env
->ov
= 1;
143 target_ulong
helper_cntlzw(target_ulong t
)
148 #if defined(TARGET_PPC64)
149 target_ulong
helper_cntlzd(target_ulong t
)
154 target_ulong
helper_cnttzd(target_ulong t
)
160 #if defined(TARGET_PPC64)
162 uint64_t helper_bpermd(uint64_t rs
, uint64_t rb
)
167 for (i
= 0; i
< 8; i
++) {
168 int index
= (rs
>> (i
*8)) & 0xFF;
170 if (rb
& (1ull << (63-index
))) {
180 target_ulong
helper_cmpb(target_ulong rs
, target_ulong rb
)
182 target_ulong mask
= 0xff;
186 for (i
= 0; i
< sizeof(target_ulong
); i
++) {
187 if ((rs
& mask
) == (rb
& mask
)) {
195 /* shift right arithmetic helper */
196 target_ulong
helper_sraw(CPUPPCState
*env
, target_ulong value
,
201 if (likely(!(shift
& 0x20))) {
202 if (likely((uint32_t)shift
!= 0)) {
204 ret
= (int32_t)value
>> shift
;
205 if (likely(ret
>= 0 || (value
& ((1 << shift
) - 1)) == 0)) {
211 ret
= (int32_t)value
;
215 ret
= (int32_t)value
>> 31;
216 env
->ca
= (ret
!= 0);
218 return (target_long
)ret
;
221 #if defined(TARGET_PPC64)
222 target_ulong
helper_srad(CPUPPCState
*env
, target_ulong value
,
227 if (likely(!(shift
& 0x40))) {
228 if (likely((uint64_t)shift
!= 0)) {
230 ret
= (int64_t)value
>> shift
;
231 if (likely(ret
>= 0 || (value
& ((1ULL << shift
) - 1)) == 0)) {
237 ret
= (int64_t)value
;
241 ret
= (int64_t)value
>> 63;
242 env
->ca
= (ret
!= 0);
248 #if defined(TARGET_PPC64)
249 target_ulong
helper_popcntb(target_ulong val
)
251 val
= (val
& 0x5555555555555555ULL
) + ((val
>> 1) &
252 0x5555555555555555ULL
);
253 val
= (val
& 0x3333333333333333ULL
) + ((val
>> 2) &
254 0x3333333333333333ULL
);
255 val
= (val
& 0x0f0f0f0f0f0f0f0fULL
) + ((val
>> 4) &
256 0x0f0f0f0f0f0f0f0fULL
);
260 target_ulong
helper_popcntw(target_ulong val
)
262 val
= (val
& 0x5555555555555555ULL
) + ((val
>> 1) &
263 0x5555555555555555ULL
);
264 val
= (val
& 0x3333333333333333ULL
) + ((val
>> 2) &
265 0x3333333333333333ULL
);
266 val
= (val
& 0x0f0f0f0f0f0f0f0fULL
) + ((val
>> 4) &
267 0x0f0f0f0f0f0f0f0fULL
);
268 val
= (val
& 0x00ff00ff00ff00ffULL
) + ((val
>> 8) &
269 0x00ff00ff00ff00ffULL
);
270 val
= (val
& 0x0000ffff0000ffffULL
) + ((val
>> 16) &
271 0x0000ffff0000ffffULL
);
275 target_ulong
helper_popcntd(target_ulong val
)
280 target_ulong
helper_popcntb(target_ulong val
)
282 val
= (val
& 0x55555555) + ((val
>> 1) & 0x55555555);
283 val
= (val
& 0x33333333) + ((val
>> 2) & 0x33333333);
284 val
= (val
& 0x0f0f0f0f) + ((val
>> 4) & 0x0f0f0f0f);
288 target_ulong
helper_popcntw(target_ulong val
)
290 val
= (val
& 0x55555555) + ((val
>> 1) & 0x55555555);
291 val
= (val
& 0x33333333) + ((val
>> 2) & 0x33333333);
292 val
= (val
& 0x0f0f0f0f) + ((val
>> 4) & 0x0f0f0f0f);
293 val
= (val
& 0x00ff00ff) + ((val
>> 8) & 0x00ff00ff);
294 val
= (val
& 0x0000ffff) + ((val
>> 16) & 0x0000ffff);
299 /*****************************************************************************/
300 /* PowerPC 601 specific instructions (POWER bridge) */
301 target_ulong
helper_div(CPUPPCState
*env
, target_ulong arg1
, target_ulong arg2
)
303 uint64_t tmp
= (uint64_t)arg1
<< 32 | env
->spr
[SPR_MQ
];
305 if (((int32_t)tmp
== INT32_MIN
&& (int32_t)arg2
== (int32_t)-1) ||
306 (int32_t)arg2
== 0) {
307 env
->spr
[SPR_MQ
] = 0;
310 env
->spr
[SPR_MQ
] = tmp
% arg2
;
311 return tmp
/ (int32_t)arg2
;
315 target_ulong
helper_divo(CPUPPCState
*env
, target_ulong arg1
,
318 uint64_t tmp
= (uint64_t)arg1
<< 32 | env
->spr
[SPR_MQ
];
320 if (((int32_t)tmp
== INT32_MIN
&& (int32_t)arg2
== (int32_t)-1) ||
321 (int32_t)arg2
== 0) {
322 env
->so
= env
->ov
= 1;
323 env
->spr
[SPR_MQ
] = 0;
326 env
->spr
[SPR_MQ
] = tmp
% arg2
;
327 tmp
/= (int32_t)arg2
;
328 if ((int32_t)tmp
!= tmp
) {
329 env
->so
= env
->ov
= 1;
337 target_ulong
helper_divs(CPUPPCState
*env
, target_ulong arg1
,
340 if (((int32_t)arg1
== INT32_MIN
&& (int32_t)arg2
== (int32_t)-1) ||
341 (int32_t)arg2
== 0) {
342 env
->spr
[SPR_MQ
] = 0;
345 env
->spr
[SPR_MQ
] = (int32_t)arg1
% (int32_t)arg2
;
346 return (int32_t)arg1
/ (int32_t)arg2
;
350 target_ulong
helper_divso(CPUPPCState
*env
, target_ulong arg1
,
353 if (((int32_t)arg1
== INT32_MIN
&& (int32_t)arg2
== (int32_t)-1) ||
354 (int32_t)arg2
== 0) {
355 env
->so
= env
->ov
= 1;
356 env
->spr
[SPR_MQ
] = 0;
360 env
->spr
[SPR_MQ
] = (int32_t)arg1
% (int32_t)arg2
;
361 return (int32_t)arg1
/ (int32_t)arg2
;
365 /*****************************************************************************/
366 /* 602 specific instructions */
367 /* mfrom is the most crazy instruction ever seen, imho ! */
368 /* Real implementation uses a ROM table. Do the same */
369 /* Extremely decomposed:
371 * return 256 * log10(10 + 1.0) + 0.5
373 #if !defined(CONFIG_USER_ONLY)
374 target_ulong
helper_602_mfrom(target_ulong arg
)
376 if (likely(arg
< 602)) {
377 #include "mfrom_table.c"
378 return mfrom_ROM_table
[arg
];
385 /*****************************************************************************/
386 /* Altivec extension helpers */
387 #if defined(HOST_WORDS_BIGENDIAN)
390 #define AVRB(i) u8[i]
391 #define AVRW(i) u32[i]
395 #define AVRB(i) u8[15-(i)]
396 #define AVRW(i) u32[3-(i)]
399 #if defined(HOST_WORDS_BIGENDIAN)
400 #define VECTOR_FOR_INORDER_I(index, element) \
401 for (index = 0; index < ARRAY_SIZE(r->element); index++)
403 #define VECTOR_FOR_INORDER_I(index, element) \
404 for (index = ARRAY_SIZE(r->element)-1; index >= 0; index--)
407 /* Saturating arithmetic helpers. */
408 #define SATCVT(from, to, from_type, to_type, min, max) \
409 static inline to_type cvt##from##to(from_type x, int *sat) \
413 if (x < (from_type)min) { \
416 } else if (x > (from_type)max) { \
424 #define SATCVTU(from, to, from_type, to_type, min, max) \
425 static inline to_type cvt##from##to(from_type x, int *sat) \
429 if (x > (from_type)max) { \
437 SATCVT(sh
, sb
, int16_t, int8_t, INT8_MIN
, INT8_MAX
)
438 SATCVT(sw
, sh
, int32_t, int16_t, INT16_MIN
, INT16_MAX
)
439 SATCVT(sd
, sw
, int64_t, int32_t, INT32_MIN
, INT32_MAX
)
441 SATCVTU(uh
, ub
, uint16_t, uint8_t, 0, UINT8_MAX
)
442 SATCVTU(uw
, uh
, uint32_t, uint16_t, 0, UINT16_MAX
)
443 SATCVTU(ud
, uw
, uint64_t, uint32_t, 0, UINT32_MAX
)
444 SATCVT(sh
, ub
, int16_t, uint8_t, 0, UINT8_MAX
)
445 SATCVT(sw
, uh
, int32_t, uint16_t, 0, UINT16_MAX
)
446 SATCVT(sd
, uw
, int64_t, uint32_t, 0, UINT32_MAX
)
450 void helper_lvsl(ppc_avr_t
*r
, target_ulong sh
)
452 int i
, j
= (sh
& 0xf);
454 VECTOR_FOR_INORDER_I(i
, u8
) {
459 void helper_lvsr(ppc_avr_t
*r
, target_ulong sh
)
461 int i
, j
= 0x10 - (sh
& 0xf);
463 VECTOR_FOR_INORDER_I(i
, u8
) {
468 void helper_mtvscr(CPUPPCState
*env
, ppc_avr_t
*r
)
470 #if defined(HOST_WORDS_BIGENDIAN)
471 env
->vscr
= r
->u32
[3];
473 env
->vscr
= r
->u32
[0];
475 set_flush_to_zero(vscr_nj
, &env
->vec_status
);
478 void helper_vaddcuw(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
482 for (i
= 0; i
< ARRAY_SIZE(r
->u32
); i
++) {
483 r
->u32
[i
] = ~a
->u32
[i
] < b
->u32
[i
];
487 #define VARITH_DO(name, op, element) \
488 void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
492 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
493 r->element[i] = a->element[i] op b->element[i]; \
496 #define VARITH(suffix, element) \
497 VARITH_DO(add##suffix, +, element) \
498 VARITH_DO(sub##suffix, -, element)
503 VARITH_DO(muluwm
, *, u32
)
507 #define VARITHFP(suffix, func) \
508 void helper_v##suffix(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, \
513 for (i = 0; i < ARRAY_SIZE(r->f); i++) { \
514 r->f[i] = func(a->f[i], b->f[i], &env->vec_status); \
517 VARITHFP(addfp
, float32_add
)
518 VARITHFP(subfp
, float32_sub
)
519 VARITHFP(minfp
, float32_min
)
520 VARITHFP(maxfp
, float32_max
)
523 #define VARITHFPFMA(suffix, type) \
524 void helper_v##suffix(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, \
525 ppc_avr_t *b, ppc_avr_t *c) \
528 for (i = 0; i < ARRAY_SIZE(r->f); i++) { \
529 r->f[i] = float32_muladd(a->f[i], c->f[i], b->f[i], \
530 type, &env->vec_status); \
533 VARITHFPFMA(maddfp
, 0);
534 VARITHFPFMA(nmsubfp
, float_muladd_negate_result
| float_muladd_negate_c
);
537 #define VARITHSAT_CASE(type, op, cvt, element) \
539 type result = (type)a->element[i] op (type)b->element[i]; \
540 r->element[i] = cvt(result, &sat); \
543 #define VARITHSAT_DO(name, op, optype, cvt, element) \
544 void helper_v##name(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, \
550 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
551 switch (sizeof(r->element[0])) { \
553 VARITHSAT_CASE(optype, op, cvt, element); \
556 VARITHSAT_CASE(optype, op, cvt, element); \
559 VARITHSAT_CASE(optype, op, cvt, element); \
564 env->vscr |= (1 << VSCR_SAT); \
567 #define VARITHSAT_SIGNED(suffix, element, optype, cvt) \
568 VARITHSAT_DO(adds##suffix##s, +, optype, cvt, element) \
569 VARITHSAT_DO(subs##suffix##s, -, optype, cvt, element)
570 #define VARITHSAT_UNSIGNED(suffix, element, optype, cvt) \
571 VARITHSAT_DO(addu##suffix##s, +, optype, cvt, element) \
572 VARITHSAT_DO(subu##suffix##s, -, optype, cvt, element)
573 VARITHSAT_SIGNED(b
, s8
, int16_t, cvtshsb
)
574 VARITHSAT_SIGNED(h
, s16
, int32_t, cvtswsh
)
575 VARITHSAT_SIGNED(w
, s32
, int64_t, cvtsdsw
)
576 VARITHSAT_UNSIGNED(b
, u8
, uint16_t, cvtshub
)
577 VARITHSAT_UNSIGNED(h
, u16
, uint32_t, cvtswuh
)
578 VARITHSAT_UNSIGNED(w
, u32
, uint64_t, cvtsduw
)
579 #undef VARITHSAT_CASE
581 #undef VARITHSAT_SIGNED
582 #undef VARITHSAT_UNSIGNED
584 #define VAVG_DO(name, element, etype) \
585 void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
589 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
590 etype x = (etype)a->element[i] + (etype)b->element[i] + 1; \
591 r->element[i] = x >> 1; \
595 #define VAVG(type, signed_element, signed_type, unsigned_element, \
597 VAVG_DO(avgs##type, signed_element, signed_type) \
598 VAVG_DO(avgu##type, unsigned_element, unsigned_type)
599 VAVG(b
, s8
, int16_t, u8
, uint16_t)
600 VAVG(h
, s16
, int32_t, u16
, uint32_t)
601 VAVG(w
, s32
, int64_t, u32
, uint64_t)
605 #define VCF(suffix, cvt, element) \
606 void helper_vcf##suffix(CPUPPCState *env, ppc_avr_t *r, \
607 ppc_avr_t *b, uint32_t uim) \
611 for (i = 0; i < ARRAY_SIZE(r->f); i++) { \
612 float32 t = cvt(b->element[i], &env->vec_status); \
613 r->f[i] = float32_scalbn(t, -uim, &env->vec_status); \
616 VCF(ux
, uint32_to_float32
, u32
)
617 VCF(sx
, int32_to_float32
, s32
)
620 #define VCMP_DO(suffix, compare, element, record) \
621 void helper_vcmp##suffix(CPUPPCState *env, ppc_avr_t *r, \
622 ppc_avr_t *a, ppc_avr_t *b) \
624 uint64_t ones = (uint64_t)-1; \
625 uint64_t all = ones; \
629 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
630 uint64_t result = (a->element[i] compare b->element[i] ? \
632 switch (sizeof(a->element[0])) { \
634 r->u64[i] = result; \
637 r->u32[i] = result; \
640 r->u16[i] = result; \
650 env->crf[6] = ((all != 0) << 3) | ((none == 0) << 1); \
653 #define VCMP(suffix, compare, element) \
654 VCMP_DO(suffix, compare, element, 0) \
655 VCMP_DO(suffix##_dot, compare, element, 1)
671 #define VCMPFP_DO(suffix, compare, order, record) \
672 void helper_vcmp##suffix(CPUPPCState *env, ppc_avr_t *r, \
673 ppc_avr_t *a, ppc_avr_t *b) \
675 uint32_t ones = (uint32_t)-1; \
676 uint32_t all = ones; \
680 for (i = 0; i < ARRAY_SIZE(r->f); i++) { \
682 int rel = float32_compare_quiet(a->f[i], b->f[i], \
684 if (rel == float_relation_unordered) { \
686 } else if (rel compare order) { \
691 r->u32[i] = result; \
696 env->crf[6] = ((all != 0) << 3) | ((none == 0) << 1); \
699 #define VCMPFP(suffix, compare, order) \
700 VCMPFP_DO(suffix, compare, order, 0) \
701 VCMPFP_DO(suffix##_dot, compare, order, 1)
702 VCMPFP(eqfp
, ==, float_relation_equal
)
703 VCMPFP(gefp
, !=, float_relation_less
)
704 VCMPFP(gtfp
, ==, float_relation_greater
)
708 static inline void vcmpbfp_internal(CPUPPCState
*env
, ppc_avr_t
*r
,
709 ppc_avr_t
*a
, ppc_avr_t
*b
, int record
)
714 for (i
= 0; i
< ARRAY_SIZE(r
->f
); i
++) {
715 int le_rel
= float32_compare_quiet(a
->f
[i
], b
->f
[i
], &env
->vec_status
);
716 if (le_rel
== float_relation_unordered
) {
717 r
->u32
[i
] = 0xc0000000;
720 float32 bneg
= float32_chs(b
->f
[i
]);
721 int ge_rel
= float32_compare_quiet(a
->f
[i
], bneg
, &env
->vec_status
);
722 int le
= le_rel
!= float_relation_greater
;
723 int ge
= ge_rel
!= float_relation_less
;
725 r
->u32
[i
] = ((!le
) << 31) | ((!ge
) << 30);
726 all_in
|= (!le
| !ge
);
730 env
->crf
[6] = (all_in
== 0) << 1;
734 void helper_vcmpbfp(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
736 vcmpbfp_internal(env
, r
, a
, b
, 0);
739 void helper_vcmpbfp_dot(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
742 vcmpbfp_internal(env
, r
, a
, b
, 1);
745 #define VCT(suffix, satcvt, element) \
746 void helper_vct##suffix(CPUPPCState *env, ppc_avr_t *r, \
747 ppc_avr_t *b, uint32_t uim) \
751 float_status s = env->vec_status; \
753 set_float_rounding_mode(float_round_to_zero, &s); \
754 for (i = 0; i < ARRAY_SIZE(r->f); i++) { \
755 if (float32_is_any_nan(b->f[i])) { \
758 float64 t = float32_to_float64(b->f[i], &s); \
761 t = float64_scalbn(t, uim, &s); \
762 j = float64_to_int64(t, &s); \
763 r->element[i] = satcvt(j, &sat); \
767 env->vscr |= (1 << VSCR_SAT); \
770 VCT(uxs
, cvtsduw
, u32
)
771 VCT(sxs
, cvtsdsw
, s32
)
774 void helper_vmhaddshs(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
775 ppc_avr_t
*b
, ppc_avr_t
*c
)
780 for (i
= 0; i
< ARRAY_SIZE(r
->s16
); i
++) {
781 int32_t prod
= a
->s16
[i
] * b
->s16
[i
];
782 int32_t t
= (int32_t)c
->s16
[i
] + (prod
>> 15);
784 r
->s16
[i
] = cvtswsh(t
, &sat
);
788 env
->vscr
|= (1 << VSCR_SAT
);
792 void helper_vmhraddshs(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
793 ppc_avr_t
*b
, ppc_avr_t
*c
)
798 for (i
= 0; i
< ARRAY_SIZE(r
->s16
); i
++) {
799 int32_t prod
= a
->s16
[i
] * b
->s16
[i
] + 0x00004000;
800 int32_t t
= (int32_t)c
->s16
[i
] + (prod
>> 15);
801 r
->s16
[i
] = cvtswsh(t
, &sat
);
805 env
->vscr
|= (1 << VSCR_SAT
);
809 #define VMINMAX_DO(name, compare, element) \
810 void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
814 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
815 if (a->element[i] compare b->element[i]) { \
816 r->element[i] = b->element[i]; \
818 r->element[i] = a->element[i]; \
822 #define VMINMAX(suffix, element) \
823 VMINMAX_DO(min##suffix, >, element) \
824 VMINMAX_DO(max##suffix, <, element)
836 void helper_vmladduhm(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, ppc_avr_t
*c
)
840 for (i
= 0; i
< ARRAY_SIZE(r
->s16
); i
++) {
841 int32_t prod
= a
->s16
[i
] * b
->s16
[i
];
842 r
->s16
[i
] = (int16_t) (prod
+ c
->s16
[i
]);
846 #define VMRG_DO(name, element, highp) \
847 void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
851 size_t n_elems = ARRAY_SIZE(r->element); \
853 for (i = 0; i < n_elems / 2; i++) { \
855 result.element[i*2+HI_IDX] = a->element[i]; \
856 result.element[i*2+LO_IDX] = b->element[i]; \
858 result.element[n_elems - i * 2 - (1 + HI_IDX)] = \
859 b->element[n_elems - i - 1]; \
860 result.element[n_elems - i * 2 - (1 + LO_IDX)] = \
861 a->element[n_elems - i - 1]; \
866 #if defined(HOST_WORDS_BIGENDIAN)
873 #define VMRG(suffix, element) \
874 VMRG_DO(mrgl##suffix, element, MRGHI) \
875 VMRG_DO(mrgh##suffix, element, MRGLO)
884 void helper_vmsummbm(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
885 ppc_avr_t
*b
, ppc_avr_t
*c
)
890 for (i
= 0; i
< ARRAY_SIZE(r
->s8
); i
++) {
891 prod
[i
] = (int32_t)a
->s8
[i
] * b
->u8
[i
];
894 VECTOR_FOR_INORDER_I(i
, s32
) {
895 r
->s32
[i
] = c
->s32
[i
] + prod
[4 * i
] + prod
[4 * i
+ 1] +
896 prod
[4 * i
+ 2] + prod
[4 * i
+ 3];
900 void helper_vmsumshm(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
901 ppc_avr_t
*b
, ppc_avr_t
*c
)
906 for (i
= 0; i
< ARRAY_SIZE(r
->s16
); i
++) {
907 prod
[i
] = a
->s16
[i
] * b
->s16
[i
];
910 VECTOR_FOR_INORDER_I(i
, s32
) {
911 r
->s32
[i
] = c
->s32
[i
] + prod
[2 * i
] + prod
[2 * i
+ 1];
915 void helper_vmsumshs(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
916 ppc_avr_t
*b
, ppc_avr_t
*c
)
922 for (i
= 0; i
< ARRAY_SIZE(r
->s16
); i
++) {
923 prod
[i
] = (int32_t)a
->s16
[i
] * b
->s16
[i
];
926 VECTOR_FOR_INORDER_I(i
, s32
) {
927 int64_t t
= (int64_t)c
->s32
[i
] + prod
[2 * i
] + prod
[2 * i
+ 1];
929 r
->u32
[i
] = cvtsdsw(t
, &sat
);
933 env
->vscr
|= (1 << VSCR_SAT
);
937 void helper_vmsumubm(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
938 ppc_avr_t
*b
, ppc_avr_t
*c
)
943 for (i
= 0; i
< ARRAY_SIZE(r
->u8
); i
++) {
944 prod
[i
] = a
->u8
[i
] * b
->u8
[i
];
947 VECTOR_FOR_INORDER_I(i
, u32
) {
948 r
->u32
[i
] = c
->u32
[i
] + prod
[4 * i
] + prod
[4 * i
+ 1] +
949 prod
[4 * i
+ 2] + prod
[4 * i
+ 3];
953 void helper_vmsumuhm(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
954 ppc_avr_t
*b
, ppc_avr_t
*c
)
959 for (i
= 0; i
< ARRAY_SIZE(r
->u16
); i
++) {
960 prod
[i
] = a
->u16
[i
] * b
->u16
[i
];
963 VECTOR_FOR_INORDER_I(i
, u32
) {
964 r
->u32
[i
] = c
->u32
[i
] + prod
[2 * i
] + prod
[2 * i
+ 1];
968 void helper_vmsumuhs(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
,
969 ppc_avr_t
*b
, ppc_avr_t
*c
)
975 for (i
= 0; i
< ARRAY_SIZE(r
->u16
); i
++) {
976 prod
[i
] = a
->u16
[i
] * b
->u16
[i
];
979 VECTOR_FOR_INORDER_I(i
, s32
) {
980 uint64_t t
= (uint64_t)c
->u32
[i
] + prod
[2 * i
] + prod
[2 * i
+ 1];
982 r
->u32
[i
] = cvtuduw(t
, &sat
);
986 env
->vscr
|= (1 << VSCR_SAT
);
990 #define VMUL_DO(name, mul_element, prod_element, cast, evenp) \
991 void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
995 VECTOR_FOR_INORDER_I(i, prod_element) { \
997 r->prod_element[i] = \
998 (cast)a->mul_element[i * 2 + HI_IDX] * \
999 (cast)b->mul_element[i * 2 + HI_IDX]; \
1001 r->prod_element[i] = \
1002 (cast)a->mul_element[i * 2 + LO_IDX] * \
1003 (cast)b->mul_element[i * 2 + LO_IDX]; \
1007 #define VMUL(suffix, mul_element, prod_element, cast) \
1008 VMUL_DO(mule##suffix, mul_element, prod_element, cast, 1) \
1009 VMUL_DO(mulo##suffix, mul_element, prod_element, cast, 0)
1010 VMUL(sb
, s8
, s16
, int16_t)
1011 VMUL(sh
, s16
, s32
, int32_t)
1012 VMUL(sw
, s32
, s64
, int64_t)
1013 VMUL(ub
, u8
, u16
, uint16_t)
1014 VMUL(uh
, u16
, u32
, uint32_t)
1015 VMUL(uw
, u32
, u64
, uint64_t)
1019 void helper_vperm(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
,
1025 VECTOR_FOR_INORDER_I(i
, u8
) {
1026 int s
= c
->u8
[i
] & 0x1f;
1027 #if defined(HOST_WORDS_BIGENDIAN)
1028 int index
= s
& 0xf;
1030 int index
= 15 - (s
& 0xf);
1034 result
.u8
[i
] = b
->u8
[index
];
1036 result
.u8
[i
] = a
->u8
[index
];
1042 #if defined(HOST_WORDS_BIGENDIAN)
1043 #define VBPERMQ_INDEX(avr, i) ((avr)->u8[(i)])
1044 #define VBPERMQ_DW(index) (((index) & 0x40) != 0)
1046 #define VBPERMQ_INDEX(avr, i) ((avr)->u8[15-(i)])
1047 #define VBPERMQ_DW(index) (((index) & 0x40) == 0)
1050 void helper_vbpermq(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1055 VECTOR_FOR_INORDER_I(i
, u8
) {
1056 int index
= VBPERMQ_INDEX(b
, i
);
1059 uint64_t mask
= (1ull << (63-(index
& 0x3F)));
1060 if (a
->u64
[VBPERMQ_DW(index
)] & mask
) {
1061 perm
|= (0x8000 >> i
);
1066 r
->u64
[HI_IDX
] = perm
;
1070 #undef VBPERMQ_INDEX
1073 static const uint64_t VGBBD_MASKS
[256] = {
1074 0x0000000000000000ull
, /* 00 */
1075 0x0000000000000080ull
, /* 01 */
1076 0x0000000000008000ull
, /* 02 */
1077 0x0000000000008080ull
, /* 03 */
1078 0x0000000000800000ull
, /* 04 */
1079 0x0000000000800080ull
, /* 05 */
1080 0x0000000000808000ull
, /* 06 */
1081 0x0000000000808080ull
, /* 07 */
1082 0x0000000080000000ull
, /* 08 */
1083 0x0000000080000080ull
, /* 09 */
1084 0x0000000080008000ull
, /* 0A */
1085 0x0000000080008080ull
, /* 0B */
1086 0x0000000080800000ull
, /* 0C */
1087 0x0000000080800080ull
, /* 0D */
1088 0x0000000080808000ull
, /* 0E */
1089 0x0000000080808080ull
, /* 0F */
1090 0x0000008000000000ull
, /* 10 */
1091 0x0000008000000080ull
, /* 11 */
1092 0x0000008000008000ull
, /* 12 */
1093 0x0000008000008080ull
, /* 13 */
1094 0x0000008000800000ull
, /* 14 */
1095 0x0000008000800080ull
, /* 15 */
1096 0x0000008000808000ull
, /* 16 */
1097 0x0000008000808080ull
, /* 17 */
1098 0x0000008080000000ull
, /* 18 */
1099 0x0000008080000080ull
, /* 19 */
1100 0x0000008080008000ull
, /* 1A */
1101 0x0000008080008080ull
, /* 1B */
1102 0x0000008080800000ull
, /* 1C */
1103 0x0000008080800080ull
, /* 1D */
1104 0x0000008080808000ull
, /* 1E */
1105 0x0000008080808080ull
, /* 1F */
1106 0x0000800000000000ull
, /* 20 */
1107 0x0000800000000080ull
, /* 21 */
1108 0x0000800000008000ull
, /* 22 */
1109 0x0000800000008080ull
, /* 23 */
1110 0x0000800000800000ull
, /* 24 */
1111 0x0000800000800080ull
, /* 25 */
1112 0x0000800000808000ull
, /* 26 */
1113 0x0000800000808080ull
, /* 27 */
1114 0x0000800080000000ull
, /* 28 */
1115 0x0000800080000080ull
, /* 29 */
1116 0x0000800080008000ull
, /* 2A */
1117 0x0000800080008080ull
, /* 2B */
1118 0x0000800080800000ull
, /* 2C */
1119 0x0000800080800080ull
, /* 2D */
1120 0x0000800080808000ull
, /* 2E */
1121 0x0000800080808080ull
, /* 2F */
1122 0x0000808000000000ull
, /* 30 */
1123 0x0000808000000080ull
, /* 31 */
1124 0x0000808000008000ull
, /* 32 */
1125 0x0000808000008080ull
, /* 33 */
1126 0x0000808000800000ull
, /* 34 */
1127 0x0000808000800080ull
, /* 35 */
1128 0x0000808000808000ull
, /* 36 */
1129 0x0000808000808080ull
, /* 37 */
1130 0x0000808080000000ull
, /* 38 */
1131 0x0000808080000080ull
, /* 39 */
1132 0x0000808080008000ull
, /* 3A */
1133 0x0000808080008080ull
, /* 3B */
1134 0x0000808080800000ull
, /* 3C */
1135 0x0000808080800080ull
, /* 3D */
1136 0x0000808080808000ull
, /* 3E */
1137 0x0000808080808080ull
, /* 3F */
1138 0x0080000000000000ull
, /* 40 */
1139 0x0080000000000080ull
, /* 41 */
1140 0x0080000000008000ull
, /* 42 */
1141 0x0080000000008080ull
, /* 43 */
1142 0x0080000000800000ull
, /* 44 */
1143 0x0080000000800080ull
, /* 45 */
1144 0x0080000000808000ull
, /* 46 */
1145 0x0080000000808080ull
, /* 47 */
1146 0x0080000080000000ull
, /* 48 */
1147 0x0080000080000080ull
, /* 49 */
1148 0x0080000080008000ull
, /* 4A */
1149 0x0080000080008080ull
, /* 4B */
1150 0x0080000080800000ull
, /* 4C */
1151 0x0080000080800080ull
, /* 4D */
1152 0x0080000080808000ull
, /* 4E */
1153 0x0080000080808080ull
, /* 4F */
1154 0x0080008000000000ull
, /* 50 */
1155 0x0080008000000080ull
, /* 51 */
1156 0x0080008000008000ull
, /* 52 */
1157 0x0080008000008080ull
, /* 53 */
1158 0x0080008000800000ull
, /* 54 */
1159 0x0080008000800080ull
, /* 55 */
1160 0x0080008000808000ull
, /* 56 */
1161 0x0080008000808080ull
, /* 57 */
1162 0x0080008080000000ull
, /* 58 */
1163 0x0080008080000080ull
, /* 59 */
1164 0x0080008080008000ull
, /* 5A */
1165 0x0080008080008080ull
, /* 5B */
1166 0x0080008080800000ull
, /* 5C */
1167 0x0080008080800080ull
, /* 5D */
1168 0x0080008080808000ull
, /* 5E */
1169 0x0080008080808080ull
, /* 5F */
1170 0x0080800000000000ull
, /* 60 */
1171 0x0080800000000080ull
, /* 61 */
1172 0x0080800000008000ull
, /* 62 */
1173 0x0080800000008080ull
, /* 63 */
1174 0x0080800000800000ull
, /* 64 */
1175 0x0080800000800080ull
, /* 65 */
1176 0x0080800000808000ull
, /* 66 */
1177 0x0080800000808080ull
, /* 67 */
1178 0x0080800080000000ull
, /* 68 */
1179 0x0080800080000080ull
, /* 69 */
1180 0x0080800080008000ull
, /* 6A */
1181 0x0080800080008080ull
, /* 6B */
1182 0x0080800080800000ull
, /* 6C */
1183 0x0080800080800080ull
, /* 6D */
1184 0x0080800080808000ull
, /* 6E */
1185 0x0080800080808080ull
, /* 6F */
1186 0x0080808000000000ull
, /* 70 */
1187 0x0080808000000080ull
, /* 71 */
1188 0x0080808000008000ull
, /* 72 */
1189 0x0080808000008080ull
, /* 73 */
1190 0x0080808000800000ull
, /* 74 */
1191 0x0080808000800080ull
, /* 75 */
1192 0x0080808000808000ull
, /* 76 */
1193 0x0080808000808080ull
, /* 77 */
1194 0x0080808080000000ull
, /* 78 */
1195 0x0080808080000080ull
, /* 79 */
1196 0x0080808080008000ull
, /* 7A */
1197 0x0080808080008080ull
, /* 7B */
1198 0x0080808080800000ull
, /* 7C */
1199 0x0080808080800080ull
, /* 7D */
1200 0x0080808080808000ull
, /* 7E */
1201 0x0080808080808080ull
, /* 7F */
1202 0x8000000000000000ull
, /* 80 */
1203 0x8000000000000080ull
, /* 81 */
1204 0x8000000000008000ull
, /* 82 */
1205 0x8000000000008080ull
, /* 83 */
1206 0x8000000000800000ull
, /* 84 */
1207 0x8000000000800080ull
, /* 85 */
1208 0x8000000000808000ull
, /* 86 */
1209 0x8000000000808080ull
, /* 87 */
1210 0x8000000080000000ull
, /* 88 */
1211 0x8000000080000080ull
, /* 89 */
1212 0x8000000080008000ull
, /* 8A */
1213 0x8000000080008080ull
, /* 8B */
1214 0x8000000080800000ull
, /* 8C */
1215 0x8000000080800080ull
, /* 8D */
1216 0x8000000080808000ull
, /* 8E */
1217 0x8000000080808080ull
, /* 8F */
1218 0x8000008000000000ull
, /* 90 */
1219 0x8000008000000080ull
, /* 91 */
1220 0x8000008000008000ull
, /* 92 */
1221 0x8000008000008080ull
, /* 93 */
1222 0x8000008000800000ull
, /* 94 */
1223 0x8000008000800080ull
, /* 95 */
1224 0x8000008000808000ull
, /* 96 */
1225 0x8000008000808080ull
, /* 97 */
1226 0x8000008080000000ull
, /* 98 */
1227 0x8000008080000080ull
, /* 99 */
1228 0x8000008080008000ull
, /* 9A */
1229 0x8000008080008080ull
, /* 9B */
1230 0x8000008080800000ull
, /* 9C */
1231 0x8000008080800080ull
, /* 9D */
1232 0x8000008080808000ull
, /* 9E */
1233 0x8000008080808080ull
, /* 9F */
1234 0x8000800000000000ull
, /* A0 */
1235 0x8000800000000080ull
, /* A1 */
1236 0x8000800000008000ull
, /* A2 */
1237 0x8000800000008080ull
, /* A3 */
1238 0x8000800000800000ull
, /* A4 */
1239 0x8000800000800080ull
, /* A5 */
1240 0x8000800000808000ull
, /* A6 */
1241 0x8000800000808080ull
, /* A7 */
1242 0x8000800080000000ull
, /* A8 */
1243 0x8000800080000080ull
, /* A9 */
1244 0x8000800080008000ull
, /* AA */
1245 0x8000800080008080ull
, /* AB */
1246 0x8000800080800000ull
, /* AC */
1247 0x8000800080800080ull
, /* AD */
1248 0x8000800080808000ull
, /* AE */
1249 0x8000800080808080ull
, /* AF */
1250 0x8000808000000000ull
, /* B0 */
1251 0x8000808000000080ull
, /* B1 */
1252 0x8000808000008000ull
, /* B2 */
1253 0x8000808000008080ull
, /* B3 */
1254 0x8000808000800000ull
, /* B4 */
1255 0x8000808000800080ull
, /* B5 */
1256 0x8000808000808000ull
, /* B6 */
1257 0x8000808000808080ull
, /* B7 */
1258 0x8000808080000000ull
, /* B8 */
1259 0x8000808080000080ull
, /* B9 */
1260 0x8000808080008000ull
, /* BA */
1261 0x8000808080008080ull
, /* BB */
1262 0x8000808080800000ull
, /* BC */
1263 0x8000808080800080ull
, /* BD */
1264 0x8000808080808000ull
, /* BE */
1265 0x8000808080808080ull
, /* BF */
1266 0x8080000000000000ull
, /* C0 */
1267 0x8080000000000080ull
, /* C1 */
1268 0x8080000000008000ull
, /* C2 */
1269 0x8080000000008080ull
, /* C3 */
1270 0x8080000000800000ull
, /* C4 */
1271 0x8080000000800080ull
, /* C5 */
1272 0x8080000000808000ull
, /* C6 */
1273 0x8080000000808080ull
, /* C7 */
1274 0x8080000080000000ull
, /* C8 */
1275 0x8080000080000080ull
, /* C9 */
1276 0x8080000080008000ull
, /* CA */
1277 0x8080000080008080ull
, /* CB */
1278 0x8080000080800000ull
, /* CC */
1279 0x8080000080800080ull
, /* CD */
1280 0x8080000080808000ull
, /* CE */
1281 0x8080000080808080ull
, /* CF */
1282 0x8080008000000000ull
, /* D0 */
1283 0x8080008000000080ull
, /* D1 */
1284 0x8080008000008000ull
, /* D2 */
1285 0x8080008000008080ull
, /* D3 */
1286 0x8080008000800000ull
, /* D4 */
1287 0x8080008000800080ull
, /* D5 */
1288 0x8080008000808000ull
, /* D6 */
1289 0x8080008000808080ull
, /* D7 */
1290 0x8080008080000000ull
, /* D8 */
1291 0x8080008080000080ull
, /* D9 */
1292 0x8080008080008000ull
, /* DA */
1293 0x8080008080008080ull
, /* DB */
1294 0x8080008080800000ull
, /* DC */
1295 0x8080008080800080ull
, /* DD */
1296 0x8080008080808000ull
, /* DE */
1297 0x8080008080808080ull
, /* DF */
1298 0x8080800000000000ull
, /* E0 */
1299 0x8080800000000080ull
, /* E1 */
1300 0x8080800000008000ull
, /* E2 */
1301 0x8080800000008080ull
, /* E3 */
1302 0x8080800000800000ull
, /* E4 */
1303 0x8080800000800080ull
, /* E5 */
1304 0x8080800000808000ull
, /* E6 */
1305 0x8080800000808080ull
, /* E7 */
1306 0x8080800080000000ull
, /* E8 */
1307 0x8080800080000080ull
, /* E9 */
1308 0x8080800080008000ull
, /* EA */
1309 0x8080800080008080ull
, /* EB */
1310 0x8080800080800000ull
, /* EC */
1311 0x8080800080800080ull
, /* ED */
1312 0x8080800080808000ull
, /* EE */
1313 0x8080800080808080ull
, /* EF */
1314 0x8080808000000000ull
, /* F0 */
1315 0x8080808000000080ull
, /* F1 */
1316 0x8080808000008000ull
, /* F2 */
1317 0x8080808000008080ull
, /* F3 */
1318 0x8080808000800000ull
, /* F4 */
1319 0x8080808000800080ull
, /* F5 */
1320 0x8080808000808000ull
, /* F6 */
1321 0x8080808000808080ull
, /* F7 */
1322 0x8080808080000000ull
, /* F8 */
1323 0x8080808080000080ull
, /* F9 */
1324 0x8080808080008000ull
, /* FA */
1325 0x8080808080008080ull
, /* FB */
1326 0x8080808080800000ull
, /* FC */
1327 0x8080808080800080ull
, /* FD */
1328 0x8080808080808000ull
, /* FE */
1329 0x8080808080808080ull
, /* FF */
1332 void helper_vgbbd(ppc_avr_t
*r
, ppc_avr_t
*b
)
1335 uint64_t t
[2] = { 0, 0 };
1337 VECTOR_FOR_INORDER_I(i
, u8
) {
1338 #if defined(HOST_WORDS_BIGENDIAN)
1339 t
[i
>>3] |= VGBBD_MASKS
[b
->u8
[i
]] >> (i
& 7);
1341 t
[i
>>3] |= VGBBD_MASKS
[b
->u8
[i
]] >> (7-(i
& 7));
1349 #define PMSUM(name, srcfld, trgfld, trgtyp) \
1350 void helper_##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
1353 trgtyp prod[sizeof(ppc_avr_t)/sizeof(a->srcfld[0])]; \
1355 VECTOR_FOR_INORDER_I(i, srcfld) { \
1357 for (j = 0; j < sizeof(a->srcfld[0]) * 8; j++) { \
1358 if (a->srcfld[i] & (1ull<<j)) { \
1359 prod[i] ^= ((trgtyp)b->srcfld[i] << j); \
1364 VECTOR_FOR_INORDER_I(i, trgfld) { \
1365 r->trgfld[i] = prod[2*i] ^ prod[2*i+1]; \
1369 PMSUM(vpmsumb
, u8
, u16
, uint16_t)
1370 PMSUM(vpmsumh
, u16
, u32
, uint32_t)
1371 PMSUM(vpmsumw
, u32
, u64
, uint64_t)
1373 void helper_vpmsumd(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1376 #ifdef CONFIG_INT128
1378 __uint128_t prod
[2];
1380 VECTOR_FOR_INORDER_I(i
, u64
) {
1382 for (j
= 0; j
< 64; j
++) {
1383 if (a
->u64
[i
] & (1ull<<j
)) {
1384 prod
[i
] ^= (((__uint128_t
)b
->u64
[i
]) << j
);
1389 r
->u128
= prod
[0] ^ prod
[1];
1395 VECTOR_FOR_INORDER_I(i
, u64
) {
1396 prod
[i
].u64
[LO_IDX
] = prod
[i
].u64
[HI_IDX
] = 0;
1397 for (j
= 0; j
< 64; j
++) {
1398 if (a
->u64
[i
] & (1ull<<j
)) {
1401 bshift
.u64
[HI_IDX
] = 0;
1402 bshift
.u64
[LO_IDX
] = b
->u64
[i
];
1404 bshift
.u64
[HI_IDX
] = b
->u64
[i
] >> (64-j
);
1405 bshift
.u64
[LO_IDX
] = b
->u64
[i
] << j
;
1407 prod
[i
].u64
[LO_IDX
] ^= bshift
.u64
[LO_IDX
];
1408 prod
[i
].u64
[HI_IDX
] ^= bshift
.u64
[HI_IDX
];
1413 r
->u64
[LO_IDX
] = prod
[0].u64
[LO_IDX
] ^ prod
[1].u64
[LO_IDX
];
1414 r
->u64
[HI_IDX
] = prod
[0].u64
[HI_IDX
] ^ prod
[1].u64
[HI_IDX
];
1419 #if defined(HOST_WORDS_BIGENDIAN)
1424 void helper_vpkpx(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1428 #if defined(HOST_WORDS_BIGENDIAN)
1429 const ppc_avr_t
*x
[2] = { a
, b
};
1431 const ppc_avr_t
*x
[2] = { b
, a
};
1434 VECTOR_FOR_INORDER_I(i
, u64
) {
1435 VECTOR_FOR_INORDER_I(j
, u32
) {
1436 uint32_t e
= x
[i
]->u32
[j
];
1438 result
.u16
[4*i
+j
] = (((e
>> 9) & 0xfc00) |
1439 ((e
>> 6) & 0x3e0) |
1446 #define VPK(suffix, from, to, cvt, dosat) \
1447 void helper_vpk##suffix(CPUPPCState *env, ppc_avr_t *r, \
1448 ppc_avr_t *a, ppc_avr_t *b) \
1453 ppc_avr_t *a0 = PKBIG ? a : b; \
1454 ppc_avr_t *a1 = PKBIG ? b : a; \
1456 VECTOR_FOR_INORDER_I(i, from) { \
1457 result.to[i] = cvt(a0->from[i], &sat); \
1458 result.to[i+ARRAY_SIZE(r->from)] = cvt(a1->from[i], &sat); \
1461 if (dosat && sat) { \
1462 env->vscr |= (1 << VSCR_SAT); \
1466 VPK(shss
, s16
, s8
, cvtshsb
, 1)
1467 VPK(shus
, s16
, u8
, cvtshub
, 1)
1468 VPK(swss
, s32
, s16
, cvtswsh
, 1)
1469 VPK(swus
, s32
, u16
, cvtswuh
, 1)
1470 VPK(sdss
, s64
, s32
, cvtsdsw
, 1)
1471 VPK(sdus
, s64
, u32
, cvtsduw
, 1)
1472 VPK(uhus
, u16
, u8
, cvtuhub
, 1)
1473 VPK(uwus
, u32
, u16
, cvtuwuh
, 1)
1474 VPK(udus
, u64
, u32
, cvtuduw
, 1)
1475 VPK(uhum
, u16
, u8
, I
, 0)
1476 VPK(uwum
, u32
, u16
, I
, 0)
1477 VPK(udum
, u64
, u32
, I
, 0)
1482 void helper_vrefp(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*b
)
1486 for (i
= 0; i
< ARRAY_SIZE(r
->f
); i
++) {
1487 r
->f
[i
] = float32_div(float32_one
, b
->f
[i
], &env
->vec_status
);
1491 #define VRFI(suffix, rounding) \
1492 void helper_vrfi##suffix(CPUPPCState *env, ppc_avr_t *r, \
1496 float_status s = env->vec_status; \
1498 set_float_rounding_mode(rounding, &s); \
1499 for (i = 0; i < ARRAY_SIZE(r->f); i++) { \
1500 r->f[i] = float32_round_to_int (b->f[i], &s); \
1503 VRFI(n
, float_round_nearest_even
)
1504 VRFI(m
, float_round_down
)
1505 VRFI(p
, float_round_up
)
1506 VRFI(z
, float_round_to_zero
)
1509 #define VROTATE(suffix, element, mask) \
1510 void helper_vrl##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
1514 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
1515 unsigned int shift = b->element[i] & mask; \
1516 r->element[i] = (a->element[i] << shift) | \
1517 (a->element[i] >> (sizeof(a->element[0]) * 8 - shift)); \
1521 VROTATE(h
, u16
, 0xF)
1522 VROTATE(w
, u32
, 0x1F)
1523 VROTATE(d
, u64
, 0x3F)
1526 void helper_vrsqrtefp(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*b
)
1530 for (i
= 0; i
< ARRAY_SIZE(r
->f
); i
++) {
1531 float32 t
= float32_sqrt(b
->f
[i
], &env
->vec_status
);
1533 r
->f
[i
] = float32_div(float32_one
, t
, &env
->vec_status
);
1537 void helper_vsel(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
,
1540 r
->u64
[0] = (a
->u64
[0] & ~c
->u64
[0]) | (b
->u64
[0] & c
->u64
[0]);
1541 r
->u64
[1] = (a
->u64
[1] & ~c
->u64
[1]) | (b
->u64
[1] & c
->u64
[1]);
1544 void helper_vexptefp(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*b
)
1548 for (i
= 0; i
< ARRAY_SIZE(r
->f
); i
++) {
1549 r
->f
[i
] = float32_exp2(b
->f
[i
], &env
->vec_status
);
1553 void helper_vlogefp(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*b
)
1557 for (i
= 0; i
< ARRAY_SIZE(r
->f
); i
++) {
1558 r
->f
[i
] = float32_log2(b
->f
[i
], &env
->vec_status
);
1562 /* The specification says that the results are undefined if all of the
1563 * shift counts are not identical. We check to make sure that they are
1564 * to conform to what real hardware appears to do. */
1565 #define VSHIFT(suffix, leftp) \
1566 void helper_vs##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
1568 int shift = b->u8[LO_IDX*15] & 0x7; \
1572 for (i = 0; i < ARRAY_SIZE(r->u8); i++) { \
1573 doit = doit && ((b->u8[i] & 0x7) == shift); \
1578 } else if (leftp) { \
1579 uint64_t carry = a->u64[LO_IDX] >> (64 - shift); \
1581 r->u64[HI_IDX] = (a->u64[HI_IDX] << shift) | carry; \
1582 r->u64[LO_IDX] = a->u64[LO_IDX] << shift; \
1584 uint64_t carry = a->u64[HI_IDX] << (64 - shift); \
1586 r->u64[LO_IDX] = (a->u64[LO_IDX] >> shift) | carry; \
1587 r->u64[HI_IDX] = a->u64[HI_IDX] >> shift; \
1595 #define VSL(suffix, element, mask) \
1596 void helper_vsl##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
1600 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
1601 unsigned int shift = b->element[i] & mask; \
1603 r->element[i] = a->element[i] << shift; \
1612 void helper_vsldoi(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, uint32_t shift
)
1614 int sh
= shift
& 0xf;
1618 #if defined(HOST_WORDS_BIGENDIAN)
1619 for (i
= 0; i
< ARRAY_SIZE(r
->u8
); i
++) {
1622 result
.u8
[i
] = b
->u8
[index
- 0x10];
1624 result
.u8
[i
] = a
->u8
[index
];
1628 for (i
= 0; i
< ARRAY_SIZE(r
->u8
); i
++) {
1629 int index
= (16 - sh
) + i
;
1631 result
.u8
[i
] = a
->u8
[index
- 0x10];
1633 result
.u8
[i
] = b
->u8
[index
];
1640 void helper_vslo(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1642 int sh
= (b
->u8
[LO_IDX
*0xf] >> 3) & 0xf;
1644 #if defined(HOST_WORDS_BIGENDIAN)
1645 memmove(&r
->u8
[0], &a
->u8
[sh
], 16 - sh
);
1646 memset(&r
->u8
[16-sh
], 0, sh
);
1648 memmove(&r
->u8
[sh
], &a
->u8
[0], 16 - sh
);
1649 memset(&r
->u8
[0], 0, sh
);
1653 /* Experimental testing shows that hardware masks the immediate. */
1654 #define _SPLAT_MASKED(element) (splat & (ARRAY_SIZE(r->element) - 1))
1655 #if defined(HOST_WORDS_BIGENDIAN)
1656 #define SPLAT_ELEMENT(element) _SPLAT_MASKED(element)
1658 #define SPLAT_ELEMENT(element) \
1659 (ARRAY_SIZE(r->element) - 1 - _SPLAT_MASKED(element))
1661 #define VSPLT(suffix, element) \
1662 void helper_vsplt##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t splat) \
1664 uint32_t s = b->element[SPLAT_ELEMENT(element)]; \
1667 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
1668 r->element[i] = s; \
1675 #undef SPLAT_ELEMENT
1676 #undef _SPLAT_MASKED
1678 #define VSPLTI(suffix, element, splat_type) \
1679 void helper_vspltis##suffix(ppc_avr_t *r, uint32_t splat) \
1681 splat_type x = (int8_t)(splat << 3) >> 3; \
1684 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
1685 r->element[i] = x; \
1688 VSPLTI(b
, s8
, int8_t)
1689 VSPLTI(h
, s16
, int16_t)
1690 VSPLTI(w
, s32
, int32_t)
1693 #define VSR(suffix, element, mask) \
1694 void helper_vsr##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
1698 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
1699 unsigned int shift = b->element[i] & mask; \
1700 r->element[i] = a->element[i] >> shift; \
1713 void helper_vsro(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1715 int sh
= (b
->u8
[LO_IDX
* 0xf] >> 3) & 0xf;
1717 #if defined(HOST_WORDS_BIGENDIAN)
1718 memmove(&r
->u8
[sh
], &a
->u8
[0], 16 - sh
);
1719 memset(&r
->u8
[0], 0, sh
);
1721 memmove(&r
->u8
[0], &a
->u8
[sh
], 16 - sh
);
1722 memset(&r
->u8
[16 - sh
], 0, sh
);
1726 void helper_vsubcuw(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1730 for (i
= 0; i
< ARRAY_SIZE(r
->u32
); i
++) {
1731 r
->u32
[i
] = a
->u32
[i
] >= b
->u32
[i
];
1735 void helper_vsumsws(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1742 #if defined(HOST_WORDS_BIGENDIAN)
1743 upper
= ARRAY_SIZE(r
->s32
)-1;
1747 t
= (int64_t)b
->s32
[upper
];
1748 for (i
= 0; i
< ARRAY_SIZE(r
->s32
); i
++) {
1752 result
.s32
[upper
] = cvtsdsw(t
, &sat
);
1756 env
->vscr
|= (1 << VSCR_SAT
);
1760 void helper_vsum2sws(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1766 #if defined(HOST_WORDS_BIGENDIAN)
1771 for (i
= 0; i
< ARRAY_SIZE(r
->u64
); i
++) {
1772 int64_t t
= (int64_t)b
->s32
[upper
+ i
* 2];
1775 for (j
= 0; j
< ARRAY_SIZE(r
->u64
); j
++) {
1776 t
+= a
->s32
[2 * i
+ j
];
1778 result
.s32
[upper
+ i
* 2] = cvtsdsw(t
, &sat
);
1783 env
->vscr
|= (1 << VSCR_SAT
);
1787 void helper_vsum4sbs(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1792 for (i
= 0; i
< ARRAY_SIZE(r
->s32
); i
++) {
1793 int64_t t
= (int64_t)b
->s32
[i
];
1795 for (j
= 0; j
< ARRAY_SIZE(r
->s32
); j
++) {
1796 t
+= a
->s8
[4 * i
+ j
];
1798 r
->s32
[i
] = cvtsdsw(t
, &sat
);
1802 env
->vscr
|= (1 << VSCR_SAT
);
1806 void helper_vsum4shs(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1811 for (i
= 0; i
< ARRAY_SIZE(r
->s32
); i
++) {
1812 int64_t t
= (int64_t)b
->s32
[i
];
1814 t
+= a
->s16
[2 * i
] + a
->s16
[2 * i
+ 1];
1815 r
->s32
[i
] = cvtsdsw(t
, &sat
);
1819 env
->vscr
|= (1 << VSCR_SAT
);
1823 void helper_vsum4ubs(CPUPPCState
*env
, ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1828 for (i
= 0; i
< ARRAY_SIZE(r
->u32
); i
++) {
1829 uint64_t t
= (uint64_t)b
->u32
[i
];
1831 for (j
= 0; j
< ARRAY_SIZE(r
->u32
); j
++) {
1832 t
+= a
->u8
[4 * i
+ j
];
1834 r
->u32
[i
] = cvtuduw(t
, &sat
);
1838 env
->vscr
|= (1 << VSCR_SAT
);
1842 #if defined(HOST_WORDS_BIGENDIAN)
1849 #define VUPKPX(suffix, hi) \
1850 void helper_vupk##suffix(ppc_avr_t *r, ppc_avr_t *b) \
1855 for (i = 0; i < ARRAY_SIZE(r->u32); i++) { \
1856 uint16_t e = b->u16[hi ? i : i+4]; \
1857 uint8_t a = (e >> 15) ? 0xff : 0; \
1858 uint8_t r = (e >> 10) & 0x1f; \
1859 uint8_t g = (e >> 5) & 0x1f; \
1860 uint8_t b = e & 0x1f; \
1862 result.u32[i] = (a << 24) | (r << 16) | (g << 8) | b; \
1870 #define VUPK(suffix, unpacked, packee, hi) \
1871 void helper_vupk##suffix(ppc_avr_t *r, ppc_avr_t *b) \
1877 for (i = 0; i < ARRAY_SIZE(r->unpacked); i++) { \
1878 result.unpacked[i] = b->packee[i]; \
1881 for (i = ARRAY_SIZE(r->unpacked); i < ARRAY_SIZE(r->packee); \
1883 result.unpacked[i - ARRAY_SIZE(r->unpacked)] = b->packee[i]; \
1888 VUPK(hsb
, s16
, s8
, UPKHI
)
1889 VUPK(hsh
, s32
, s16
, UPKHI
)
1890 VUPK(hsw
, s64
, s32
, UPKHI
)
1891 VUPK(lsb
, s16
, s8
, UPKLO
)
1892 VUPK(lsh
, s32
, s16
, UPKLO
)
1893 VUPK(lsw
, s64
, s32
, UPKLO
)
1898 #define VGENERIC_DO(name, element) \
1899 void helper_v##name(ppc_avr_t *r, ppc_avr_t *b) \
1903 VECTOR_FOR_INORDER_I(i, element) { \
1904 r->element[i] = name(b->element[i]); \
1908 #define clzb(v) ((v) ? clz32((uint32_t)(v) << 24) : 8)
1909 #define clzh(v) ((v) ? clz32((uint32_t)(v) << 16) : 16)
1910 #define clzw(v) clz32((v))
1911 #define clzd(v) clz64((v))
1913 VGENERIC_DO(clzb
, u8
)
1914 VGENERIC_DO(clzh
, u16
)
1915 VGENERIC_DO(clzw
, u32
)
1916 VGENERIC_DO(clzd
, u64
)
1923 #define popcntb(v) ctpop8(v)
1924 #define popcnth(v) ctpop16(v)
1925 #define popcntw(v) ctpop32(v)
1926 #define popcntd(v) ctpop64(v)
1928 VGENERIC_DO(popcntb
, u8
)
1929 VGENERIC_DO(popcnth
, u16
)
1930 VGENERIC_DO(popcntw
, u32
)
1931 VGENERIC_DO(popcntd
, u64
)
1940 #if defined(HOST_WORDS_BIGENDIAN)
1941 #define QW_ONE { .u64 = { 0, 1 } }
1943 #define QW_ONE { .u64 = { 1, 0 } }
1946 #ifndef CONFIG_INT128
1948 static inline void avr_qw_not(ppc_avr_t
*t
, ppc_avr_t a
)
1950 t
->u64
[0] = ~a
.u64
[0];
1951 t
->u64
[1] = ~a
.u64
[1];
1954 static int avr_qw_cmpu(ppc_avr_t a
, ppc_avr_t b
)
1956 if (a
.u64
[HI_IDX
] < b
.u64
[HI_IDX
]) {
1958 } else if (a
.u64
[HI_IDX
] > b
.u64
[HI_IDX
]) {
1960 } else if (a
.u64
[LO_IDX
] < b
.u64
[LO_IDX
]) {
1962 } else if (a
.u64
[LO_IDX
] > b
.u64
[LO_IDX
]) {
1969 static void avr_qw_add(ppc_avr_t
*t
, ppc_avr_t a
, ppc_avr_t b
)
1971 t
->u64
[LO_IDX
] = a
.u64
[LO_IDX
] + b
.u64
[LO_IDX
];
1972 t
->u64
[HI_IDX
] = a
.u64
[HI_IDX
] + b
.u64
[HI_IDX
] +
1973 (~a
.u64
[LO_IDX
] < b
.u64
[LO_IDX
]);
1976 static int avr_qw_addc(ppc_avr_t
*t
, ppc_avr_t a
, ppc_avr_t b
)
1979 t
->u64
[LO_IDX
] = a
.u64
[LO_IDX
] + b
.u64
[LO_IDX
];
1980 t
->u64
[HI_IDX
] = a
.u64
[HI_IDX
] + b
.u64
[HI_IDX
] +
1981 (~a
.u64
[LO_IDX
] < b
.u64
[LO_IDX
]);
1982 avr_qw_not(¬_a
, a
);
1983 return avr_qw_cmpu(not_a
, b
) < 0;
1988 void helper_vadduqm(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
1990 #ifdef CONFIG_INT128
1991 r
->u128
= a
->u128
+ b
->u128
;
1993 avr_qw_add(r
, *a
, *b
);
1997 void helper_vaddeuqm(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, ppc_avr_t
*c
)
1999 #ifdef CONFIG_INT128
2000 r
->u128
= a
->u128
+ b
->u128
+ (c
->u128
& 1);
2003 if (c
->u64
[LO_IDX
] & 1) {
2006 tmp
.u64
[HI_IDX
] = 0;
2007 tmp
.u64
[LO_IDX
] = c
->u64
[LO_IDX
] & 1;
2008 avr_qw_add(&tmp
, *a
, tmp
);
2009 avr_qw_add(r
, tmp
, *b
);
2011 avr_qw_add(r
, *a
, *b
);
2016 void helper_vaddcuq(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2018 #ifdef CONFIG_INT128
2019 r
->u128
= (~a
->u128
< b
->u128
);
2023 avr_qw_not(¬_a
, *a
);
2026 r
->u64
[LO_IDX
] = (avr_qw_cmpu(not_a
, *b
) < 0);
2030 void helper_vaddecuq(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, ppc_avr_t
*c
)
2032 #ifdef CONFIG_INT128
2033 int carry_out
= (~a
->u128
< b
->u128
);
2034 if (!carry_out
&& (c
->u128
& 1)) {
2035 carry_out
= ((a
->u128
+ b
->u128
+ 1) == 0) &&
2036 ((a
->u128
!= 0) || (b
->u128
!= 0));
2038 r
->u128
= carry_out
;
2041 int carry_in
= c
->u64
[LO_IDX
] & 1;
2045 carry_out
= avr_qw_addc(&tmp
, *a
, *b
);
2047 if (!carry_out
&& carry_in
) {
2048 ppc_avr_t one
= QW_ONE
;
2049 carry_out
= avr_qw_addc(&tmp
, tmp
, one
);
2052 r
->u64
[LO_IDX
] = carry_out
;
2056 void helper_vsubuqm(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2058 #ifdef CONFIG_INT128
2059 r
->u128
= a
->u128
- b
->u128
;
2062 ppc_avr_t one
= QW_ONE
;
2064 avr_qw_not(&tmp
, *b
);
2065 avr_qw_add(&tmp
, *a
, tmp
);
2066 avr_qw_add(r
, tmp
, one
);
2070 void helper_vsubeuqm(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, ppc_avr_t
*c
)
2072 #ifdef CONFIG_INT128
2073 r
->u128
= a
->u128
+ ~b
->u128
+ (c
->u128
& 1);
2077 avr_qw_not(&tmp
, *b
);
2078 avr_qw_add(&sum
, *a
, tmp
);
2080 tmp
.u64
[HI_IDX
] = 0;
2081 tmp
.u64
[LO_IDX
] = c
->u64
[LO_IDX
] & 1;
2082 avr_qw_add(r
, sum
, tmp
);
2086 void helper_vsubcuq(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2088 #ifdef CONFIG_INT128
2089 r
->u128
= (~a
->u128
< ~b
->u128
) ||
2090 (a
->u128
+ ~b
->u128
== (__uint128_t
)-1);
2092 int carry
= (avr_qw_cmpu(*a
, *b
) > 0);
2095 avr_qw_not(&tmp
, *b
);
2096 avr_qw_add(&tmp
, *a
, tmp
);
2097 carry
= ((tmp
.s64
[HI_IDX
] == -1ull) && (tmp
.s64
[LO_IDX
] == -1ull));
2100 r
->u64
[LO_IDX
] = carry
;
2104 void helper_vsubecuq(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, ppc_avr_t
*c
)
2106 #ifdef CONFIG_INT128
2108 (~a
->u128
< ~b
->u128
) ||
2109 ((c
->u128
& 1) && (a
->u128
+ ~b
->u128
== (__uint128_t
)-1));
2111 int carry_in
= c
->u64
[LO_IDX
] & 1;
2112 int carry_out
= (avr_qw_cmpu(*a
, *b
) > 0);
2113 if (!carry_out
&& carry_in
) {
2115 avr_qw_not(&tmp
, *b
);
2116 avr_qw_add(&tmp
, *a
, tmp
);
2117 carry_out
= ((tmp
.u64
[HI_IDX
] == -1ull) && (tmp
.u64
[LO_IDX
] == -1ull));
2121 r
->u64
[LO_IDX
] = carry_out
;
2125 #define BCD_PLUS_PREF_1 0xC
2126 #define BCD_PLUS_PREF_2 0xF
2127 #define BCD_PLUS_ALT_1 0xA
2128 #define BCD_NEG_PREF 0xD
2129 #define BCD_NEG_ALT 0xB
2130 #define BCD_PLUS_ALT_2 0xE
2132 #if defined(HOST_WORDS_BIGENDIAN)
2133 #define BCD_DIG_BYTE(n) (15 - (n/2))
2135 #define BCD_DIG_BYTE(n) (n/2)
2138 static int bcd_get_sgn(ppc_avr_t
*bcd
)
2140 switch (bcd
->u8
[BCD_DIG_BYTE(0)] & 0xF) {
2141 case BCD_PLUS_PREF_1
:
2142 case BCD_PLUS_PREF_2
:
2143 case BCD_PLUS_ALT_1
:
2144 case BCD_PLUS_ALT_2
:
2162 static int bcd_preferred_sgn(int sgn
, int ps
)
2165 return (ps
== 0) ? BCD_PLUS_PREF_1
: BCD_PLUS_PREF_2
;
2167 return BCD_NEG_PREF
;
2171 static uint8_t bcd_get_digit(ppc_avr_t
*bcd
, int n
, int *invalid
)
2175 result
= bcd
->u8
[BCD_DIG_BYTE(n
)] >> 4;
2177 result
= bcd
->u8
[BCD_DIG_BYTE(n
)] & 0xF;
2180 if (unlikely(result
> 9)) {
2186 static void bcd_put_digit(ppc_avr_t
*bcd
, uint8_t digit
, int n
)
2189 bcd
->u8
[BCD_DIG_BYTE(n
)] &= 0x0F;
2190 bcd
->u8
[BCD_DIG_BYTE(n
)] |= (digit
<<4);
2192 bcd
->u8
[BCD_DIG_BYTE(n
)] &= 0xF0;
2193 bcd
->u8
[BCD_DIG_BYTE(n
)] |= digit
;
2197 static int bcd_cmp_mag(ppc_avr_t
*a
, ppc_avr_t
*b
)
2201 for (i
= 31; i
> 0; i
--) {
2202 uint8_t dig_a
= bcd_get_digit(a
, i
, &invalid
);
2203 uint8_t dig_b
= bcd_get_digit(b
, i
, &invalid
);
2204 if (unlikely(invalid
)) {
2205 return 0; /* doesn't matter */
2206 } else if (dig_a
> dig_b
) {
2208 } else if (dig_a
< dig_b
) {
2216 static int bcd_add_mag(ppc_avr_t
*t
, ppc_avr_t
*a
, ppc_avr_t
*b
, int *invalid
,
2222 for (i
= 1; i
<= 31; i
++) {
2223 uint8_t digit
= bcd_get_digit(a
, i
, invalid
) +
2224 bcd_get_digit(b
, i
, invalid
) + carry
;
2225 is_zero
&= (digit
== 0);
2233 bcd_put_digit(t
, digit
, i
);
2235 if (unlikely(*invalid
)) {
2244 static int bcd_sub_mag(ppc_avr_t
*t
, ppc_avr_t
*a
, ppc_avr_t
*b
, int *invalid
,
2250 for (i
= 1; i
<= 31; i
++) {
2251 uint8_t digit
= bcd_get_digit(a
, i
, invalid
) -
2252 bcd_get_digit(b
, i
, invalid
) + carry
;
2253 is_zero
&= (digit
== 0);
2261 bcd_put_digit(t
, digit
, i
);
2263 if (unlikely(*invalid
)) {
2272 uint32_t helper_bcdadd(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, uint32_t ps
)
2275 int sgna
= bcd_get_sgn(a
);
2276 int sgnb
= bcd_get_sgn(b
);
2277 int invalid
= (sgna
== 0) || (sgnb
== 0);
2281 ppc_avr_t result
= { .u64
= { 0, 0 } };
2285 result
.u8
[BCD_DIG_BYTE(0)] = bcd_preferred_sgn(sgna
, ps
);
2286 zero
= bcd_add_mag(&result
, a
, b
, &invalid
, &overflow
);
2287 cr
= (sgna
> 0) ? 1 << CRF_GT
: 1 << CRF_LT
;
2288 } else if (bcd_cmp_mag(a
, b
) > 0) {
2289 result
.u8
[BCD_DIG_BYTE(0)] = bcd_preferred_sgn(sgna
, ps
);
2290 zero
= bcd_sub_mag(&result
, a
, b
, &invalid
, &overflow
);
2291 cr
= (sgna
> 0) ? 1 << CRF_GT
: 1 << CRF_LT
;
2293 result
.u8
[BCD_DIG_BYTE(0)] = bcd_preferred_sgn(sgnb
, ps
);
2294 zero
= bcd_sub_mag(&result
, b
, a
, &invalid
, &overflow
);
2295 cr
= (sgnb
> 0) ? 1 << CRF_GT
: 1 << CRF_LT
;
2299 if (unlikely(invalid
)) {
2300 result
.u64
[HI_IDX
] = result
.u64
[LO_IDX
] = -1;
2302 } else if (overflow
) {
2313 uint32_t helper_bcdsub(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, uint32_t ps
)
2315 ppc_avr_t bcopy
= *b
;
2316 int sgnb
= bcd_get_sgn(b
);
2318 bcd_put_digit(&bcopy
, BCD_PLUS_PREF_1
, 0);
2319 } else if (sgnb
> 0) {
2320 bcd_put_digit(&bcopy
, BCD_NEG_PREF
, 0);
2322 /* else invalid ... defer to bcdadd code for proper handling */
2324 return helper_bcdadd(r
, a
, &bcopy
, ps
);
2327 void helper_vsbox(ppc_avr_t
*r
, ppc_avr_t
*a
)
2330 VECTOR_FOR_INORDER_I(i
, u8
) {
2331 r
->u8
[i
] = AES_sbox
[a
->u8
[i
]];
2335 void helper_vcipher(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2340 VECTOR_FOR_INORDER_I(i
, u32
) {
2341 result
.AVRW(i
) = b
->AVRW(i
) ^
2342 (AES_Te0
[a
->AVRB(AES_shifts
[4*i
+ 0])] ^
2343 AES_Te1
[a
->AVRB(AES_shifts
[4*i
+ 1])] ^
2344 AES_Te2
[a
->AVRB(AES_shifts
[4*i
+ 2])] ^
2345 AES_Te3
[a
->AVRB(AES_shifts
[4*i
+ 3])]);
2350 void helper_vcipherlast(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2355 VECTOR_FOR_INORDER_I(i
, u8
) {
2356 result
.AVRB(i
) = b
->AVRB(i
) ^ (AES_sbox
[a
->AVRB(AES_shifts
[i
])]);
2361 void helper_vncipher(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2363 /* This differs from what is written in ISA V2.07. The RTL is */
2364 /* incorrect and will be fixed in V2.07B. */
2368 VECTOR_FOR_INORDER_I(i
, u8
) {
2369 tmp
.AVRB(i
) = b
->AVRB(i
) ^ AES_isbox
[a
->AVRB(AES_ishifts
[i
])];
2372 VECTOR_FOR_INORDER_I(i
, u32
) {
2374 AES_imc
[tmp
.AVRB(4*i
+ 0)][0] ^
2375 AES_imc
[tmp
.AVRB(4*i
+ 1)][1] ^
2376 AES_imc
[tmp
.AVRB(4*i
+ 2)][2] ^
2377 AES_imc
[tmp
.AVRB(4*i
+ 3)][3];
2381 void helper_vncipherlast(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
)
2386 VECTOR_FOR_INORDER_I(i
, u8
) {
2387 result
.AVRB(i
) = b
->AVRB(i
) ^ (AES_isbox
[a
->AVRB(AES_ishifts
[i
])]);
2392 #define ROTRu32(v, n) (((v) >> (n)) | ((v) << (32-n)))
2393 #if defined(HOST_WORDS_BIGENDIAN)
2394 #define EL_IDX(i) (i)
2396 #define EL_IDX(i) (3 - (i))
2399 void helper_vshasigmaw(ppc_avr_t
*r
, ppc_avr_t
*a
, uint32_t st_six
)
2401 int st
= (st_six
& 0x10) != 0;
2402 int six
= st_six
& 0xF;
2405 VECTOR_FOR_INORDER_I(i
, u32
) {
2407 if ((six
& (0x8 >> i
)) == 0) {
2408 r
->u32
[EL_IDX(i
)] = ROTRu32(a
->u32
[EL_IDX(i
)], 7) ^
2409 ROTRu32(a
->u32
[EL_IDX(i
)], 18) ^
2410 (a
->u32
[EL_IDX(i
)] >> 3);
2411 } else { /* six.bit[i] == 1 */
2412 r
->u32
[EL_IDX(i
)] = ROTRu32(a
->u32
[EL_IDX(i
)], 17) ^
2413 ROTRu32(a
->u32
[EL_IDX(i
)], 19) ^
2414 (a
->u32
[EL_IDX(i
)] >> 10);
2416 } else { /* st == 1 */
2417 if ((six
& (0x8 >> i
)) == 0) {
2418 r
->u32
[EL_IDX(i
)] = ROTRu32(a
->u32
[EL_IDX(i
)], 2) ^
2419 ROTRu32(a
->u32
[EL_IDX(i
)], 13) ^
2420 ROTRu32(a
->u32
[EL_IDX(i
)], 22);
2421 } else { /* six.bit[i] == 1 */
2422 r
->u32
[EL_IDX(i
)] = ROTRu32(a
->u32
[EL_IDX(i
)], 6) ^
2423 ROTRu32(a
->u32
[EL_IDX(i
)], 11) ^
2424 ROTRu32(a
->u32
[EL_IDX(i
)], 25);
2433 #define ROTRu64(v, n) (((v) >> (n)) | ((v) << (64-n)))
2434 #if defined(HOST_WORDS_BIGENDIAN)
2435 #define EL_IDX(i) (i)
2437 #define EL_IDX(i) (1 - (i))
2440 void helper_vshasigmad(ppc_avr_t
*r
, ppc_avr_t
*a
, uint32_t st_six
)
2442 int st
= (st_six
& 0x10) != 0;
2443 int six
= st_six
& 0xF;
2446 VECTOR_FOR_INORDER_I(i
, u64
) {
2448 if ((six
& (0x8 >> (2*i
))) == 0) {
2449 r
->u64
[EL_IDX(i
)] = ROTRu64(a
->u64
[EL_IDX(i
)], 1) ^
2450 ROTRu64(a
->u64
[EL_IDX(i
)], 8) ^
2451 (a
->u64
[EL_IDX(i
)] >> 7);
2452 } else { /* six.bit[2*i] == 1 */
2453 r
->u64
[EL_IDX(i
)] = ROTRu64(a
->u64
[EL_IDX(i
)], 19) ^
2454 ROTRu64(a
->u64
[EL_IDX(i
)], 61) ^
2455 (a
->u64
[EL_IDX(i
)] >> 6);
2457 } else { /* st == 1 */
2458 if ((six
& (0x8 >> (2*i
))) == 0) {
2459 r
->u64
[EL_IDX(i
)] = ROTRu64(a
->u64
[EL_IDX(i
)], 28) ^
2460 ROTRu64(a
->u64
[EL_IDX(i
)], 34) ^
2461 ROTRu64(a
->u64
[EL_IDX(i
)], 39);
2462 } else { /* six.bit[2*i] == 1 */
2463 r
->u64
[EL_IDX(i
)] = ROTRu64(a
->u64
[EL_IDX(i
)], 14) ^
2464 ROTRu64(a
->u64
[EL_IDX(i
)], 18) ^
2465 ROTRu64(a
->u64
[EL_IDX(i
)], 41);
2474 void helper_vpermxor(ppc_avr_t
*r
, ppc_avr_t
*a
, ppc_avr_t
*b
, ppc_avr_t
*c
)
2479 VECTOR_FOR_INORDER_I(i
, u8
) {
2480 int indexA
= c
->u8
[i
] >> 4;
2481 int indexB
= c
->u8
[i
] & 0xF;
2482 #if defined(HOST_WORDS_BIGENDIAN)
2483 result
.u8
[i
] = a
->u8
[indexA
] ^ b
->u8
[indexB
];
2485 result
.u8
[i
] = a
->u8
[15-indexA
] ^ b
->u8
[15-indexB
];
2491 #undef VECTOR_FOR_INORDER_I
2495 /*****************************************************************************/
2496 /* SPE extension helpers */
2497 /* Use a table to make this quicker */
2498 static const uint8_t hbrev
[16] = {
2499 0x0, 0x8, 0x4, 0xC, 0x2, 0xA, 0x6, 0xE,
2500 0x1, 0x9, 0x5, 0xD, 0x3, 0xB, 0x7, 0xF,
2503 static inline uint8_t byte_reverse(uint8_t val
)
2505 return hbrev
[val
>> 4] | (hbrev
[val
& 0xF] << 4);
2508 static inline uint32_t word_reverse(uint32_t val
)
2510 return byte_reverse(val
>> 24) | (byte_reverse(val
>> 16) << 8) |
2511 (byte_reverse(val
>> 8) << 16) | (byte_reverse(val
) << 24);
2514 #define MASKBITS 16 /* Random value - to be fixed (implementation dependent) */
2515 target_ulong
helper_brinc(target_ulong arg1
, target_ulong arg2
)
2517 uint32_t a
, b
, d
, mask
;
2519 mask
= UINT32_MAX
>> (32 - MASKBITS
);
2522 d
= word_reverse(1 + word_reverse(a
| ~b
));
2523 return (arg1
& ~mask
) | (d
& b
);
2526 uint32_t helper_cntlsw32(uint32_t val
)
2528 if (val
& 0x80000000) {
2535 uint32_t helper_cntlzw32(uint32_t val
)
2541 target_ulong
helper_dlmzb(CPUPPCState
*env
, target_ulong high
,
2542 target_ulong low
, uint32_t update_Rc
)
2548 for (mask
= 0xFF000000; mask
!= 0; mask
= mask
>> 8) {
2549 if ((high
& mask
) == 0) {
2557 for (mask
= 0xFF000000; mask
!= 0; mask
= mask
>> 8) {
2558 if ((low
& mask
) == 0) {
2571 env
->xer
= (env
->xer
& ~0x7F) | i
;
2573 env
->crf
[0] |= xer_so
;