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tcg: Add TCG_MAX_INSNS
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1 /*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 /* define it to use liveness analysis (better code) */
26 #define USE_LIVENESS_ANALYSIS
27 #define USE_TCG_OPTIMIZATIONS
28
29 #include "config.h"
30
31 /* Define to jump the ELF file used to communicate with GDB. */
32 #undef DEBUG_JIT
33
34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
35 /* define it to suppress various consistency checks (faster) */
36 #define NDEBUG
37 #endif
38
39 #include "qemu-common.h"
40 #include "qemu/host-utils.h"
41 #include "qemu/timer.h"
42
43 /* Note: the long term plan is to reduce the dependencies on the QEMU
44 CPU definitions. Currently they are used for qemu_ld/st
45 instructions */
46 #define NO_CPU_IO_DEFS
47 #include "cpu.h"
48
49 #include "tcg-op.h"
50
51 #if UINTPTR_MAX == UINT32_MAX
52 # define ELF_CLASS ELFCLASS32
53 #else
54 # define ELF_CLASS ELFCLASS64
55 #endif
56 #ifdef HOST_WORDS_BIGENDIAN
57 # define ELF_DATA ELFDATA2MSB
58 #else
59 # define ELF_DATA ELFDATA2LSB
60 #endif
61
62 #include "elf.h"
63
64 /* Forward declarations for functions declared in tcg-target.c and used here. */
65 static void tcg_target_init(TCGContext *s);
66 static void tcg_target_qemu_prologue(TCGContext *s);
67 static void patch_reloc(tcg_insn_unit *code_ptr, int type,
68 intptr_t value, intptr_t addend);
69
70 /* The CIE and FDE header definitions will be common to all hosts. */
71 typedef struct {
72 uint32_t len __attribute__((aligned((sizeof(void *)))));
73 uint32_t id;
74 uint8_t version;
75 char augmentation[1];
76 uint8_t code_align;
77 uint8_t data_align;
78 uint8_t return_column;
79 } DebugFrameCIE;
80
81 typedef struct QEMU_PACKED {
82 uint32_t len __attribute__((aligned((sizeof(void *)))));
83 uint32_t cie_offset;
84 uintptr_t func_start;
85 uintptr_t func_len;
86 } DebugFrameFDEHeader;
87
88 typedef struct QEMU_PACKED {
89 DebugFrameCIE cie;
90 DebugFrameFDEHeader fde;
91 } DebugFrameHeader;
92
93 static void tcg_register_jit_int(void *buf, size_t size,
94 const void *debug_frame,
95 size_t debug_frame_size)
96 __attribute__((unused));
97
98 /* Forward declarations for functions declared and used in tcg-target.c. */
99 static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str);
100 static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1,
101 intptr_t arg2);
102 static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg);
103 static void tcg_out_movi(TCGContext *s, TCGType type,
104 TCGReg ret, tcg_target_long arg);
105 static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
106 const int *const_args);
107 static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1,
108 intptr_t arg2);
109 static void tcg_out_call(TCGContext *s, tcg_insn_unit *target);
110 static int tcg_target_const_match(tcg_target_long val, TCGType type,
111 const TCGArgConstraint *arg_ct);
112 static void tcg_out_tb_init(TCGContext *s);
113 static void tcg_out_tb_finalize(TCGContext *s);
114
115
116
117 static TCGRegSet tcg_target_available_regs[2];
118 static TCGRegSet tcg_target_call_clobber_regs;
119
120 #if TCG_TARGET_INSN_UNIT_SIZE == 1
121 static __attribute__((unused)) inline void tcg_out8(TCGContext *s, uint8_t v)
122 {
123 *s->code_ptr++ = v;
124 }
125
126 static __attribute__((unused)) inline void tcg_patch8(tcg_insn_unit *p,
127 uint8_t v)
128 {
129 *p = v;
130 }
131 #endif
132
133 #if TCG_TARGET_INSN_UNIT_SIZE <= 2
134 static __attribute__((unused)) inline void tcg_out16(TCGContext *s, uint16_t v)
135 {
136 if (TCG_TARGET_INSN_UNIT_SIZE == 2) {
137 *s->code_ptr++ = v;
138 } else {
139 tcg_insn_unit *p = s->code_ptr;
140 memcpy(p, &v, sizeof(v));
141 s->code_ptr = p + (2 / TCG_TARGET_INSN_UNIT_SIZE);
142 }
143 }
144
145 static __attribute__((unused)) inline void tcg_patch16(tcg_insn_unit *p,
146 uint16_t v)
147 {
148 if (TCG_TARGET_INSN_UNIT_SIZE == 2) {
149 *p = v;
150 } else {
151 memcpy(p, &v, sizeof(v));
152 }
153 }
154 #endif
155
156 #if TCG_TARGET_INSN_UNIT_SIZE <= 4
157 static __attribute__((unused)) inline void tcg_out32(TCGContext *s, uint32_t v)
158 {
159 if (TCG_TARGET_INSN_UNIT_SIZE == 4) {
160 *s->code_ptr++ = v;
161 } else {
162 tcg_insn_unit *p = s->code_ptr;
163 memcpy(p, &v, sizeof(v));
164 s->code_ptr = p + (4 / TCG_TARGET_INSN_UNIT_SIZE);
165 }
166 }
167
168 static __attribute__((unused)) inline void tcg_patch32(tcg_insn_unit *p,
169 uint32_t v)
170 {
171 if (TCG_TARGET_INSN_UNIT_SIZE == 4) {
172 *p = v;
173 } else {
174 memcpy(p, &v, sizeof(v));
175 }
176 }
177 #endif
178
179 #if TCG_TARGET_INSN_UNIT_SIZE <= 8
180 static __attribute__((unused)) inline void tcg_out64(TCGContext *s, uint64_t v)
181 {
182 if (TCG_TARGET_INSN_UNIT_SIZE == 8) {
183 *s->code_ptr++ = v;
184 } else {
185 tcg_insn_unit *p = s->code_ptr;
186 memcpy(p, &v, sizeof(v));
187 s->code_ptr = p + (8 / TCG_TARGET_INSN_UNIT_SIZE);
188 }
189 }
190
191 static __attribute__((unused)) inline void tcg_patch64(tcg_insn_unit *p,
192 uint64_t v)
193 {
194 if (TCG_TARGET_INSN_UNIT_SIZE == 8) {
195 *p = v;
196 } else {
197 memcpy(p, &v, sizeof(v));
198 }
199 }
200 #endif
201
202 /* label relocation processing */
203
204 static void tcg_out_reloc(TCGContext *s, tcg_insn_unit *code_ptr, int type,
205 TCGLabel *l, intptr_t addend)
206 {
207 TCGRelocation *r;
208
209 if (l->has_value) {
210 /* FIXME: This may break relocations on RISC targets that
211 modify instruction fields in place. The caller may not have
212 written the initial value. */
213 patch_reloc(code_ptr, type, l->u.value, addend);
214 } else {
215 /* add a new relocation entry */
216 r = tcg_malloc(sizeof(TCGRelocation));
217 r->type = type;
218 r->ptr = code_ptr;
219 r->addend = addend;
220 r->next = l->u.first_reloc;
221 l->u.first_reloc = r;
222 }
223 }
224
225 static void tcg_out_label(TCGContext *s, TCGLabel *l, tcg_insn_unit *ptr)
226 {
227 intptr_t value = (intptr_t)ptr;
228 TCGRelocation *r;
229
230 assert(!l->has_value);
231
232 for (r = l->u.first_reloc; r != NULL; r = r->next) {
233 patch_reloc(r->ptr, r->type, value, r->addend);
234 }
235
236 l->has_value = 1;
237 l->u.value_ptr = ptr;
238 }
239
240 TCGLabel *gen_new_label(void)
241 {
242 TCGContext *s = &tcg_ctx;
243 TCGLabel *l = tcg_malloc(sizeof(TCGLabel));
244
245 *l = (TCGLabel){
246 .id = s->nb_labels++
247 };
248
249 return l;
250 }
251
252 #include "tcg-target.c"
253
254 /* pool based memory allocation */
255 void *tcg_malloc_internal(TCGContext *s, int size)
256 {
257 TCGPool *p;
258 int pool_size;
259
260 if (size > TCG_POOL_CHUNK_SIZE) {
261 /* big malloc: insert a new pool (XXX: could optimize) */
262 p = g_malloc(sizeof(TCGPool) + size);
263 p->size = size;
264 p->next = s->pool_first_large;
265 s->pool_first_large = p;
266 return p->data;
267 } else {
268 p = s->pool_current;
269 if (!p) {
270 p = s->pool_first;
271 if (!p)
272 goto new_pool;
273 } else {
274 if (!p->next) {
275 new_pool:
276 pool_size = TCG_POOL_CHUNK_SIZE;
277 p = g_malloc(sizeof(TCGPool) + pool_size);
278 p->size = pool_size;
279 p->next = NULL;
280 if (s->pool_current)
281 s->pool_current->next = p;
282 else
283 s->pool_first = p;
284 } else {
285 p = p->next;
286 }
287 }
288 }
289 s->pool_current = p;
290 s->pool_cur = p->data + size;
291 s->pool_end = p->data + p->size;
292 return p->data;
293 }
294
295 void tcg_pool_reset(TCGContext *s)
296 {
297 TCGPool *p, *t;
298 for (p = s->pool_first_large; p; p = t) {
299 t = p->next;
300 g_free(p);
301 }
302 s->pool_first_large = NULL;
303 s->pool_cur = s->pool_end = NULL;
304 s->pool_current = NULL;
305 }
306
307 typedef struct TCGHelperInfo {
308 void *func;
309 const char *name;
310 unsigned flags;
311 unsigned sizemask;
312 } TCGHelperInfo;
313
314 #include "exec/helper-proto.h"
315
316 static const TCGHelperInfo all_helpers[] = {
317 #include "exec/helper-tcg.h"
318 };
319
320 void tcg_context_init(TCGContext *s)
321 {
322 int op, total_args, n, i;
323 TCGOpDef *def;
324 TCGArgConstraint *args_ct;
325 int *sorted_args;
326 GHashTable *helper_table;
327
328 memset(s, 0, sizeof(*s));
329 s->nb_globals = 0;
330
331 /* Count total number of arguments and allocate the corresponding
332 space */
333 total_args = 0;
334 for(op = 0; op < NB_OPS; op++) {
335 def = &tcg_op_defs[op];
336 n = def->nb_iargs + def->nb_oargs;
337 total_args += n;
338 }
339
340 args_ct = g_malloc(sizeof(TCGArgConstraint) * total_args);
341 sorted_args = g_malloc(sizeof(int) * total_args);
342
343 for(op = 0; op < NB_OPS; op++) {
344 def = &tcg_op_defs[op];
345 def->args_ct = args_ct;
346 def->sorted_args = sorted_args;
347 n = def->nb_iargs + def->nb_oargs;
348 sorted_args += n;
349 args_ct += n;
350 }
351
352 /* Register helpers. */
353 /* Use g_direct_hash/equal for direct pointer comparisons on func. */
354 s->helpers = helper_table = g_hash_table_new(NULL, NULL);
355
356 for (i = 0; i < ARRAY_SIZE(all_helpers); ++i) {
357 g_hash_table_insert(helper_table, (gpointer)all_helpers[i].func,
358 (gpointer)&all_helpers[i]);
359 }
360
361 tcg_target_init(s);
362 }
363
364 void tcg_prologue_init(TCGContext *s)
365 {
366 /* init global prologue and epilogue */
367 s->code_buf = s->code_gen_prologue;
368 s->code_ptr = s->code_buf;
369 tcg_target_qemu_prologue(s);
370 flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr);
371
372 #ifdef DEBUG_DISAS
373 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
374 size_t size = tcg_current_code_size(s);
375 qemu_log("PROLOGUE: [size=%zu]\n", size);
376 log_disas(s->code_buf, size);
377 qemu_log("\n");
378 qemu_log_flush();
379 }
380 #endif
381 }
382
383 void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size)
384 {
385 s->frame_start = start;
386 s->frame_end = start + size;
387 s->frame_reg = reg;
388 }
389
390 void tcg_func_start(TCGContext *s)
391 {
392 tcg_pool_reset(s);
393 s->nb_temps = s->nb_globals;
394
395 /* No temps have been previously allocated for size or locality. */
396 memset(s->free_temps, 0, sizeof(s->free_temps));
397
398 s->nb_labels = 0;
399 s->current_frame_offset = s->frame_start;
400
401 #ifdef CONFIG_DEBUG_TCG
402 s->goto_tb_issue_mask = 0;
403 #endif
404
405 s->gen_first_op_idx = 0;
406 s->gen_last_op_idx = -1;
407 s->gen_next_op_idx = 0;
408 s->gen_next_parm_idx = 0;
409
410 s->be = tcg_malloc(sizeof(TCGBackendData));
411 }
412
413 static inline void tcg_temp_alloc(TCGContext *s, int n)
414 {
415 if (n > TCG_MAX_TEMPS)
416 tcg_abort();
417 }
418
419 static inline int tcg_global_reg_new_internal(TCGType type, int reg,
420 const char *name)
421 {
422 TCGContext *s = &tcg_ctx;
423 TCGTemp *ts;
424 int idx;
425
426 #if TCG_TARGET_REG_BITS == 32
427 if (type != TCG_TYPE_I32)
428 tcg_abort();
429 #endif
430 if (tcg_regset_test_reg(s->reserved_regs, reg))
431 tcg_abort();
432 idx = s->nb_globals;
433 tcg_temp_alloc(s, s->nb_globals + 1);
434 ts = &s->temps[s->nb_globals];
435 ts->base_type = type;
436 ts->type = type;
437 ts->fixed_reg = 1;
438 ts->reg = reg;
439 ts->name = name;
440 s->nb_globals++;
441 tcg_regset_set_reg(s->reserved_regs, reg);
442 return idx;
443 }
444
445 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name)
446 {
447 int idx;
448
449 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name);
450 return MAKE_TCGV_I32(idx);
451 }
452
453 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name)
454 {
455 int idx;
456
457 idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name);
458 return MAKE_TCGV_I64(idx);
459 }
460
461 static inline int tcg_global_mem_new_internal(TCGType type, int reg,
462 intptr_t offset,
463 const char *name)
464 {
465 TCGContext *s = &tcg_ctx;
466 TCGTemp *ts;
467 int idx;
468
469 idx = s->nb_globals;
470 #if TCG_TARGET_REG_BITS == 32
471 if (type == TCG_TYPE_I64) {
472 char buf[64];
473 tcg_temp_alloc(s, s->nb_globals + 2);
474 ts = &s->temps[s->nb_globals];
475 ts->base_type = type;
476 ts->type = TCG_TYPE_I32;
477 ts->fixed_reg = 0;
478 ts->mem_allocated = 1;
479 ts->mem_reg = reg;
480 #ifdef HOST_WORDS_BIGENDIAN
481 ts->mem_offset = offset + 4;
482 #else
483 ts->mem_offset = offset;
484 #endif
485 pstrcpy(buf, sizeof(buf), name);
486 pstrcat(buf, sizeof(buf), "_0");
487 ts->name = strdup(buf);
488 ts++;
489
490 ts->base_type = type;
491 ts->type = TCG_TYPE_I32;
492 ts->fixed_reg = 0;
493 ts->mem_allocated = 1;
494 ts->mem_reg = reg;
495 #ifdef HOST_WORDS_BIGENDIAN
496 ts->mem_offset = offset;
497 #else
498 ts->mem_offset = offset + 4;
499 #endif
500 pstrcpy(buf, sizeof(buf), name);
501 pstrcat(buf, sizeof(buf), "_1");
502 ts->name = strdup(buf);
503
504 s->nb_globals += 2;
505 } else
506 #endif
507 {
508 tcg_temp_alloc(s, s->nb_globals + 1);
509 ts = &s->temps[s->nb_globals];
510 ts->base_type = type;
511 ts->type = type;
512 ts->fixed_reg = 0;
513 ts->mem_allocated = 1;
514 ts->mem_reg = reg;
515 ts->mem_offset = offset;
516 ts->name = name;
517 s->nb_globals++;
518 }
519 return idx;
520 }
521
522 TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name)
523 {
524 int idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name);
525 return MAKE_TCGV_I32(idx);
526 }
527
528 TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name)
529 {
530 int idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name);
531 return MAKE_TCGV_I64(idx);
532 }
533
534 static inline int tcg_temp_new_internal(TCGType type, int temp_local)
535 {
536 TCGContext *s = &tcg_ctx;
537 TCGTemp *ts;
538 int idx, k;
539
540 k = type + (temp_local ? TCG_TYPE_COUNT : 0);
541 idx = find_first_bit(s->free_temps[k].l, TCG_MAX_TEMPS);
542 if (idx < TCG_MAX_TEMPS) {
543 /* There is already an available temp with the right type. */
544 clear_bit(idx, s->free_temps[k].l);
545
546 ts = &s->temps[idx];
547 ts->temp_allocated = 1;
548 assert(ts->base_type == type);
549 assert(ts->temp_local == temp_local);
550 } else {
551 idx = s->nb_temps;
552 #if TCG_TARGET_REG_BITS == 32
553 if (type == TCG_TYPE_I64) {
554 tcg_temp_alloc(s, s->nb_temps + 2);
555 ts = &s->temps[s->nb_temps];
556 ts->base_type = type;
557 ts->type = TCG_TYPE_I32;
558 ts->temp_allocated = 1;
559 ts->temp_local = temp_local;
560 ts->name = NULL;
561 ts++;
562 ts->base_type = type;
563 ts->type = TCG_TYPE_I32;
564 ts->temp_allocated = 1;
565 ts->temp_local = temp_local;
566 ts->name = NULL;
567 s->nb_temps += 2;
568 } else
569 #endif
570 {
571 tcg_temp_alloc(s, s->nb_temps + 1);
572 ts = &s->temps[s->nb_temps];
573 ts->base_type = type;
574 ts->type = type;
575 ts->temp_allocated = 1;
576 ts->temp_local = temp_local;
577 ts->name = NULL;
578 s->nb_temps++;
579 }
580 }
581
582 #if defined(CONFIG_DEBUG_TCG)
583 s->temps_in_use++;
584 #endif
585 return idx;
586 }
587
588 TCGv_i32 tcg_temp_new_internal_i32(int temp_local)
589 {
590 int idx;
591
592 idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local);
593 return MAKE_TCGV_I32(idx);
594 }
595
596 TCGv_i64 tcg_temp_new_internal_i64(int temp_local)
597 {
598 int idx;
599
600 idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local);
601 return MAKE_TCGV_I64(idx);
602 }
603
604 static void tcg_temp_free_internal(int idx)
605 {
606 TCGContext *s = &tcg_ctx;
607 TCGTemp *ts;
608 int k;
609
610 #if defined(CONFIG_DEBUG_TCG)
611 s->temps_in_use--;
612 if (s->temps_in_use < 0) {
613 fprintf(stderr, "More temporaries freed than allocated!\n");
614 }
615 #endif
616
617 assert(idx >= s->nb_globals && idx < s->nb_temps);
618 ts = &s->temps[idx];
619 assert(ts->temp_allocated != 0);
620 ts->temp_allocated = 0;
621
622 k = ts->base_type + (ts->temp_local ? TCG_TYPE_COUNT : 0);
623 set_bit(idx, s->free_temps[k].l);
624 }
625
626 void tcg_temp_free_i32(TCGv_i32 arg)
627 {
628 tcg_temp_free_internal(GET_TCGV_I32(arg));
629 }
630
631 void tcg_temp_free_i64(TCGv_i64 arg)
632 {
633 tcg_temp_free_internal(GET_TCGV_I64(arg));
634 }
635
636 TCGv_i32 tcg_const_i32(int32_t val)
637 {
638 TCGv_i32 t0;
639 t0 = tcg_temp_new_i32();
640 tcg_gen_movi_i32(t0, val);
641 return t0;
642 }
643
644 TCGv_i64 tcg_const_i64(int64_t val)
645 {
646 TCGv_i64 t0;
647 t0 = tcg_temp_new_i64();
648 tcg_gen_movi_i64(t0, val);
649 return t0;
650 }
651
652 TCGv_i32 tcg_const_local_i32(int32_t val)
653 {
654 TCGv_i32 t0;
655 t0 = tcg_temp_local_new_i32();
656 tcg_gen_movi_i32(t0, val);
657 return t0;
658 }
659
660 TCGv_i64 tcg_const_local_i64(int64_t val)
661 {
662 TCGv_i64 t0;
663 t0 = tcg_temp_local_new_i64();
664 tcg_gen_movi_i64(t0, val);
665 return t0;
666 }
667
668 #if defined(CONFIG_DEBUG_TCG)
669 void tcg_clear_temp_count(void)
670 {
671 TCGContext *s = &tcg_ctx;
672 s->temps_in_use = 0;
673 }
674
675 int tcg_check_temp_count(void)
676 {
677 TCGContext *s = &tcg_ctx;
678 if (s->temps_in_use) {
679 /* Clear the count so that we don't give another
680 * warning immediately next time around.
681 */
682 s->temps_in_use = 0;
683 return 1;
684 }
685 return 0;
686 }
687 #endif
688
689 /* Note: we convert the 64 bit args to 32 bit and do some alignment
690 and endian swap. Maybe it would be better to do the alignment
691 and endian swap in tcg_reg_alloc_call(). */
692 void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret,
693 int nargs, TCGArg *args)
694 {
695 int i, real_args, nb_rets, pi, pi_first;
696 unsigned sizemask, flags;
697 TCGHelperInfo *info;
698
699 info = g_hash_table_lookup(s->helpers, (gpointer)func);
700 flags = info->flags;
701 sizemask = info->sizemask;
702
703 #if defined(__sparc__) && !defined(__arch64__) \
704 && !defined(CONFIG_TCG_INTERPRETER)
705 /* We have 64-bit values in one register, but need to pass as two
706 separate parameters. Split them. */
707 int orig_sizemask = sizemask;
708 int orig_nargs = nargs;
709 TCGv_i64 retl, reth;
710
711 TCGV_UNUSED_I64(retl);
712 TCGV_UNUSED_I64(reth);
713 if (sizemask != 0) {
714 TCGArg *split_args = __builtin_alloca(sizeof(TCGArg) * nargs * 2);
715 for (i = real_args = 0; i < nargs; ++i) {
716 int is_64bit = sizemask & (1 << (i+1)*2);
717 if (is_64bit) {
718 TCGv_i64 orig = MAKE_TCGV_I64(args[i]);
719 TCGv_i32 h = tcg_temp_new_i32();
720 TCGv_i32 l = tcg_temp_new_i32();
721 tcg_gen_extr_i64_i32(l, h, orig);
722 split_args[real_args++] = GET_TCGV_I32(h);
723 split_args[real_args++] = GET_TCGV_I32(l);
724 } else {
725 split_args[real_args++] = args[i];
726 }
727 }
728 nargs = real_args;
729 args = split_args;
730 sizemask = 0;
731 }
732 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
733 for (i = 0; i < nargs; ++i) {
734 int is_64bit = sizemask & (1 << (i+1)*2);
735 int is_signed = sizemask & (2 << (i+1)*2);
736 if (!is_64bit) {
737 TCGv_i64 temp = tcg_temp_new_i64();
738 TCGv_i64 orig = MAKE_TCGV_I64(args[i]);
739 if (is_signed) {
740 tcg_gen_ext32s_i64(temp, orig);
741 } else {
742 tcg_gen_ext32u_i64(temp, orig);
743 }
744 args[i] = GET_TCGV_I64(temp);
745 }
746 }
747 #endif /* TCG_TARGET_EXTEND_ARGS */
748
749 pi_first = pi = s->gen_next_parm_idx;
750 if (ret != TCG_CALL_DUMMY_ARG) {
751 #if defined(__sparc__) && !defined(__arch64__) \
752 && !defined(CONFIG_TCG_INTERPRETER)
753 if (orig_sizemask & 1) {
754 /* The 32-bit ABI is going to return the 64-bit value in
755 the %o0/%o1 register pair. Prepare for this by using
756 two return temporaries, and reassemble below. */
757 retl = tcg_temp_new_i64();
758 reth = tcg_temp_new_i64();
759 s->gen_opparam_buf[pi++] = GET_TCGV_I64(reth);
760 s->gen_opparam_buf[pi++] = GET_TCGV_I64(retl);
761 nb_rets = 2;
762 } else {
763 s->gen_opparam_buf[pi++] = ret;
764 nb_rets = 1;
765 }
766 #else
767 if (TCG_TARGET_REG_BITS < 64 && (sizemask & 1)) {
768 #ifdef HOST_WORDS_BIGENDIAN
769 s->gen_opparam_buf[pi++] = ret + 1;
770 s->gen_opparam_buf[pi++] = ret;
771 #else
772 s->gen_opparam_buf[pi++] = ret;
773 s->gen_opparam_buf[pi++] = ret + 1;
774 #endif
775 nb_rets = 2;
776 } else {
777 s->gen_opparam_buf[pi++] = ret;
778 nb_rets = 1;
779 }
780 #endif
781 } else {
782 nb_rets = 0;
783 }
784 real_args = 0;
785 for (i = 0; i < nargs; i++) {
786 int is_64bit = sizemask & (1 << (i+1)*2);
787 if (TCG_TARGET_REG_BITS < 64 && is_64bit) {
788 #ifdef TCG_TARGET_CALL_ALIGN_ARGS
789 /* some targets want aligned 64 bit args */
790 if (real_args & 1) {
791 s->gen_opparam_buf[pi++] = TCG_CALL_DUMMY_ARG;
792 real_args++;
793 }
794 #endif
795 /* If stack grows up, then we will be placing successive
796 arguments at lower addresses, which means we need to
797 reverse the order compared to how we would normally
798 treat either big or little-endian. For those arguments
799 that will wind up in registers, this still works for
800 HPPA (the only current STACK_GROWSUP target) since the
801 argument registers are *also* allocated in decreasing
802 order. If another such target is added, this logic may
803 have to get more complicated to differentiate between
804 stack arguments and register arguments. */
805 #if defined(HOST_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
806 s->gen_opparam_buf[pi++] = args[i] + 1;
807 s->gen_opparam_buf[pi++] = args[i];
808 #else
809 s->gen_opparam_buf[pi++] = args[i];
810 s->gen_opparam_buf[pi++] = args[i] + 1;
811 #endif
812 real_args += 2;
813 continue;
814 }
815
816 s->gen_opparam_buf[pi++] = args[i];
817 real_args++;
818 }
819 s->gen_opparam_buf[pi++] = (uintptr_t)func;
820 s->gen_opparam_buf[pi++] = flags;
821
822 i = s->gen_next_op_idx;
823 tcg_debug_assert(i < OPC_BUF_SIZE);
824 tcg_debug_assert(pi <= OPPARAM_BUF_SIZE);
825
826 /* Set links for sequential allocation during translation. */
827 s->gen_op_buf[i] = (TCGOp){
828 .opc = INDEX_op_call,
829 .callo = nb_rets,
830 .calli = real_args,
831 .args = pi_first,
832 .prev = i - 1,
833 .next = i + 1
834 };
835
836 /* Make sure the calli field didn't overflow. */
837 tcg_debug_assert(s->gen_op_buf[i].calli == real_args);
838
839 s->gen_last_op_idx = i;
840 s->gen_next_op_idx = i + 1;
841 s->gen_next_parm_idx = pi;
842
843 #if defined(__sparc__) && !defined(__arch64__) \
844 && !defined(CONFIG_TCG_INTERPRETER)
845 /* Free all of the parts we allocated above. */
846 for (i = real_args = 0; i < orig_nargs; ++i) {
847 int is_64bit = orig_sizemask & (1 << (i+1)*2);
848 if (is_64bit) {
849 TCGv_i32 h = MAKE_TCGV_I32(args[real_args++]);
850 TCGv_i32 l = MAKE_TCGV_I32(args[real_args++]);
851 tcg_temp_free_i32(h);
852 tcg_temp_free_i32(l);
853 } else {
854 real_args++;
855 }
856 }
857 if (orig_sizemask & 1) {
858 /* The 32-bit ABI returned two 32-bit pieces. Re-assemble them.
859 Note that describing these as TCGv_i64 eliminates an unnecessary
860 zero-extension that tcg_gen_concat_i32_i64 would create. */
861 tcg_gen_concat32_i64(MAKE_TCGV_I64(ret), retl, reth);
862 tcg_temp_free_i64(retl);
863 tcg_temp_free_i64(reth);
864 }
865 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
866 for (i = 0; i < nargs; ++i) {
867 int is_64bit = sizemask & (1 << (i+1)*2);
868 if (!is_64bit) {
869 TCGv_i64 temp = MAKE_TCGV_I64(args[i]);
870 tcg_temp_free_i64(temp);
871 }
872 }
873 #endif /* TCG_TARGET_EXTEND_ARGS */
874 }
875
876 static void tcg_reg_alloc_start(TCGContext *s)
877 {
878 int i;
879 TCGTemp *ts;
880 for(i = 0; i < s->nb_globals; i++) {
881 ts = &s->temps[i];
882 if (ts->fixed_reg) {
883 ts->val_type = TEMP_VAL_REG;
884 } else {
885 ts->val_type = TEMP_VAL_MEM;
886 }
887 }
888 for(i = s->nb_globals; i < s->nb_temps; i++) {
889 ts = &s->temps[i];
890 if (ts->temp_local) {
891 ts->val_type = TEMP_VAL_MEM;
892 } else {
893 ts->val_type = TEMP_VAL_DEAD;
894 }
895 ts->mem_allocated = 0;
896 ts->fixed_reg = 0;
897 }
898 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
899 s->reg_to_temp[i] = -1;
900 }
901 }
902
903 static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size,
904 int idx)
905 {
906 TCGTemp *ts;
907
908 assert(idx >= 0 && idx < s->nb_temps);
909 ts = &s->temps[idx];
910 if (idx < s->nb_globals) {
911 pstrcpy(buf, buf_size, ts->name);
912 } else {
913 if (ts->temp_local)
914 snprintf(buf, buf_size, "loc%d", idx - s->nb_globals);
915 else
916 snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals);
917 }
918 return buf;
919 }
920
921 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg)
922 {
923 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg));
924 }
925
926 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg)
927 {
928 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg));
929 }
930
931 /* Find helper name. */
932 static inline const char *tcg_find_helper(TCGContext *s, uintptr_t val)
933 {
934 const char *ret = NULL;
935 if (s->helpers) {
936 TCGHelperInfo *info = g_hash_table_lookup(s->helpers, (gpointer)val);
937 if (info) {
938 ret = info->name;
939 }
940 }
941 return ret;
942 }
943
944 static const char * const cond_name[] =
945 {
946 [TCG_COND_NEVER] = "never",
947 [TCG_COND_ALWAYS] = "always",
948 [TCG_COND_EQ] = "eq",
949 [TCG_COND_NE] = "ne",
950 [TCG_COND_LT] = "lt",
951 [TCG_COND_GE] = "ge",
952 [TCG_COND_LE] = "le",
953 [TCG_COND_GT] = "gt",
954 [TCG_COND_LTU] = "ltu",
955 [TCG_COND_GEU] = "geu",
956 [TCG_COND_LEU] = "leu",
957 [TCG_COND_GTU] = "gtu"
958 };
959
960 static const char * const ldst_name[] =
961 {
962 [MO_UB] = "ub",
963 [MO_SB] = "sb",
964 [MO_LEUW] = "leuw",
965 [MO_LESW] = "lesw",
966 [MO_LEUL] = "leul",
967 [MO_LESL] = "lesl",
968 [MO_LEQ] = "leq",
969 [MO_BEUW] = "beuw",
970 [MO_BESW] = "besw",
971 [MO_BEUL] = "beul",
972 [MO_BESL] = "besl",
973 [MO_BEQ] = "beq",
974 };
975
976 void tcg_dump_ops(TCGContext *s)
977 {
978 char buf[128];
979 TCGOp *op;
980 int oi;
981
982 for (oi = s->gen_first_op_idx; oi >= 0; oi = op->next) {
983 int i, k, nb_oargs, nb_iargs, nb_cargs;
984 const TCGOpDef *def;
985 const TCGArg *args;
986 TCGOpcode c;
987
988 op = &s->gen_op_buf[oi];
989 c = op->opc;
990 def = &tcg_op_defs[c];
991 args = &s->gen_opparam_buf[op->args];
992
993 if (c == INDEX_op_insn_start) {
994 qemu_log("%s ----", oi != s->gen_first_op_idx ? "\n" : "");
995
996 for (i = 0; i < TARGET_INSN_START_WORDS; ++i) {
997 target_ulong a;
998 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
999 a = ((target_ulong)args[i * 2 + 1] << 32) | args[i * 2];
1000 #else
1001 a = args[i];
1002 #endif
1003 qemu_log(" " TARGET_FMT_lx, a);
1004 }
1005 } else if (c == INDEX_op_call) {
1006 /* variable number of arguments */
1007 nb_oargs = op->callo;
1008 nb_iargs = op->calli;
1009 nb_cargs = def->nb_cargs;
1010
1011 /* function name, flags, out args */
1012 qemu_log(" %s %s,$0x%" TCG_PRIlx ",$%d", def->name,
1013 tcg_find_helper(s, args[nb_oargs + nb_iargs]),
1014 args[nb_oargs + nb_iargs + 1], nb_oargs);
1015 for (i = 0; i < nb_oargs; i++) {
1016 qemu_log(",%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
1017 args[i]));
1018 }
1019 for (i = 0; i < nb_iargs; i++) {
1020 TCGArg arg = args[nb_oargs + i];
1021 const char *t = "<dummy>";
1022 if (arg != TCG_CALL_DUMMY_ARG) {
1023 t = tcg_get_arg_str_idx(s, buf, sizeof(buf), arg);
1024 }
1025 qemu_log(",%s", t);
1026 }
1027 } else {
1028 qemu_log(" %s ", def->name);
1029
1030 nb_oargs = def->nb_oargs;
1031 nb_iargs = def->nb_iargs;
1032 nb_cargs = def->nb_cargs;
1033
1034 k = 0;
1035 for (i = 0; i < nb_oargs; i++) {
1036 if (k != 0) {
1037 qemu_log(",");
1038 }
1039 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
1040 args[k++]));
1041 }
1042 for (i = 0; i < nb_iargs; i++) {
1043 if (k != 0) {
1044 qemu_log(",");
1045 }
1046 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
1047 args[k++]));
1048 }
1049 switch (c) {
1050 case INDEX_op_brcond_i32:
1051 case INDEX_op_setcond_i32:
1052 case INDEX_op_movcond_i32:
1053 case INDEX_op_brcond2_i32:
1054 case INDEX_op_setcond2_i32:
1055 case INDEX_op_brcond_i64:
1056 case INDEX_op_setcond_i64:
1057 case INDEX_op_movcond_i64:
1058 if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]]) {
1059 qemu_log(",%s", cond_name[args[k++]]);
1060 } else {
1061 qemu_log(",$0x%" TCG_PRIlx, args[k++]);
1062 }
1063 i = 1;
1064 break;
1065 case INDEX_op_qemu_ld_i32:
1066 case INDEX_op_qemu_st_i32:
1067 case INDEX_op_qemu_ld_i64:
1068 case INDEX_op_qemu_st_i64:
1069 {
1070 TCGMemOpIdx oi = args[k++];
1071 TCGMemOp op = get_memop(oi);
1072 unsigned ix = get_mmuidx(oi);
1073
1074 if (op & ~(MO_AMASK | MO_BSWAP | MO_SSIZE)) {
1075 qemu_log(",$0x%x,%u", op, ix);
1076 } else {
1077 const char *s_al = "", *s_op;
1078 if (op & MO_AMASK) {
1079 if ((op & MO_AMASK) == MO_ALIGN) {
1080 s_al = "al+";
1081 } else {
1082 s_al = "un+";
1083 }
1084 }
1085 s_op = ldst_name[op & (MO_BSWAP | MO_SSIZE)];
1086 qemu_log(",%s%s,%u", s_al, s_op, ix);
1087 }
1088 i = 1;
1089 }
1090 break;
1091 default:
1092 i = 0;
1093 break;
1094 }
1095 switch (c) {
1096 case INDEX_op_set_label:
1097 case INDEX_op_br:
1098 case INDEX_op_brcond_i32:
1099 case INDEX_op_brcond_i64:
1100 case INDEX_op_brcond2_i32:
1101 qemu_log("%s$L%d", k ? "," : "", arg_label(args[k])->id);
1102 i++, k++;
1103 break;
1104 default:
1105 break;
1106 }
1107 for (; i < nb_cargs; i++, k++) {
1108 qemu_log("%s$0x%" TCG_PRIlx, k ? "," : "", args[k]);
1109 }
1110 }
1111 qemu_log("\n");
1112 }
1113 }
1114
1115 /* we give more priority to constraints with less registers */
1116 static int get_constraint_priority(const TCGOpDef *def, int k)
1117 {
1118 const TCGArgConstraint *arg_ct;
1119
1120 int i, n;
1121 arg_ct = &def->args_ct[k];
1122 if (arg_ct->ct & TCG_CT_ALIAS) {
1123 /* an alias is equivalent to a single register */
1124 n = 1;
1125 } else {
1126 if (!(arg_ct->ct & TCG_CT_REG))
1127 return 0;
1128 n = 0;
1129 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
1130 if (tcg_regset_test_reg(arg_ct->u.regs, i))
1131 n++;
1132 }
1133 }
1134 return TCG_TARGET_NB_REGS - n + 1;
1135 }
1136
1137 /* sort from highest priority to lowest */
1138 static void sort_constraints(TCGOpDef *def, int start, int n)
1139 {
1140 int i, j, p1, p2, tmp;
1141
1142 for(i = 0; i < n; i++)
1143 def->sorted_args[start + i] = start + i;
1144 if (n <= 1)
1145 return;
1146 for(i = 0; i < n - 1; i++) {
1147 for(j = i + 1; j < n; j++) {
1148 p1 = get_constraint_priority(def, def->sorted_args[start + i]);
1149 p2 = get_constraint_priority(def, def->sorted_args[start + j]);
1150 if (p1 < p2) {
1151 tmp = def->sorted_args[start + i];
1152 def->sorted_args[start + i] = def->sorted_args[start + j];
1153 def->sorted_args[start + j] = tmp;
1154 }
1155 }
1156 }
1157 }
1158
1159 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs)
1160 {
1161 TCGOpcode op;
1162 TCGOpDef *def;
1163 const char *ct_str;
1164 int i, nb_args;
1165
1166 for(;;) {
1167 if (tdefs->op == (TCGOpcode)-1)
1168 break;
1169 op = tdefs->op;
1170 assert((unsigned)op < NB_OPS);
1171 def = &tcg_op_defs[op];
1172 #if defined(CONFIG_DEBUG_TCG)
1173 /* Duplicate entry in op definitions? */
1174 assert(!def->used);
1175 def->used = 1;
1176 #endif
1177 nb_args = def->nb_iargs + def->nb_oargs;
1178 for(i = 0; i < nb_args; i++) {
1179 ct_str = tdefs->args_ct_str[i];
1180 /* Incomplete TCGTargetOpDef entry? */
1181 assert(ct_str != NULL);
1182 tcg_regset_clear(def->args_ct[i].u.regs);
1183 def->args_ct[i].ct = 0;
1184 if (ct_str[0] >= '0' && ct_str[0] <= '9') {
1185 int oarg;
1186 oarg = ct_str[0] - '0';
1187 assert(oarg < def->nb_oargs);
1188 assert(def->args_ct[oarg].ct & TCG_CT_REG);
1189 /* TCG_CT_ALIAS is for the output arguments. The input
1190 argument is tagged with TCG_CT_IALIAS. */
1191 def->args_ct[i] = def->args_ct[oarg];
1192 def->args_ct[oarg].ct = TCG_CT_ALIAS;
1193 def->args_ct[oarg].alias_index = i;
1194 def->args_ct[i].ct |= TCG_CT_IALIAS;
1195 def->args_ct[i].alias_index = oarg;
1196 } else {
1197 for(;;) {
1198 if (*ct_str == '\0')
1199 break;
1200 switch(*ct_str) {
1201 case 'i':
1202 def->args_ct[i].ct |= TCG_CT_CONST;
1203 ct_str++;
1204 break;
1205 default:
1206 if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) {
1207 fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1208 ct_str, i, def->name);
1209 exit(1);
1210 }
1211 }
1212 }
1213 }
1214 }
1215
1216 /* TCGTargetOpDef entry with too much information? */
1217 assert(i == TCG_MAX_OP_ARGS || tdefs->args_ct_str[i] == NULL);
1218
1219 /* sort the constraints (XXX: this is just an heuristic) */
1220 sort_constraints(def, 0, def->nb_oargs);
1221 sort_constraints(def, def->nb_oargs, def->nb_iargs);
1222
1223 #if 0
1224 {
1225 int i;
1226
1227 printf("%s: sorted=", def->name);
1228 for(i = 0; i < def->nb_oargs + def->nb_iargs; i++)
1229 printf(" %d", def->sorted_args[i]);
1230 printf("\n");
1231 }
1232 #endif
1233 tdefs++;
1234 }
1235
1236 #if defined(CONFIG_DEBUG_TCG)
1237 i = 0;
1238 for (op = 0; op < tcg_op_defs_max; op++) {
1239 const TCGOpDef *def = &tcg_op_defs[op];
1240 if (def->flags & TCG_OPF_NOT_PRESENT) {
1241 /* Wrong entry in op definitions? */
1242 if (def->used) {
1243 fprintf(stderr, "Invalid op definition for %s\n", def->name);
1244 i = 1;
1245 }
1246 } else {
1247 /* Missing entry in op definitions? */
1248 if (!def->used) {
1249 fprintf(stderr, "Missing op definition for %s\n", def->name);
1250 i = 1;
1251 }
1252 }
1253 }
1254 if (i == 1) {
1255 tcg_abort();
1256 }
1257 #endif
1258 }
1259
1260 void tcg_op_remove(TCGContext *s, TCGOp *op)
1261 {
1262 int next = op->next;
1263 int prev = op->prev;
1264
1265 if (next >= 0) {
1266 s->gen_op_buf[next].prev = prev;
1267 } else {
1268 s->gen_last_op_idx = prev;
1269 }
1270 if (prev >= 0) {
1271 s->gen_op_buf[prev].next = next;
1272 } else {
1273 s->gen_first_op_idx = next;
1274 }
1275
1276 memset(op, -1, sizeof(*op));
1277
1278 #ifdef CONFIG_PROFILER
1279 s->del_op_count++;
1280 #endif
1281 }
1282
1283 #ifdef USE_LIVENESS_ANALYSIS
1284 /* liveness analysis: end of function: all temps are dead, and globals
1285 should be in memory. */
1286 static inline void tcg_la_func_end(TCGContext *s, uint8_t *dead_temps,
1287 uint8_t *mem_temps)
1288 {
1289 memset(dead_temps, 1, s->nb_temps);
1290 memset(mem_temps, 1, s->nb_globals);
1291 memset(mem_temps + s->nb_globals, 0, s->nb_temps - s->nb_globals);
1292 }
1293
1294 /* liveness analysis: end of basic block: all temps are dead, globals
1295 and local temps should be in memory. */
1296 static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps,
1297 uint8_t *mem_temps)
1298 {
1299 int i;
1300
1301 memset(dead_temps, 1, s->nb_temps);
1302 memset(mem_temps, 1, s->nb_globals);
1303 for(i = s->nb_globals; i < s->nb_temps; i++) {
1304 mem_temps[i] = s->temps[i].temp_local;
1305 }
1306 }
1307
1308 /* Liveness analysis : update the opc_dead_args array to tell if a
1309 given input arguments is dead. Instructions updating dead
1310 temporaries are removed. */
1311 static void tcg_liveness_analysis(TCGContext *s)
1312 {
1313 uint8_t *dead_temps, *mem_temps;
1314 int oi, oi_prev, nb_ops;
1315
1316 nb_ops = s->gen_next_op_idx;
1317 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t));
1318 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t));
1319
1320 dead_temps = tcg_malloc(s->nb_temps);
1321 mem_temps = tcg_malloc(s->nb_temps);
1322 tcg_la_func_end(s, dead_temps, mem_temps);
1323
1324 for (oi = s->gen_last_op_idx; oi >= 0; oi = oi_prev) {
1325 int i, nb_iargs, nb_oargs;
1326 TCGOpcode opc_new, opc_new2;
1327 bool have_opc_new2;
1328 uint16_t dead_args;
1329 uint8_t sync_args;
1330 TCGArg arg;
1331
1332 TCGOp * const op = &s->gen_op_buf[oi];
1333 TCGArg * const args = &s->gen_opparam_buf[op->args];
1334 TCGOpcode opc = op->opc;
1335 const TCGOpDef *def = &tcg_op_defs[opc];
1336
1337 oi_prev = op->prev;
1338
1339 switch (opc) {
1340 case INDEX_op_call:
1341 {
1342 int call_flags;
1343
1344 nb_oargs = op->callo;
1345 nb_iargs = op->calli;
1346 call_flags = args[nb_oargs + nb_iargs + 1];
1347
1348 /* pure functions can be removed if their result is unused */
1349 if (call_flags & TCG_CALL_NO_SIDE_EFFECTS) {
1350 for (i = 0; i < nb_oargs; i++) {
1351 arg = args[i];
1352 if (!dead_temps[arg] || mem_temps[arg]) {
1353 goto do_not_remove_call;
1354 }
1355 }
1356 goto do_remove;
1357 } else {
1358 do_not_remove_call:
1359
1360 /* output args are dead */
1361 dead_args = 0;
1362 sync_args = 0;
1363 for (i = 0; i < nb_oargs; i++) {
1364 arg = args[i];
1365 if (dead_temps[arg]) {
1366 dead_args |= (1 << i);
1367 }
1368 if (mem_temps[arg]) {
1369 sync_args |= (1 << i);
1370 }
1371 dead_temps[arg] = 1;
1372 mem_temps[arg] = 0;
1373 }
1374
1375 if (!(call_flags & TCG_CALL_NO_READ_GLOBALS)) {
1376 /* globals should be synced to memory */
1377 memset(mem_temps, 1, s->nb_globals);
1378 }
1379 if (!(call_flags & (TCG_CALL_NO_WRITE_GLOBALS |
1380 TCG_CALL_NO_READ_GLOBALS))) {
1381 /* globals should go back to memory */
1382 memset(dead_temps, 1, s->nb_globals);
1383 }
1384
1385 /* record arguments that die in this helper */
1386 for (i = nb_oargs; i < nb_iargs + nb_oargs; i++) {
1387 arg = args[i];
1388 if (arg != TCG_CALL_DUMMY_ARG) {
1389 if (dead_temps[arg]) {
1390 dead_args |= (1 << i);
1391 }
1392 }
1393 }
1394 /* input arguments are live for preceding opcodes */
1395 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
1396 arg = args[i];
1397 dead_temps[arg] = 0;
1398 }
1399 s->op_dead_args[oi] = dead_args;
1400 s->op_sync_args[oi] = sync_args;
1401 }
1402 }
1403 break;
1404 case INDEX_op_insn_start:
1405 break;
1406 case INDEX_op_discard:
1407 /* mark the temporary as dead */
1408 dead_temps[args[0]] = 1;
1409 mem_temps[args[0]] = 0;
1410 break;
1411
1412 case INDEX_op_add2_i32:
1413 opc_new = INDEX_op_add_i32;
1414 goto do_addsub2;
1415 case INDEX_op_sub2_i32:
1416 opc_new = INDEX_op_sub_i32;
1417 goto do_addsub2;
1418 case INDEX_op_add2_i64:
1419 opc_new = INDEX_op_add_i64;
1420 goto do_addsub2;
1421 case INDEX_op_sub2_i64:
1422 opc_new = INDEX_op_sub_i64;
1423 do_addsub2:
1424 nb_iargs = 4;
1425 nb_oargs = 2;
1426 /* Test if the high part of the operation is dead, but not
1427 the low part. The result can be optimized to a simple
1428 add or sub. This happens often for x86_64 guest when the
1429 cpu mode is set to 32 bit. */
1430 if (dead_temps[args[1]] && !mem_temps[args[1]]) {
1431 if (dead_temps[args[0]] && !mem_temps[args[0]]) {
1432 goto do_remove;
1433 }
1434 /* Replace the opcode and adjust the args in place,
1435 leaving 3 unused args at the end. */
1436 op->opc = opc = opc_new;
1437 args[1] = args[2];
1438 args[2] = args[4];
1439 /* Fall through and mark the single-word operation live. */
1440 nb_iargs = 2;
1441 nb_oargs = 1;
1442 }
1443 goto do_not_remove;
1444
1445 case INDEX_op_mulu2_i32:
1446 opc_new = INDEX_op_mul_i32;
1447 opc_new2 = INDEX_op_muluh_i32;
1448 have_opc_new2 = TCG_TARGET_HAS_muluh_i32;
1449 goto do_mul2;
1450 case INDEX_op_muls2_i32:
1451 opc_new = INDEX_op_mul_i32;
1452 opc_new2 = INDEX_op_mulsh_i32;
1453 have_opc_new2 = TCG_TARGET_HAS_mulsh_i32;
1454 goto do_mul2;
1455 case INDEX_op_mulu2_i64:
1456 opc_new = INDEX_op_mul_i64;
1457 opc_new2 = INDEX_op_muluh_i64;
1458 have_opc_new2 = TCG_TARGET_HAS_muluh_i64;
1459 goto do_mul2;
1460 case INDEX_op_muls2_i64:
1461 opc_new = INDEX_op_mul_i64;
1462 opc_new2 = INDEX_op_mulsh_i64;
1463 have_opc_new2 = TCG_TARGET_HAS_mulsh_i64;
1464 goto do_mul2;
1465 do_mul2:
1466 nb_iargs = 2;
1467 nb_oargs = 2;
1468 if (dead_temps[args[1]] && !mem_temps[args[1]]) {
1469 if (dead_temps[args[0]] && !mem_temps[args[0]]) {
1470 /* Both parts of the operation are dead. */
1471 goto do_remove;
1472 }
1473 /* The high part of the operation is dead; generate the low. */
1474 op->opc = opc = opc_new;
1475 args[1] = args[2];
1476 args[2] = args[3];
1477 } else if (have_opc_new2 && dead_temps[args[0]]
1478 && !mem_temps[args[0]]) {
1479 /* The low part of the operation is dead; generate the high. */
1480 op->opc = opc = opc_new2;
1481 args[0] = args[1];
1482 args[1] = args[2];
1483 args[2] = args[3];
1484 } else {
1485 goto do_not_remove;
1486 }
1487 /* Mark the single-word operation live. */
1488 nb_oargs = 1;
1489 goto do_not_remove;
1490
1491 default:
1492 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1493 nb_iargs = def->nb_iargs;
1494 nb_oargs = def->nb_oargs;
1495
1496 /* Test if the operation can be removed because all
1497 its outputs are dead. We assume that nb_oargs == 0
1498 implies side effects */
1499 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) {
1500 for (i = 0; i < nb_oargs; i++) {
1501 arg = args[i];
1502 if (!dead_temps[arg] || mem_temps[arg]) {
1503 goto do_not_remove;
1504 }
1505 }
1506 do_remove:
1507 tcg_op_remove(s, op);
1508 } else {
1509 do_not_remove:
1510 /* output args are dead */
1511 dead_args = 0;
1512 sync_args = 0;
1513 for (i = 0; i < nb_oargs; i++) {
1514 arg = args[i];
1515 if (dead_temps[arg]) {
1516 dead_args |= (1 << i);
1517 }
1518 if (mem_temps[arg]) {
1519 sync_args |= (1 << i);
1520 }
1521 dead_temps[arg] = 1;
1522 mem_temps[arg] = 0;
1523 }
1524
1525 /* if end of basic block, update */
1526 if (def->flags & TCG_OPF_BB_END) {
1527 tcg_la_bb_end(s, dead_temps, mem_temps);
1528 } else if (def->flags & TCG_OPF_SIDE_EFFECTS) {
1529 /* globals should be synced to memory */
1530 memset(mem_temps, 1, s->nb_globals);
1531 }
1532
1533 /* record arguments that die in this opcode */
1534 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
1535 arg = args[i];
1536 if (dead_temps[arg]) {
1537 dead_args |= (1 << i);
1538 }
1539 }
1540 /* input arguments are live for preceding opcodes */
1541 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
1542 arg = args[i];
1543 dead_temps[arg] = 0;
1544 }
1545 s->op_dead_args[oi] = dead_args;
1546 s->op_sync_args[oi] = sync_args;
1547 }
1548 break;
1549 }
1550 }
1551 }
1552 #else
1553 /* dummy liveness analysis */
1554 static void tcg_liveness_analysis(TCGContext *s)
1555 {
1556 int nb_ops;
1557 nb_ops = s->gen_opc_ptr - s->gen_opc_buf;
1558
1559 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t));
1560 memset(s->op_dead_args, 0, nb_ops * sizeof(uint16_t));
1561 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t));
1562 memset(s->op_sync_args, 0, nb_ops * sizeof(uint8_t));
1563 }
1564 #endif
1565
1566 #ifndef NDEBUG
1567 static void dump_regs(TCGContext *s)
1568 {
1569 TCGTemp *ts;
1570 int i;
1571 char buf[64];
1572
1573 for(i = 0; i < s->nb_temps; i++) {
1574 ts = &s->temps[i];
1575 printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i));
1576 switch(ts->val_type) {
1577 case TEMP_VAL_REG:
1578 printf("%s", tcg_target_reg_names[ts->reg]);
1579 break;
1580 case TEMP_VAL_MEM:
1581 printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]);
1582 break;
1583 case TEMP_VAL_CONST:
1584 printf("$0x%" TCG_PRIlx, ts->val);
1585 break;
1586 case TEMP_VAL_DEAD:
1587 printf("D");
1588 break;
1589 default:
1590 printf("???");
1591 break;
1592 }
1593 printf("\n");
1594 }
1595
1596 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
1597 if (s->reg_to_temp[i] >= 0) {
1598 printf("%s: %s\n",
1599 tcg_target_reg_names[i],
1600 tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i]));
1601 }
1602 }
1603 }
1604
1605 static void check_regs(TCGContext *s)
1606 {
1607 int reg, k;
1608 TCGTemp *ts;
1609 char buf[64];
1610
1611 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1612 k = s->reg_to_temp[reg];
1613 if (k >= 0) {
1614 ts = &s->temps[k];
1615 if (ts->val_type != TEMP_VAL_REG ||
1616 ts->reg != reg) {
1617 printf("Inconsistency for register %s:\n",
1618 tcg_target_reg_names[reg]);
1619 goto fail;
1620 }
1621 }
1622 }
1623 for(k = 0; k < s->nb_temps; k++) {
1624 ts = &s->temps[k];
1625 if (ts->val_type == TEMP_VAL_REG &&
1626 !ts->fixed_reg &&
1627 s->reg_to_temp[ts->reg] != k) {
1628 printf("Inconsistency for temp %s:\n",
1629 tcg_get_arg_str_idx(s, buf, sizeof(buf), k));
1630 fail:
1631 printf("reg state:\n");
1632 dump_regs(s);
1633 tcg_abort();
1634 }
1635 }
1636 }
1637 #endif
1638
1639 static void temp_allocate_frame(TCGContext *s, int temp)
1640 {
1641 TCGTemp *ts;
1642 ts = &s->temps[temp];
1643 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64)
1644 /* Sparc64 stack is accessed with offset of 2047 */
1645 s->current_frame_offset = (s->current_frame_offset +
1646 (tcg_target_long)sizeof(tcg_target_long) - 1) &
1647 ~(sizeof(tcg_target_long) - 1);
1648 #endif
1649 if (s->current_frame_offset + (tcg_target_long)sizeof(tcg_target_long) >
1650 s->frame_end) {
1651 tcg_abort();
1652 }
1653 ts->mem_offset = s->current_frame_offset;
1654 ts->mem_reg = s->frame_reg;
1655 ts->mem_allocated = 1;
1656 s->current_frame_offset += sizeof(tcg_target_long);
1657 }
1658
1659 /* sync register 'reg' by saving it to the corresponding temporary */
1660 static inline void tcg_reg_sync(TCGContext *s, int reg)
1661 {
1662 TCGTemp *ts;
1663 int temp;
1664
1665 temp = s->reg_to_temp[reg];
1666 ts = &s->temps[temp];
1667 assert(ts->val_type == TEMP_VAL_REG);
1668 if (!ts->mem_coherent && !ts->fixed_reg) {
1669 if (!ts->mem_allocated) {
1670 temp_allocate_frame(s, temp);
1671 }
1672 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1673 }
1674 ts->mem_coherent = 1;
1675 }
1676
1677 /* free register 'reg' by spilling the corresponding temporary if necessary */
1678 static void tcg_reg_free(TCGContext *s, int reg)
1679 {
1680 int temp;
1681
1682 temp = s->reg_to_temp[reg];
1683 if (temp != -1) {
1684 tcg_reg_sync(s, reg);
1685 s->temps[temp].val_type = TEMP_VAL_MEM;
1686 s->reg_to_temp[reg] = -1;
1687 }
1688 }
1689
1690 /* Allocate a register belonging to reg1 & ~reg2 */
1691 static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2)
1692 {
1693 int i, reg;
1694 TCGRegSet reg_ct;
1695
1696 tcg_regset_andnot(reg_ct, reg1, reg2);
1697
1698 /* first try free registers */
1699 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
1700 reg = tcg_target_reg_alloc_order[i];
1701 if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1)
1702 return reg;
1703 }
1704
1705 /* XXX: do better spill choice */
1706 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
1707 reg = tcg_target_reg_alloc_order[i];
1708 if (tcg_regset_test_reg(reg_ct, reg)) {
1709 tcg_reg_free(s, reg);
1710 return reg;
1711 }
1712 }
1713
1714 tcg_abort();
1715 }
1716
1717 /* mark a temporary as dead. */
1718 static inline void temp_dead(TCGContext *s, int temp)
1719 {
1720 TCGTemp *ts;
1721
1722 ts = &s->temps[temp];
1723 if (!ts->fixed_reg) {
1724 if (ts->val_type == TEMP_VAL_REG) {
1725 s->reg_to_temp[ts->reg] = -1;
1726 }
1727 if (temp < s->nb_globals || ts->temp_local) {
1728 ts->val_type = TEMP_VAL_MEM;
1729 } else {
1730 ts->val_type = TEMP_VAL_DEAD;
1731 }
1732 }
1733 }
1734
1735 /* sync a temporary to memory. 'allocated_regs' is used in case a
1736 temporary registers needs to be allocated to store a constant. */
1737 static inline void temp_sync(TCGContext *s, int temp, TCGRegSet allocated_regs)
1738 {
1739 TCGTemp *ts;
1740
1741 ts = &s->temps[temp];
1742 if (!ts->fixed_reg) {
1743 switch(ts->val_type) {
1744 case TEMP_VAL_CONST:
1745 ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1746 allocated_regs);
1747 ts->val_type = TEMP_VAL_REG;
1748 s->reg_to_temp[ts->reg] = temp;
1749 ts->mem_coherent = 0;
1750 tcg_out_movi(s, ts->type, ts->reg, ts->val);
1751 /* fallthrough*/
1752 case TEMP_VAL_REG:
1753 tcg_reg_sync(s, ts->reg);
1754 break;
1755 case TEMP_VAL_DEAD:
1756 case TEMP_VAL_MEM:
1757 break;
1758 default:
1759 tcg_abort();
1760 }
1761 }
1762 }
1763
1764 /* save a temporary to memory. 'allocated_regs' is used in case a
1765 temporary registers needs to be allocated to store a constant. */
1766 static inline void temp_save(TCGContext *s, int temp, TCGRegSet allocated_regs)
1767 {
1768 #ifdef USE_LIVENESS_ANALYSIS
1769 /* The liveness analysis already ensures that globals are back
1770 in memory. Keep an assert for safety. */
1771 assert(s->temps[temp].val_type == TEMP_VAL_MEM || s->temps[temp].fixed_reg);
1772 #else
1773 temp_sync(s, temp, allocated_regs);
1774 temp_dead(s, temp);
1775 #endif
1776 }
1777
1778 /* save globals to their canonical location and assume they can be
1779 modified be the following code. 'allocated_regs' is used in case a
1780 temporary registers needs to be allocated to store a constant. */
1781 static void save_globals(TCGContext *s, TCGRegSet allocated_regs)
1782 {
1783 int i;
1784
1785 for(i = 0; i < s->nb_globals; i++) {
1786 temp_save(s, i, allocated_regs);
1787 }
1788 }
1789
1790 /* sync globals to their canonical location and assume they can be
1791 read by the following code. 'allocated_regs' is used in case a
1792 temporary registers needs to be allocated to store a constant. */
1793 static void sync_globals(TCGContext *s, TCGRegSet allocated_regs)
1794 {
1795 int i;
1796
1797 for (i = 0; i < s->nb_globals; i++) {
1798 #ifdef USE_LIVENESS_ANALYSIS
1799 assert(s->temps[i].val_type != TEMP_VAL_REG || s->temps[i].fixed_reg ||
1800 s->temps[i].mem_coherent);
1801 #else
1802 temp_sync(s, i, allocated_regs);
1803 #endif
1804 }
1805 }
1806
1807 /* at the end of a basic block, we assume all temporaries are dead and
1808 all globals are stored at their canonical location. */
1809 static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
1810 {
1811 TCGTemp *ts;
1812 int i;
1813
1814 for(i = s->nb_globals; i < s->nb_temps; i++) {
1815 ts = &s->temps[i];
1816 if (ts->temp_local) {
1817 temp_save(s, i, allocated_regs);
1818 } else {
1819 #ifdef USE_LIVENESS_ANALYSIS
1820 /* The liveness analysis already ensures that temps are dead.
1821 Keep an assert for safety. */
1822 assert(ts->val_type == TEMP_VAL_DEAD);
1823 #else
1824 temp_dead(s, i);
1825 #endif
1826 }
1827 }
1828
1829 save_globals(s, allocated_regs);
1830 }
1831
1832 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1)
1833 #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1)
1834
1835 static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args,
1836 uint16_t dead_args, uint8_t sync_args)
1837 {
1838 TCGTemp *ots;
1839 tcg_target_ulong val;
1840
1841 ots = &s->temps[args[0]];
1842 val = args[1];
1843
1844 if (ots->fixed_reg) {
1845 /* for fixed registers, we do not do any constant
1846 propagation */
1847 tcg_out_movi(s, ots->type, ots->reg, val);
1848 } else {
1849 /* The movi is not explicitly generated here */
1850 if (ots->val_type == TEMP_VAL_REG)
1851 s->reg_to_temp[ots->reg] = -1;
1852 ots->val_type = TEMP_VAL_CONST;
1853 ots->val = val;
1854 }
1855 if (NEED_SYNC_ARG(0)) {
1856 temp_sync(s, args[0], s->reserved_regs);
1857 }
1858 if (IS_DEAD_ARG(0)) {
1859 temp_dead(s, args[0]);
1860 }
1861 }
1862
1863 static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
1864 const TCGArg *args, uint16_t dead_args,
1865 uint8_t sync_args)
1866 {
1867 TCGRegSet allocated_regs;
1868 TCGTemp *ts, *ots;
1869 TCGType otype, itype;
1870
1871 tcg_regset_set(allocated_regs, s->reserved_regs);
1872 ots = &s->temps[args[0]];
1873 ts = &s->temps[args[1]];
1874
1875 /* Note that otype != itype for no-op truncation. */
1876 otype = ots->type;
1877 itype = ts->type;
1878
1879 /* If the source value is not in a register, and we're going to be
1880 forced to have it in a register in order to perform the copy,
1881 then copy the SOURCE value into its own register first. That way
1882 we don't have to reload SOURCE the next time it is used. */
1883 if (((NEED_SYNC_ARG(0) || ots->fixed_reg) && ts->val_type != TEMP_VAL_REG)
1884 || ts->val_type == TEMP_VAL_MEM) {
1885 ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[itype],
1886 allocated_regs);
1887 if (ts->val_type == TEMP_VAL_MEM) {
1888 tcg_out_ld(s, itype, ts->reg, ts->mem_reg, ts->mem_offset);
1889 ts->mem_coherent = 1;
1890 } else if (ts->val_type == TEMP_VAL_CONST) {
1891 tcg_out_movi(s, itype, ts->reg, ts->val);
1892 ts->mem_coherent = 0;
1893 }
1894 s->reg_to_temp[ts->reg] = args[1];
1895 ts->val_type = TEMP_VAL_REG;
1896 }
1897
1898 if (IS_DEAD_ARG(0) && !ots->fixed_reg) {
1899 /* mov to a non-saved dead register makes no sense (even with
1900 liveness analysis disabled). */
1901 assert(NEED_SYNC_ARG(0));
1902 /* The code above should have moved the temp to a register. */
1903 assert(ts->val_type == TEMP_VAL_REG);
1904 if (!ots->mem_allocated) {
1905 temp_allocate_frame(s, args[0]);
1906 }
1907 tcg_out_st(s, otype, ts->reg, ots->mem_reg, ots->mem_offset);
1908 if (IS_DEAD_ARG(1)) {
1909 temp_dead(s, args[1]);
1910 }
1911 temp_dead(s, args[0]);
1912 } else if (ts->val_type == TEMP_VAL_CONST) {
1913 /* propagate constant */
1914 if (ots->val_type == TEMP_VAL_REG) {
1915 s->reg_to_temp[ots->reg] = -1;
1916 }
1917 ots->val_type = TEMP_VAL_CONST;
1918 ots->val = ts->val;
1919 if (IS_DEAD_ARG(1)) {
1920 temp_dead(s, args[1]);
1921 }
1922 } else {
1923 /* The code in the first if block should have moved the
1924 temp to a register. */
1925 assert(ts->val_type == TEMP_VAL_REG);
1926 if (IS_DEAD_ARG(1) && !ts->fixed_reg && !ots->fixed_reg) {
1927 /* the mov can be suppressed */
1928 if (ots->val_type == TEMP_VAL_REG) {
1929 s->reg_to_temp[ots->reg] = -1;
1930 }
1931 ots->reg = ts->reg;
1932 temp_dead(s, args[1]);
1933 } else {
1934 if (ots->val_type != TEMP_VAL_REG) {
1935 /* When allocating a new register, make sure to not spill the
1936 input one. */
1937 tcg_regset_set_reg(allocated_regs, ts->reg);
1938 ots->reg = tcg_reg_alloc(s, tcg_target_available_regs[otype],
1939 allocated_regs);
1940 }
1941 tcg_out_mov(s, otype, ots->reg, ts->reg);
1942 }
1943 ots->val_type = TEMP_VAL_REG;
1944 ots->mem_coherent = 0;
1945 s->reg_to_temp[ots->reg] = args[0];
1946 if (NEED_SYNC_ARG(0)) {
1947 tcg_reg_sync(s, ots->reg);
1948 }
1949 }
1950 }
1951
1952 static void tcg_reg_alloc_op(TCGContext *s,
1953 const TCGOpDef *def, TCGOpcode opc,
1954 const TCGArg *args, uint16_t dead_args,
1955 uint8_t sync_args)
1956 {
1957 TCGRegSet allocated_regs;
1958 int i, k, nb_iargs, nb_oargs, reg;
1959 TCGArg arg;
1960 const TCGArgConstraint *arg_ct;
1961 TCGTemp *ts;
1962 TCGArg new_args[TCG_MAX_OP_ARGS];
1963 int const_args[TCG_MAX_OP_ARGS];
1964
1965 nb_oargs = def->nb_oargs;
1966 nb_iargs = def->nb_iargs;
1967
1968 /* copy constants */
1969 memcpy(new_args + nb_oargs + nb_iargs,
1970 args + nb_oargs + nb_iargs,
1971 sizeof(TCGArg) * def->nb_cargs);
1972
1973 /* satisfy input constraints */
1974 tcg_regset_set(allocated_regs, s->reserved_regs);
1975 for(k = 0; k < nb_iargs; k++) {
1976 i = def->sorted_args[nb_oargs + k];
1977 arg = args[i];
1978 arg_ct = &def->args_ct[i];
1979 ts = &s->temps[arg];
1980 if (ts->val_type == TEMP_VAL_MEM) {
1981 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1982 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1983 ts->val_type = TEMP_VAL_REG;
1984 ts->reg = reg;
1985 ts->mem_coherent = 1;
1986 s->reg_to_temp[reg] = arg;
1987 } else if (ts->val_type == TEMP_VAL_CONST) {
1988 if (tcg_target_const_match(ts->val, ts->type, arg_ct)) {
1989 /* constant is OK for instruction */
1990 const_args[i] = 1;
1991 new_args[i] = ts->val;
1992 goto iarg_end;
1993 } else {
1994 /* need to move to a register */
1995 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1996 tcg_out_movi(s, ts->type, reg, ts->val);
1997 ts->val_type = TEMP_VAL_REG;
1998 ts->reg = reg;
1999 ts->mem_coherent = 0;
2000 s->reg_to_temp[reg] = arg;
2001 }
2002 }
2003 assert(ts->val_type == TEMP_VAL_REG);
2004 if (arg_ct->ct & TCG_CT_IALIAS) {
2005 if (ts->fixed_reg) {
2006 /* if fixed register, we must allocate a new register
2007 if the alias is not the same register */
2008 if (arg != args[arg_ct->alias_index])
2009 goto allocate_in_reg;
2010 } else {
2011 /* if the input is aliased to an output and if it is
2012 not dead after the instruction, we must allocate
2013 a new register and move it */
2014 if (!IS_DEAD_ARG(i)) {
2015 goto allocate_in_reg;
2016 }
2017 /* check if the current register has already been allocated
2018 for another input aliased to an output */
2019 int k2, i2;
2020 for (k2 = 0 ; k2 < k ; k2++) {
2021 i2 = def->sorted_args[nb_oargs + k2];
2022 if ((def->args_ct[i2].ct & TCG_CT_IALIAS) &&
2023 (new_args[i2] == ts->reg)) {
2024 goto allocate_in_reg;
2025 }
2026 }
2027 }
2028 }
2029 reg = ts->reg;
2030 if (tcg_regset_test_reg(arg_ct->u.regs, reg)) {
2031 /* nothing to do : the constraint is satisfied */
2032 } else {
2033 allocate_in_reg:
2034 /* allocate a new register matching the constraint
2035 and move the temporary register into it */
2036 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
2037 tcg_out_mov(s, ts->type, reg, ts->reg);
2038 }
2039 new_args[i] = reg;
2040 const_args[i] = 0;
2041 tcg_regset_set_reg(allocated_regs, reg);
2042 iarg_end: ;
2043 }
2044
2045 /* mark dead temporaries and free the associated registers */
2046 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
2047 if (IS_DEAD_ARG(i)) {
2048 temp_dead(s, args[i]);
2049 }
2050 }
2051
2052 if (def->flags & TCG_OPF_BB_END) {
2053 tcg_reg_alloc_bb_end(s, allocated_regs);
2054 } else {
2055 if (def->flags & TCG_OPF_CALL_CLOBBER) {
2056 /* XXX: permit generic clobber register list ? */
2057 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
2058 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
2059 tcg_reg_free(s, reg);
2060 }
2061 }
2062 }
2063 if (def->flags & TCG_OPF_SIDE_EFFECTS) {
2064 /* sync globals if the op has side effects and might trigger
2065 an exception. */
2066 sync_globals(s, allocated_regs);
2067 }
2068
2069 /* satisfy the output constraints */
2070 tcg_regset_set(allocated_regs, s->reserved_regs);
2071 for(k = 0; k < nb_oargs; k++) {
2072 i = def->sorted_args[k];
2073 arg = args[i];
2074 arg_ct = &def->args_ct[i];
2075 ts = &s->temps[arg];
2076 if (arg_ct->ct & TCG_CT_ALIAS) {
2077 reg = new_args[arg_ct->alias_index];
2078 } else {
2079 /* if fixed register, we try to use it */
2080 reg = ts->reg;
2081 if (ts->fixed_reg &&
2082 tcg_regset_test_reg(arg_ct->u.regs, reg)) {
2083 goto oarg_end;
2084 }
2085 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
2086 }
2087 tcg_regset_set_reg(allocated_regs, reg);
2088 /* if a fixed register is used, then a move will be done afterwards */
2089 if (!ts->fixed_reg) {
2090 if (ts->val_type == TEMP_VAL_REG) {
2091 s->reg_to_temp[ts->reg] = -1;
2092 }
2093 ts->val_type = TEMP_VAL_REG;
2094 ts->reg = reg;
2095 /* temp value is modified, so the value kept in memory is
2096 potentially not the same */
2097 ts->mem_coherent = 0;
2098 s->reg_to_temp[reg] = arg;
2099 }
2100 oarg_end:
2101 new_args[i] = reg;
2102 }
2103 }
2104
2105 /* emit instruction */
2106 tcg_out_op(s, opc, new_args, const_args);
2107
2108 /* move the outputs in the correct register if needed */
2109 for(i = 0; i < nb_oargs; i++) {
2110 ts = &s->temps[args[i]];
2111 reg = new_args[i];
2112 if (ts->fixed_reg && ts->reg != reg) {
2113 tcg_out_mov(s, ts->type, ts->reg, reg);
2114 }
2115 if (NEED_SYNC_ARG(i)) {
2116 tcg_reg_sync(s, reg);
2117 }
2118 if (IS_DEAD_ARG(i)) {
2119 temp_dead(s, args[i]);
2120 }
2121 }
2122 }
2123
2124 #ifdef TCG_TARGET_STACK_GROWSUP
2125 #define STACK_DIR(x) (-(x))
2126 #else
2127 #define STACK_DIR(x) (x)
2128 #endif
2129
2130 static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs,
2131 const TCGArg * const args, uint16_t dead_args,
2132 uint8_t sync_args)
2133 {
2134 int flags, nb_regs, i, reg;
2135 TCGArg arg;
2136 TCGTemp *ts;
2137 intptr_t stack_offset;
2138 size_t call_stack_size;
2139 tcg_insn_unit *func_addr;
2140 int allocate_args;
2141 TCGRegSet allocated_regs;
2142
2143 func_addr = (tcg_insn_unit *)(intptr_t)args[nb_oargs + nb_iargs];
2144 flags = args[nb_oargs + nb_iargs + 1];
2145
2146 nb_regs = ARRAY_SIZE(tcg_target_call_iarg_regs);
2147 if (nb_regs > nb_iargs) {
2148 nb_regs = nb_iargs;
2149 }
2150
2151 /* assign stack slots first */
2152 call_stack_size = (nb_iargs - nb_regs) * sizeof(tcg_target_long);
2153 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) &
2154 ~(TCG_TARGET_STACK_ALIGN - 1);
2155 allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE);
2156 if (allocate_args) {
2157 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed,
2158 preallocate call stack */
2159 tcg_abort();
2160 }
2161
2162 stack_offset = TCG_TARGET_CALL_STACK_OFFSET;
2163 for(i = nb_regs; i < nb_iargs; i++) {
2164 arg = args[nb_oargs + i];
2165 #ifdef TCG_TARGET_STACK_GROWSUP
2166 stack_offset -= sizeof(tcg_target_long);
2167 #endif
2168 if (arg != TCG_CALL_DUMMY_ARG) {
2169 ts = &s->temps[arg];
2170 if (ts->val_type == TEMP_VAL_REG) {
2171 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset);
2172 } else if (ts->val_type == TEMP_VAL_MEM) {
2173 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
2174 s->reserved_regs);
2175 /* XXX: not correct if reading values from the stack */
2176 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
2177 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
2178 } else if (ts->val_type == TEMP_VAL_CONST) {
2179 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
2180 s->reserved_regs);
2181 /* XXX: sign extend may be needed on some targets */
2182 tcg_out_movi(s, ts->type, reg, ts->val);
2183 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
2184 } else {
2185 tcg_abort();
2186 }
2187 }
2188 #ifndef TCG_TARGET_STACK_GROWSUP
2189 stack_offset += sizeof(tcg_target_long);
2190 #endif
2191 }
2192
2193 /* assign input registers */
2194 tcg_regset_set(allocated_regs, s->reserved_regs);
2195 for(i = 0; i < nb_regs; i++) {
2196 arg = args[nb_oargs + i];
2197 if (arg != TCG_CALL_DUMMY_ARG) {
2198 ts = &s->temps[arg];
2199 reg = tcg_target_call_iarg_regs[i];
2200 tcg_reg_free(s, reg);
2201 if (ts->val_type == TEMP_VAL_REG) {
2202 if (ts->reg != reg) {
2203 tcg_out_mov(s, ts->type, reg, ts->reg);
2204 }
2205 } else if (ts->val_type == TEMP_VAL_MEM) {
2206 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
2207 } else if (ts->val_type == TEMP_VAL_CONST) {
2208 /* XXX: sign extend ? */
2209 tcg_out_movi(s, ts->type, reg, ts->val);
2210 } else {
2211 tcg_abort();
2212 }
2213 tcg_regset_set_reg(allocated_regs, reg);
2214 }
2215 }
2216
2217 /* mark dead temporaries and free the associated registers */
2218 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) {
2219 if (IS_DEAD_ARG(i)) {
2220 temp_dead(s, args[i]);
2221 }
2222 }
2223
2224 /* clobber call registers */
2225 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
2226 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
2227 tcg_reg_free(s, reg);
2228 }
2229 }
2230
2231 /* Save globals if they might be written by the helper, sync them if
2232 they might be read. */
2233 if (flags & TCG_CALL_NO_READ_GLOBALS) {
2234 /* Nothing to do */
2235 } else if (flags & TCG_CALL_NO_WRITE_GLOBALS) {
2236 sync_globals(s, allocated_regs);
2237 } else {
2238 save_globals(s, allocated_regs);
2239 }
2240
2241 tcg_out_call(s, func_addr);
2242
2243 /* assign output registers and emit moves if needed */
2244 for(i = 0; i < nb_oargs; i++) {
2245 arg = args[i];
2246 ts = &s->temps[arg];
2247 reg = tcg_target_call_oarg_regs[i];
2248 assert(s->reg_to_temp[reg] == -1);
2249
2250 if (ts->fixed_reg) {
2251 if (ts->reg != reg) {
2252 tcg_out_mov(s, ts->type, ts->reg, reg);
2253 }
2254 } else {
2255 if (ts->val_type == TEMP_VAL_REG) {
2256 s->reg_to_temp[ts->reg] = -1;
2257 }
2258 ts->val_type = TEMP_VAL_REG;
2259 ts->reg = reg;
2260 ts->mem_coherent = 0;
2261 s->reg_to_temp[reg] = arg;
2262 if (NEED_SYNC_ARG(i)) {
2263 tcg_reg_sync(s, reg);
2264 }
2265 if (IS_DEAD_ARG(i)) {
2266 temp_dead(s, args[i]);
2267 }
2268 }
2269 }
2270 }
2271
2272 #ifdef CONFIG_PROFILER
2273
2274 static int64_t tcg_table_op_count[NB_OPS];
2275
2276 void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf)
2277 {
2278 int i;
2279
2280 for (i = 0; i < NB_OPS; i++) {
2281 cpu_fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name,
2282 tcg_table_op_count[i]);
2283 }
2284 }
2285 #else
2286 void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf)
2287 {
2288 cpu_fprintf(f, "[TCG profiler not compiled]\n");
2289 }
2290 #endif
2291
2292
2293 static inline int tcg_gen_code_common(TCGContext *s,
2294 tcg_insn_unit *gen_code_buf,
2295 long search_pc)
2296 {
2297 int oi, oi_next;
2298
2299 #ifdef DEBUG_DISAS
2300 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) {
2301 qemu_log("OP:\n");
2302 tcg_dump_ops(s);
2303 qemu_log("\n");
2304 }
2305 #endif
2306
2307 #ifdef CONFIG_PROFILER
2308 s->opt_time -= profile_getclock();
2309 #endif
2310
2311 #ifdef USE_TCG_OPTIMIZATIONS
2312 tcg_optimize(s);
2313 #endif
2314
2315 #ifdef CONFIG_PROFILER
2316 s->opt_time += profile_getclock();
2317 s->la_time -= profile_getclock();
2318 #endif
2319
2320 tcg_liveness_analysis(s);
2321
2322 #ifdef CONFIG_PROFILER
2323 s->la_time += profile_getclock();
2324 #endif
2325
2326 #ifdef DEBUG_DISAS
2327 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) {
2328 qemu_log("OP after optimization and liveness analysis:\n");
2329 tcg_dump_ops(s);
2330 qemu_log("\n");
2331 }
2332 #endif
2333
2334 tcg_reg_alloc_start(s);
2335
2336 s->code_buf = gen_code_buf;
2337 s->code_ptr = gen_code_buf;
2338
2339 tcg_out_tb_init(s);
2340
2341 for (oi = s->gen_first_op_idx; oi >= 0; oi = oi_next) {
2342 TCGOp * const op = &s->gen_op_buf[oi];
2343 TCGArg * const args = &s->gen_opparam_buf[op->args];
2344 TCGOpcode opc = op->opc;
2345 const TCGOpDef *def = &tcg_op_defs[opc];
2346 uint16_t dead_args = s->op_dead_args[oi];
2347 uint8_t sync_args = s->op_sync_args[oi];
2348
2349 oi_next = op->next;
2350 #ifdef CONFIG_PROFILER
2351 tcg_table_op_count[opc]++;
2352 #endif
2353
2354 switch (opc) {
2355 case INDEX_op_mov_i32:
2356 case INDEX_op_mov_i64:
2357 tcg_reg_alloc_mov(s, def, args, dead_args, sync_args);
2358 break;
2359 case INDEX_op_movi_i32:
2360 case INDEX_op_movi_i64:
2361 tcg_reg_alloc_movi(s, args, dead_args, sync_args);
2362 break;
2363 case INDEX_op_insn_start:
2364 break;
2365 case INDEX_op_discard:
2366 temp_dead(s, args[0]);
2367 break;
2368 case INDEX_op_set_label:
2369 tcg_reg_alloc_bb_end(s, s->reserved_regs);
2370 tcg_out_label(s, arg_label(args[0]), s->code_ptr);
2371 break;
2372 case INDEX_op_call:
2373 tcg_reg_alloc_call(s, op->callo, op->calli, args,
2374 dead_args, sync_args);
2375 break;
2376 default:
2377 /* Sanity check that we've not introduced any unhandled opcodes. */
2378 if (def->flags & TCG_OPF_NOT_PRESENT) {
2379 tcg_abort();
2380 }
2381 /* Note: in order to speed up the code, it would be much
2382 faster to have specialized register allocator functions for
2383 some common argument patterns */
2384 tcg_reg_alloc_op(s, def, opc, args, dead_args, sync_args);
2385 break;
2386 }
2387 if (search_pc >= 0 && search_pc < tcg_current_code_size(s)) {
2388 return oi;
2389 }
2390 #ifndef NDEBUG
2391 check_regs(s);
2392 #endif
2393 }
2394
2395 /* Generate TB finalization at the end of block */
2396 tcg_out_tb_finalize(s);
2397 return -1;
2398 }
2399
2400 int tcg_gen_code(TCGContext *s, tcg_insn_unit *gen_code_buf)
2401 {
2402 #ifdef CONFIG_PROFILER
2403 {
2404 int n;
2405
2406 n = s->gen_last_op_idx + 1;
2407 s->op_count += n;
2408 if (n > s->op_count_max) {
2409 s->op_count_max = n;
2410 }
2411
2412 n = s->nb_temps;
2413 s->temp_count += n;
2414 if (n > s->temp_count_max) {
2415 s->temp_count_max = n;
2416 }
2417 }
2418 #endif
2419
2420 tcg_gen_code_common(s, gen_code_buf, -1);
2421
2422 /* flush instruction cache */
2423 flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr);
2424
2425 return tcg_current_code_size(s);
2426 }
2427
2428 /* Return the index of the micro operation such as the pc after is <
2429 offset bytes from the start of the TB. The contents of gen_code_buf must
2430 not be changed, though writing the same values is ok.
2431 Return -1 if not found. */
2432 int tcg_gen_code_search_pc(TCGContext *s, tcg_insn_unit *gen_code_buf,
2433 long offset)
2434 {
2435 return tcg_gen_code_common(s, gen_code_buf, offset);
2436 }
2437
2438 #ifdef CONFIG_PROFILER
2439 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf)
2440 {
2441 TCGContext *s = &tcg_ctx;
2442 int64_t tot;
2443
2444 tot = s->interm_time + s->code_time;
2445 cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n",
2446 tot, tot / 2.4e9);
2447 cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n",
2448 s->tb_count,
2449 s->tb_count1 - s->tb_count,
2450 s->tb_count1 ? (double)(s->tb_count1 - s->tb_count) / s->tb_count1 * 100.0 : 0);
2451 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n",
2452 s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max);
2453 cpu_fprintf(f, "deleted ops/TB %0.2f\n",
2454 s->tb_count ?
2455 (double)s->del_op_count / s->tb_count : 0);
2456 cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n",
2457 s->tb_count ?
2458 (double)s->temp_count / s->tb_count : 0,
2459 s->temp_count_max);
2460
2461 cpu_fprintf(f, "cycles/op %0.1f\n",
2462 s->op_count ? (double)tot / s->op_count : 0);
2463 cpu_fprintf(f, "cycles/in byte %0.1f\n",
2464 s->code_in_len ? (double)tot / s->code_in_len : 0);
2465 cpu_fprintf(f, "cycles/out byte %0.1f\n",
2466 s->code_out_len ? (double)tot / s->code_out_len : 0);
2467 if (tot == 0)
2468 tot = 1;
2469 cpu_fprintf(f, " gen_interm time %0.1f%%\n",
2470 (double)s->interm_time / tot * 100.0);
2471 cpu_fprintf(f, " gen_code time %0.1f%%\n",
2472 (double)s->code_time / tot * 100.0);
2473 cpu_fprintf(f, "optim./code time %0.1f%%\n",
2474 (double)s->opt_time / (s->code_time ? s->code_time : 1)
2475 * 100.0);
2476 cpu_fprintf(f, "liveness/code time %0.1f%%\n",
2477 (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0);
2478 cpu_fprintf(f, "cpu_restore count %" PRId64 "\n",
2479 s->restore_count);
2480 cpu_fprintf(f, " avg cycles %0.1f\n",
2481 s->restore_count ? (double)s->restore_time / s->restore_count : 0);
2482 }
2483 #else
2484 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf)
2485 {
2486 cpu_fprintf(f, "[TCG profiler not compiled]\n");
2487 }
2488 #endif
2489
2490 #ifdef ELF_HOST_MACHINE
2491 /* In order to use this feature, the backend needs to do three things:
2492
2493 (1) Define ELF_HOST_MACHINE to indicate both what value to
2494 put into the ELF image and to indicate support for the feature.
2495
2496 (2) Define tcg_register_jit. This should create a buffer containing
2497 the contents of a .debug_frame section that describes the post-
2498 prologue unwind info for the tcg machine.
2499
2500 (3) Call tcg_register_jit_int, with the constructed .debug_frame.
2501 */
2502
2503 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */
2504 typedef enum {
2505 JIT_NOACTION = 0,
2506 JIT_REGISTER_FN,
2507 JIT_UNREGISTER_FN
2508 } jit_actions_t;
2509
2510 struct jit_code_entry {
2511 struct jit_code_entry *next_entry;
2512 struct jit_code_entry *prev_entry;
2513 const void *symfile_addr;
2514 uint64_t symfile_size;
2515 };
2516
2517 struct jit_descriptor {
2518 uint32_t version;
2519 uint32_t action_flag;
2520 struct jit_code_entry *relevant_entry;
2521 struct jit_code_entry *first_entry;
2522 };
2523
2524 void __jit_debug_register_code(void) __attribute__((noinline));
2525 void __jit_debug_register_code(void)
2526 {
2527 asm("");
2528 }
2529
2530 /* Must statically initialize the version, because GDB may check
2531 the version before we can set it. */
2532 struct jit_descriptor __jit_debug_descriptor = { 1, 0, 0, 0 };
2533
2534 /* End GDB interface. */
2535
2536 static int find_string(const char *strtab, const char *str)
2537 {
2538 const char *p = strtab + 1;
2539
2540 while (1) {
2541 if (strcmp(p, str) == 0) {
2542 return p - strtab;
2543 }
2544 p += strlen(p) + 1;
2545 }
2546 }
2547
2548 static void tcg_register_jit_int(void *buf_ptr, size_t buf_size,
2549 const void *debug_frame,
2550 size_t debug_frame_size)
2551 {
2552 struct __attribute__((packed)) DebugInfo {
2553 uint32_t len;
2554 uint16_t version;
2555 uint32_t abbrev;
2556 uint8_t ptr_size;
2557 uint8_t cu_die;
2558 uint16_t cu_lang;
2559 uintptr_t cu_low_pc;
2560 uintptr_t cu_high_pc;
2561 uint8_t fn_die;
2562 char fn_name[16];
2563 uintptr_t fn_low_pc;
2564 uintptr_t fn_high_pc;
2565 uint8_t cu_eoc;
2566 };
2567
2568 struct ElfImage {
2569 ElfW(Ehdr) ehdr;
2570 ElfW(Phdr) phdr;
2571 ElfW(Shdr) shdr[7];
2572 ElfW(Sym) sym[2];
2573 struct DebugInfo di;
2574 uint8_t da[24];
2575 char str[80];
2576 };
2577
2578 struct ElfImage *img;
2579
2580 static const struct ElfImage img_template = {
2581 .ehdr = {
2582 .e_ident[EI_MAG0] = ELFMAG0,
2583 .e_ident[EI_MAG1] = ELFMAG1,
2584 .e_ident[EI_MAG2] = ELFMAG2,
2585 .e_ident[EI_MAG3] = ELFMAG3,
2586 .e_ident[EI_CLASS] = ELF_CLASS,
2587 .e_ident[EI_DATA] = ELF_DATA,
2588 .e_ident[EI_VERSION] = EV_CURRENT,
2589 .e_type = ET_EXEC,
2590 .e_machine = ELF_HOST_MACHINE,
2591 .e_version = EV_CURRENT,
2592 .e_phoff = offsetof(struct ElfImage, phdr),
2593 .e_shoff = offsetof(struct ElfImage, shdr),
2594 .e_ehsize = sizeof(ElfW(Shdr)),
2595 .e_phentsize = sizeof(ElfW(Phdr)),
2596 .e_phnum = 1,
2597 .e_shentsize = sizeof(ElfW(Shdr)),
2598 .e_shnum = ARRAY_SIZE(img->shdr),
2599 .e_shstrndx = ARRAY_SIZE(img->shdr) - 1,
2600 #ifdef ELF_HOST_FLAGS
2601 .e_flags = ELF_HOST_FLAGS,
2602 #endif
2603 #ifdef ELF_OSABI
2604 .e_ident[EI_OSABI] = ELF_OSABI,
2605 #endif
2606 },
2607 .phdr = {
2608 .p_type = PT_LOAD,
2609 .p_flags = PF_X,
2610 },
2611 .shdr = {
2612 [0] = { .sh_type = SHT_NULL },
2613 /* Trick: The contents of code_gen_buffer are not present in
2614 this fake ELF file; that got allocated elsewhere. Therefore
2615 we mark .text as SHT_NOBITS (similar to .bss) so that readers
2616 will not look for contents. We can record any address. */
2617 [1] = { /* .text */
2618 .sh_type = SHT_NOBITS,
2619 .sh_flags = SHF_EXECINSTR | SHF_ALLOC,
2620 },
2621 [2] = { /* .debug_info */
2622 .sh_type = SHT_PROGBITS,
2623 .sh_offset = offsetof(struct ElfImage, di),
2624 .sh_size = sizeof(struct DebugInfo),
2625 },
2626 [3] = { /* .debug_abbrev */
2627 .sh_type = SHT_PROGBITS,
2628 .sh_offset = offsetof(struct ElfImage, da),
2629 .sh_size = sizeof(img->da),
2630 },
2631 [4] = { /* .debug_frame */
2632 .sh_type = SHT_PROGBITS,
2633 .sh_offset = sizeof(struct ElfImage),
2634 },
2635 [5] = { /* .symtab */
2636 .sh_type = SHT_SYMTAB,
2637 .sh_offset = offsetof(struct ElfImage, sym),
2638 .sh_size = sizeof(img->sym),
2639 .sh_info = 1,
2640 .sh_link = ARRAY_SIZE(img->shdr) - 1,
2641 .sh_entsize = sizeof(ElfW(Sym)),
2642 },
2643 [6] = { /* .strtab */
2644 .sh_type = SHT_STRTAB,
2645 .sh_offset = offsetof(struct ElfImage, str),
2646 .sh_size = sizeof(img->str),
2647 }
2648 },
2649 .sym = {
2650 [1] = { /* code_gen_buffer */
2651 .st_info = ELF_ST_INFO(STB_GLOBAL, STT_FUNC),
2652 .st_shndx = 1,
2653 }
2654 },
2655 .di = {
2656 .len = sizeof(struct DebugInfo) - 4,
2657 .version = 2,
2658 .ptr_size = sizeof(void *),
2659 .cu_die = 1,
2660 .cu_lang = 0x8001, /* DW_LANG_Mips_Assembler */
2661 .fn_die = 2,
2662 .fn_name = "code_gen_buffer"
2663 },
2664 .da = {
2665 1, /* abbrev number (the cu) */
2666 0x11, 1, /* DW_TAG_compile_unit, has children */
2667 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */
2668 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2669 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2670 0, 0, /* end of abbrev */
2671 2, /* abbrev number (the fn) */
2672 0x2e, 0, /* DW_TAG_subprogram, no children */
2673 0x3, 0x8, /* DW_AT_name, DW_FORM_string */
2674 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2675 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2676 0, 0, /* end of abbrev */
2677 0 /* no more abbrev */
2678 },
2679 .str = "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0"
2680 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer",
2681 };
2682
2683 /* We only need a single jit entry; statically allocate it. */
2684 static struct jit_code_entry one_entry;
2685
2686 uintptr_t buf = (uintptr_t)buf_ptr;
2687 size_t img_size = sizeof(struct ElfImage) + debug_frame_size;
2688 DebugFrameHeader *dfh;
2689
2690 img = g_malloc(img_size);
2691 *img = img_template;
2692
2693 img->phdr.p_vaddr = buf;
2694 img->phdr.p_paddr = buf;
2695 img->phdr.p_memsz = buf_size;
2696
2697 img->shdr[1].sh_name = find_string(img->str, ".text");
2698 img->shdr[1].sh_addr = buf;
2699 img->shdr[1].sh_size = buf_size;
2700
2701 img->shdr[2].sh_name = find_string(img->str, ".debug_info");
2702 img->shdr[3].sh_name = find_string(img->str, ".debug_abbrev");
2703
2704 img->shdr[4].sh_name = find_string(img->str, ".debug_frame");
2705 img->shdr[4].sh_size = debug_frame_size;
2706
2707 img->shdr[5].sh_name = find_string(img->str, ".symtab");
2708 img->shdr[6].sh_name = find_string(img->str, ".strtab");
2709
2710 img->sym[1].st_name = find_string(img->str, "code_gen_buffer");
2711 img->sym[1].st_value = buf;
2712 img->sym[1].st_size = buf_size;
2713
2714 img->di.cu_low_pc = buf;
2715 img->di.cu_high_pc = buf + buf_size;
2716 img->di.fn_low_pc = buf;
2717 img->di.fn_high_pc = buf + buf_size;
2718
2719 dfh = (DebugFrameHeader *)(img + 1);
2720 memcpy(dfh, debug_frame, debug_frame_size);
2721 dfh->fde.func_start = buf;
2722 dfh->fde.func_len = buf_size;
2723
2724 #ifdef DEBUG_JIT
2725 /* Enable this block to be able to debug the ELF image file creation.
2726 One can use readelf, objdump, or other inspection utilities. */
2727 {
2728 FILE *f = fopen("/tmp/qemu.jit", "w+b");
2729 if (f) {
2730 if (fwrite(img, img_size, 1, f) != img_size) {
2731 /* Avoid stupid unused return value warning for fwrite. */
2732 }
2733 fclose(f);
2734 }
2735 }
2736 #endif
2737
2738 one_entry.symfile_addr = img;
2739 one_entry.symfile_size = img_size;
2740
2741 __jit_debug_descriptor.action_flag = JIT_REGISTER_FN;
2742 __jit_debug_descriptor.relevant_entry = &one_entry;
2743 __jit_debug_descriptor.first_entry = &one_entry;
2744 __jit_debug_register_code();
2745 }
2746 #else
2747 /* No support for the feature. Provide the entry point expected by exec.c,
2748 and implement the internal function we declared earlier. */
2749
2750 static void tcg_register_jit_int(void *buf, size_t size,
2751 const void *debug_frame,
2752 size_t debug_frame_size)
2753 {
2754 }
2755
2756 void tcg_register_jit(void *buf, size_t buf_size)
2757 {
2758 }
2759 #endif /* ELF_HOST_MACHINE */