2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 /* define it to use liveness analysis (better code) */
26 #define USE_LIVENESS_ANALYSIS
27 #define USE_TCG_OPTIMIZATIONS
31 /* Define to jump the ELF file used to communicate with GDB. */
34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
35 /* define it to suppress various consistency checks (faster) */
39 #include "qemu-common.h"
40 #include "qemu/host-utils.h"
41 #include "qemu/timer.h"
43 /* Note: the long term plan is to reduce the dependencies on the QEMU
44 CPU definitions. Currently they are used for qemu_ld/st
46 #define NO_CPU_IO_DEFS
51 #if UINTPTR_MAX == UINT32_MAX
52 # define ELF_CLASS ELFCLASS32
54 # define ELF_CLASS ELFCLASS64
56 #ifdef HOST_WORDS_BIGENDIAN
57 # define ELF_DATA ELFDATA2MSB
59 # define ELF_DATA ELFDATA2LSB
64 /* Forward declarations for functions declared in tcg-target.c and used here. */
65 static void tcg_target_init(TCGContext
*s
);
66 static void tcg_target_qemu_prologue(TCGContext
*s
);
67 static void patch_reloc(tcg_insn_unit
*code_ptr
, int type
,
68 intptr_t value
, intptr_t addend
);
70 /* The CIE and FDE header definitions will be common to all hosts. */
72 uint32_t len
__attribute__((aligned((sizeof(void *)))));
78 uint8_t return_column
;
81 typedef struct QEMU_PACKED
{
82 uint32_t len
__attribute__((aligned((sizeof(void *)))));
86 } DebugFrameFDEHeader
;
88 typedef struct QEMU_PACKED
{
90 DebugFrameFDEHeader fde
;
93 static void tcg_register_jit_int(void *buf
, size_t size
,
94 const void *debug_frame
,
95 size_t debug_frame_size
)
96 __attribute__((unused
));
98 /* Forward declarations for functions declared and used in tcg-target.c. */
99 static int target_parse_constraint(TCGArgConstraint
*ct
, const char **pct_str
);
100 static void tcg_out_ld(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg1
,
102 static void tcg_out_mov(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg
);
103 static void tcg_out_movi(TCGContext
*s
, TCGType type
,
104 TCGReg ret
, tcg_target_long arg
);
105 static void tcg_out_op(TCGContext
*s
, TCGOpcode opc
, const TCGArg
*args
,
106 const int *const_args
);
107 static void tcg_out_st(TCGContext
*s
, TCGType type
, TCGReg arg
, TCGReg arg1
,
109 static void tcg_out_call(TCGContext
*s
, tcg_insn_unit
*target
);
110 static int tcg_target_const_match(tcg_target_long val
, TCGType type
,
111 const TCGArgConstraint
*arg_ct
);
112 static void tcg_out_tb_init(TCGContext
*s
);
113 static void tcg_out_tb_finalize(TCGContext
*s
);
117 static TCGRegSet tcg_target_available_regs
[2];
118 static TCGRegSet tcg_target_call_clobber_regs
;
120 #if TCG_TARGET_INSN_UNIT_SIZE == 1
121 static __attribute__((unused
)) inline void tcg_out8(TCGContext
*s
, uint8_t v
)
126 static __attribute__((unused
)) inline void tcg_patch8(tcg_insn_unit
*p
,
133 #if TCG_TARGET_INSN_UNIT_SIZE <= 2
134 static __attribute__((unused
)) inline void tcg_out16(TCGContext
*s
, uint16_t v
)
136 if (TCG_TARGET_INSN_UNIT_SIZE
== 2) {
139 tcg_insn_unit
*p
= s
->code_ptr
;
140 memcpy(p
, &v
, sizeof(v
));
141 s
->code_ptr
= p
+ (2 / TCG_TARGET_INSN_UNIT_SIZE
);
145 static __attribute__((unused
)) inline void tcg_patch16(tcg_insn_unit
*p
,
148 if (TCG_TARGET_INSN_UNIT_SIZE
== 2) {
151 memcpy(p
, &v
, sizeof(v
));
156 #if TCG_TARGET_INSN_UNIT_SIZE <= 4
157 static __attribute__((unused
)) inline void tcg_out32(TCGContext
*s
, uint32_t v
)
159 if (TCG_TARGET_INSN_UNIT_SIZE
== 4) {
162 tcg_insn_unit
*p
= s
->code_ptr
;
163 memcpy(p
, &v
, sizeof(v
));
164 s
->code_ptr
= p
+ (4 / TCG_TARGET_INSN_UNIT_SIZE
);
168 static __attribute__((unused
)) inline void tcg_patch32(tcg_insn_unit
*p
,
171 if (TCG_TARGET_INSN_UNIT_SIZE
== 4) {
174 memcpy(p
, &v
, sizeof(v
));
179 #if TCG_TARGET_INSN_UNIT_SIZE <= 8
180 static __attribute__((unused
)) inline void tcg_out64(TCGContext
*s
, uint64_t v
)
182 if (TCG_TARGET_INSN_UNIT_SIZE
== 8) {
185 tcg_insn_unit
*p
= s
->code_ptr
;
186 memcpy(p
, &v
, sizeof(v
));
187 s
->code_ptr
= p
+ (8 / TCG_TARGET_INSN_UNIT_SIZE
);
191 static __attribute__((unused
)) inline void tcg_patch64(tcg_insn_unit
*p
,
194 if (TCG_TARGET_INSN_UNIT_SIZE
== 8) {
197 memcpy(p
, &v
, sizeof(v
));
202 /* label relocation processing */
204 static void tcg_out_reloc(TCGContext
*s
, tcg_insn_unit
*code_ptr
, int type
,
205 TCGLabel
*l
, intptr_t addend
)
210 /* FIXME: This may break relocations on RISC targets that
211 modify instruction fields in place. The caller may not have
212 written the initial value. */
213 patch_reloc(code_ptr
, type
, l
->u
.value
, addend
);
215 /* add a new relocation entry */
216 r
= tcg_malloc(sizeof(TCGRelocation
));
220 r
->next
= l
->u
.first_reloc
;
221 l
->u
.first_reloc
= r
;
225 static void tcg_out_label(TCGContext
*s
, TCGLabel
*l
, tcg_insn_unit
*ptr
)
227 intptr_t value
= (intptr_t)ptr
;
230 assert(!l
->has_value
);
232 for (r
= l
->u
.first_reloc
; r
!= NULL
; r
= r
->next
) {
233 patch_reloc(r
->ptr
, r
->type
, value
, r
->addend
);
237 l
->u
.value_ptr
= ptr
;
240 TCGLabel
*gen_new_label(void)
242 TCGContext
*s
= &tcg_ctx
;
243 TCGLabel
*l
= tcg_malloc(sizeof(TCGLabel
));
252 #include "tcg-target.c"
254 /* pool based memory allocation */
255 void *tcg_malloc_internal(TCGContext
*s
, int size
)
260 if (size
> TCG_POOL_CHUNK_SIZE
) {
261 /* big malloc: insert a new pool (XXX: could optimize) */
262 p
= g_malloc(sizeof(TCGPool
) + size
);
264 p
->next
= s
->pool_first_large
;
265 s
->pool_first_large
= p
;
276 pool_size
= TCG_POOL_CHUNK_SIZE
;
277 p
= g_malloc(sizeof(TCGPool
) + pool_size
);
281 s
->pool_current
->next
= p
;
290 s
->pool_cur
= p
->data
+ size
;
291 s
->pool_end
= p
->data
+ p
->size
;
295 void tcg_pool_reset(TCGContext
*s
)
298 for (p
= s
->pool_first_large
; p
; p
= t
) {
302 s
->pool_first_large
= NULL
;
303 s
->pool_cur
= s
->pool_end
= NULL
;
304 s
->pool_current
= NULL
;
307 typedef struct TCGHelperInfo
{
314 #include "exec/helper-proto.h"
316 static const TCGHelperInfo all_helpers
[] = {
317 #include "exec/helper-tcg.h"
320 void tcg_context_init(TCGContext
*s
)
322 int op
, total_args
, n
, i
;
324 TCGArgConstraint
*args_ct
;
326 GHashTable
*helper_table
;
328 memset(s
, 0, sizeof(*s
));
331 /* Count total number of arguments and allocate the corresponding
334 for(op
= 0; op
< NB_OPS
; op
++) {
335 def
= &tcg_op_defs
[op
];
336 n
= def
->nb_iargs
+ def
->nb_oargs
;
340 args_ct
= g_malloc(sizeof(TCGArgConstraint
) * total_args
);
341 sorted_args
= g_malloc(sizeof(int) * total_args
);
343 for(op
= 0; op
< NB_OPS
; op
++) {
344 def
= &tcg_op_defs
[op
];
345 def
->args_ct
= args_ct
;
346 def
->sorted_args
= sorted_args
;
347 n
= def
->nb_iargs
+ def
->nb_oargs
;
352 /* Register helpers. */
353 /* Use g_direct_hash/equal for direct pointer comparisons on func. */
354 s
->helpers
= helper_table
= g_hash_table_new(NULL
, NULL
);
356 for (i
= 0; i
< ARRAY_SIZE(all_helpers
); ++i
) {
357 g_hash_table_insert(helper_table
, (gpointer
)all_helpers
[i
].func
,
358 (gpointer
)&all_helpers
[i
]);
364 void tcg_prologue_init(TCGContext
*s
)
366 /* init global prologue and epilogue */
367 s
->code_buf
= s
->code_gen_prologue
;
368 s
->code_ptr
= s
->code_buf
;
369 tcg_target_qemu_prologue(s
);
370 flush_icache_range((uintptr_t)s
->code_buf
, (uintptr_t)s
->code_ptr
);
373 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM
)) {
374 size_t size
= tcg_current_code_size(s
);
375 qemu_log("PROLOGUE: [size=%zu]\n", size
);
376 log_disas(s
->code_buf
, size
);
383 void tcg_set_frame(TCGContext
*s
, int reg
, intptr_t start
, intptr_t size
)
385 s
->frame_start
= start
;
386 s
->frame_end
= start
+ size
;
390 void tcg_func_start(TCGContext
*s
)
393 s
->nb_temps
= s
->nb_globals
;
395 /* No temps have been previously allocated for size or locality. */
396 memset(s
->free_temps
, 0, sizeof(s
->free_temps
));
399 s
->current_frame_offset
= s
->frame_start
;
401 #ifdef CONFIG_DEBUG_TCG
402 s
->goto_tb_issue_mask
= 0;
405 s
->gen_first_op_idx
= 0;
406 s
->gen_last_op_idx
= -1;
407 s
->gen_next_op_idx
= 0;
408 s
->gen_next_parm_idx
= 0;
410 s
->be
= tcg_malloc(sizeof(TCGBackendData
));
413 static inline void tcg_temp_alloc(TCGContext
*s
, int n
)
415 if (n
> TCG_MAX_TEMPS
)
419 static inline int tcg_global_reg_new_internal(TCGType type
, int reg
,
422 TCGContext
*s
= &tcg_ctx
;
426 #if TCG_TARGET_REG_BITS == 32
427 if (type
!= TCG_TYPE_I32
)
430 if (tcg_regset_test_reg(s
->reserved_regs
, reg
))
433 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
434 ts
= &s
->temps
[s
->nb_globals
];
435 ts
->base_type
= type
;
441 tcg_regset_set_reg(s
->reserved_regs
, reg
);
445 TCGv_i32
tcg_global_reg_new_i32(int reg
, const char *name
)
449 idx
= tcg_global_reg_new_internal(TCG_TYPE_I32
, reg
, name
);
450 return MAKE_TCGV_I32(idx
);
453 TCGv_i64
tcg_global_reg_new_i64(int reg
, const char *name
)
457 idx
= tcg_global_reg_new_internal(TCG_TYPE_I64
, reg
, name
);
458 return MAKE_TCGV_I64(idx
);
461 static inline int tcg_global_mem_new_internal(TCGType type
, int reg
,
465 TCGContext
*s
= &tcg_ctx
;
470 #if TCG_TARGET_REG_BITS == 32
471 if (type
== TCG_TYPE_I64
) {
473 tcg_temp_alloc(s
, s
->nb_globals
+ 2);
474 ts
= &s
->temps
[s
->nb_globals
];
475 ts
->base_type
= type
;
476 ts
->type
= TCG_TYPE_I32
;
478 ts
->mem_allocated
= 1;
480 #ifdef HOST_WORDS_BIGENDIAN
481 ts
->mem_offset
= offset
+ 4;
483 ts
->mem_offset
= offset
;
485 pstrcpy(buf
, sizeof(buf
), name
);
486 pstrcat(buf
, sizeof(buf
), "_0");
487 ts
->name
= strdup(buf
);
490 ts
->base_type
= type
;
491 ts
->type
= TCG_TYPE_I32
;
493 ts
->mem_allocated
= 1;
495 #ifdef HOST_WORDS_BIGENDIAN
496 ts
->mem_offset
= offset
;
498 ts
->mem_offset
= offset
+ 4;
500 pstrcpy(buf
, sizeof(buf
), name
);
501 pstrcat(buf
, sizeof(buf
), "_1");
502 ts
->name
= strdup(buf
);
508 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
509 ts
= &s
->temps
[s
->nb_globals
];
510 ts
->base_type
= type
;
513 ts
->mem_allocated
= 1;
515 ts
->mem_offset
= offset
;
522 TCGv_i32
tcg_global_mem_new_i32(int reg
, intptr_t offset
, const char *name
)
524 int idx
= tcg_global_mem_new_internal(TCG_TYPE_I32
, reg
, offset
, name
);
525 return MAKE_TCGV_I32(idx
);
528 TCGv_i64
tcg_global_mem_new_i64(int reg
, intptr_t offset
, const char *name
)
530 int idx
= tcg_global_mem_new_internal(TCG_TYPE_I64
, reg
, offset
, name
);
531 return MAKE_TCGV_I64(idx
);
534 static inline int tcg_temp_new_internal(TCGType type
, int temp_local
)
536 TCGContext
*s
= &tcg_ctx
;
540 k
= type
+ (temp_local
? TCG_TYPE_COUNT
: 0);
541 idx
= find_first_bit(s
->free_temps
[k
].l
, TCG_MAX_TEMPS
);
542 if (idx
< TCG_MAX_TEMPS
) {
543 /* There is already an available temp with the right type. */
544 clear_bit(idx
, s
->free_temps
[k
].l
);
547 ts
->temp_allocated
= 1;
548 assert(ts
->base_type
== type
);
549 assert(ts
->temp_local
== temp_local
);
552 #if TCG_TARGET_REG_BITS == 32
553 if (type
== TCG_TYPE_I64
) {
554 tcg_temp_alloc(s
, s
->nb_temps
+ 2);
555 ts
= &s
->temps
[s
->nb_temps
];
556 ts
->base_type
= type
;
557 ts
->type
= TCG_TYPE_I32
;
558 ts
->temp_allocated
= 1;
559 ts
->temp_local
= temp_local
;
562 ts
->base_type
= type
;
563 ts
->type
= TCG_TYPE_I32
;
564 ts
->temp_allocated
= 1;
565 ts
->temp_local
= temp_local
;
571 tcg_temp_alloc(s
, s
->nb_temps
+ 1);
572 ts
= &s
->temps
[s
->nb_temps
];
573 ts
->base_type
= type
;
575 ts
->temp_allocated
= 1;
576 ts
->temp_local
= temp_local
;
582 #if defined(CONFIG_DEBUG_TCG)
588 TCGv_i32
tcg_temp_new_internal_i32(int temp_local
)
592 idx
= tcg_temp_new_internal(TCG_TYPE_I32
, temp_local
);
593 return MAKE_TCGV_I32(idx
);
596 TCGv_i64
tcg_temp_new_internal_i64(int temp_local
)
600 idx
= tcg_temp_new_internal(TCG_TYPE_I64
, temp_local
);
601 return MAKE_TCGV_I64(idx
);
604 static void tcg_temp_free_internal(int idx
)
606 TCGContext
*s
= &tcg_ctx
;
610 #if defined(CONFIG_DEBUG_TCG)
612 if (s
->temps_in_use
< 0) {
613 fprintf(stderr
, "More temporaries freed than allocated!\n");
617 assert(idx
>= s
->nb_globals
&& idx
< s
->nb_temps
);
619 assert(ts
->temp_allocated
!= 0);
620 ts
->temp_allocated
= 0;
622 k
= ts
->base_type
+ (ts
->temp_local
? TCG_TYPE_COUNT
: 0);
623 set_bit(idx
, s
->free_temps
[k
].l
);
626 void tcg_temp_free_i32(TCGv_i32 arg
)
628 tcg_temp_free_internal(GET_TCGV_I32(arg
));
631 void tcg_temp_free_i64(TCGv_i64 arg
)
633 tcg_temp_free_internal(GET_TCGV_I64(arg
));
636 TCGv_i32
tcg_const_i32(int32_t val
)
639 t0
= tcg_temp_new_i32();
640 tcg_gen_movi_i32(t0
, val
);
644 TCGv_i64
tcg_const_i64(int64_t val
)
647 t0
= tcg_temp_new_i64();
648 tcg_gen_movi_i64(t0
, val
);
652 TCGv_i32
tcg_const_local_i32(int32_t val
)
655 t0
= tcg_temp_local_new_i32();
656 tcg_gen_movi_i32(t0
, val
);
660 TCGv_i64
tcg_const_local_i64(int64_t val
)
663 t0
= tcg_temp_local_new_i64();
664 tcg_gen_movi_i64(t0
, val
);
668 #if defined(CONFIG_DEBUG_TCG)
669 void tcg_clear_temp_count(void)
671 TCGContext
*s
= &tcg_ctx
;
675 int tcg_check_temp_count(void)
677 TCGContext
*s
= &tcg_ctx
;
678 if (s
->temps_in_use
) {
679 /* Clear the count so that we don't give another
680 * warning immediately next time around.
689 /* Note: we convert the 64 bit args to 32 bit and do some alignment
690 and endian swap. Maybe it would be better to do the alignment
691 and endian swap in tcg_reg_alloc_call(). */
692 void tcg_gen_callN(TCGContext
*s
, void *func
, TCGArg ret
,
693 int nargs
, TCGArg
*args
)
695 int i
, real_args
, nb_rets
, pi
, pi_first
;
696 unsigned sizemask
, flags
;
699 info
= g_hash_table_lookup(s
->helpers
, (gpointer
)func
);
701 sizemask
= info
->sizemask
;
703 #if defined(__sparc__) && !defined(__arch64__) \
704 && !defined(CONFIG_TCG_INTERPRETER)
705 /* We have 64-bit values in one register, but need to pass as two
706 separate parameters. Split them. */
707 int orig_sizemask
= sizemask
;
708 int orig_nargs
= nargs
;
711 TCGV_UNUSED_I64(retl
);
712 TCGV_UNUSED_I64(reth
);
714 TCGArg
*split_args
= __builtin_alloca(sizeof(TCGArg
) * nargs
* 2);
715 for (i
= real_args
= 0; i
< nargs
; ++i
) {
716 int is_64bit
= sizemask
& (1 << (i
+1)*2);
718 TCGv_i64 orig
= MAKE_TCGV_I64(args
[i
]);
719 TCGv_i32 h
= tcg_temp_new_i32();
720 TCGv_i32 l
= tcg_temp_new_i32();
721 tcg_gen_extr_i64_i32(l
, h
, orig
);
722 split_args
[real_args
++] = GET_TCGV_I32(h
);
723 split_args
[real_args
++] = GET_TCGV_I32(l
);
725 split_args
[real_args
++] = args
[i
];
732 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
733 for (i
= 0; i
< nargs
; ++i
) {
734 int is_64bit
= sizemask
& (1 << (i
+1)*2);
735 int is_signed
= sizemask
& (2 << (i
+1)*2);
737 TCGv_i64 temp
= tcg_temp_new_i64();
738 TCGv_i64 orig
= MAKE_TCGV_I64(args
[i
]);
740 tcg_gen_ext32s_i64(temp
, orig
);
742 tcg_gen_ext32u_i64(temp
, orig
);
744 args
[i
] = GET_TCGV_I64(temp
);
747 #endif /* TCG_TARGET_EXTEND_ARGS */
749 pi_first
= pi
= s
->gen_next_parm_idx
;
750 if (ret
!= TCG_CALL_DUMMY_ARG
) {
751 #if defined(__sparc__) && !defined(__arch64__) \
752 && !defined(CONFIG_TCG_INTERPRETER)
753 if (orig_sizemask
& 1) {
754 /* The 32-bit ABI is going to return the 64-bit value in
755 the %o0/%o1 register pair. Prepare for this by using
756 two return temporaries, and reassemble below. */
757 retl
= tcg_temp_new_i64();
758 reth
= tcg_temp_new_i64();
759 s
->gen_opparam_buf
[pi
++] = GET_TCGV_I64(reth
);
760 s
->gen_opparam_buf
[pi
++] = GET_TCGV_I64(retl
);
763 s
->gen_opparam_buf
[pi
++] = ret
;
767 if (TCG_TARGET_REG_BITS
< 64 && (sizemask
& 1)) {
768 #ifdef HOST_WORDS_BIGENDIAN
769 s
->gen_opparam_buf
[pi
++] = ret
+ 1;
770 s
->gen_opparam_buf
[pi
++] = ret
;
772 s
->gen_opparam_buf
[pi
++] = ret
;
773 s
->gen_opparam_buf
[pi
++] = ret
+ 1;
777 s
->gen_opparam_buf
[pi
++] = ret
;
785 for (i
= 0; i
< nargs
; i
++) {
786 int is_64bit
= sizemask
& (1 << (i
+1)*2);
787 if (TCG_TARGET_REG_BITS
< 64 && is_64bit
) {
788 #ifdef TCG_TARGET_CALL_ALIGN_ARGS
789 /* some targets want aligned 64 bit args */
791 s
->gen_opparam_buf
[pi
++] = TCG_CALL_DUMMY_ARG
;
795 /* If stack grows up, then we will be placing successive
796 arguments at lower addresses, which means we need to
797 reverse the order compared to how we would normally
798 treat either big or little-endian. For those arguments
799 that will wind up in registers, this still works for
800 HPPA (the only current STACK_GROWSUP target) since the
801 argument registers are *also* allocated in decreasing
802 order. If another such target is added, this logic may
803 have to get more complicated to differentiate between
804 stack arguments and register arguments. */
805 #if defined(HOST_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
806 s
->gen_opparam_buf
[pi
++] = args
[i
] + 1;
807 s
->gen_opparam_buf
[pi
++] = args
[i
];
809 s
->gen_opparam_buf
[pi
++] = args
[i
];
810 s
->gen_opparam_buf
[pi
++] = args
[i
] + 1;
816 s
->gen_opparam_buf
[pi
++] = args
[i
];
819 s
->gen_opparam_buf
[pi
++] = (uintptr_t)func
;
820 s
->gen_opparam_buf
[pi
++] = flags
;
822 i
= s
->gen_next_op_idx
;
823 tcg_debug_assert(i
< OPC_BUF_SIZE
);
824 tcg_debug_assert(pi
<= OPPARAM_BUF_SIZE
);
826 /* Set links for sequential allocation during translation. */
827 s
->gen_op_buf
[i
] = (TCGOp
){
828 .opc
= INDEX_op_call
,
836 /* Make sure the calli field didn't overflow. */
837 tcg_debug_assert(s
->gen_op_buf
[i
].calli
== real_args
);
839 s
->gen_last_op_idx
= i
;
840 s
->gen_next_op_idx
= i
+ 1;
841 s
->gen_next_parm_idx
= pi
;
843 #if defined(__sparc__) && !defined(__arch64__) \
844 && !defined(CONFIG_TCG_INTERPRETER)
845 /* Free all of the parts we allocated above. */
846 for (i
= real_args
= 0; i
< orig_nargs
; ++i
) {
847 int is_64bit
= orig_sizemask
& (1 << (i
+1)*2);
849 TCGv_i32 h
= MAKE_TCGV_I32(args
[real_args
++]);
850 TCGv_i32 l
= MAKE_TCGV_I32(args
[real_args
++]);
851 tcg_temp_free_i32(h
);
852 tcg_temp_free_i32(l
);
857 if (orig_sizemask
& 1) {
858 /* The 32-bit ABI returned two 32-bit pieces. Re-assemble them.
859 Note that describing these as TCGv_i64 eliminates an unnecessary
860 zero-extension that tcg_gen_concat_i32_i64 would create. */
861 tcg_gen_concat32_i64(MAKE_TCGV_I64(ret
), retl
, reth
);
862 tcg_temp_free_i64(retl
);
863 tcg_temp_free_i64(reth
);
865 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
866 for (i
= 0; i
< nargs
; ++i
) {
867 int is_64bit
= sizemask
& (1 << (i
+1)*2);
869 TCGv_i64 temp
= MAKE_TCGV_I64(args
[i
]);
870 tcg_temp_free_i64(temp
);
873 #endif /* TCG_TARGET_EXTEND_ARGS */
876 static void tcg_reg_alloc_start(TCGContext
*s
)
880 for(i
= 0; i
< s
->nb_globals
; i
++) {
883 ts
->val_type
= TEMP_VAL_REG
;
885 ts
->val_type
= TEMP_VAL_MEM
;
888 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
890 if (ts
->temp_local
) {
891 ts
->val_type
= TEMP_VAL_MEM
;
893 ts
->val_type
= TEMP_VAL_DEAD
;
895 ts
->mem_allocated
= 0;
898 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
899 s
->reg_to_temp
[i
] = -1;
903 static char *tcg_get_arg_str_idx(TCGContext
*s
, char *buf
, int buf_size
,
908 assert(idx
>= 0 && idx
< s
->nb_temps
);
910 if (idx
< s
->nb_globals
) {
911 pstrcpy(buf
, buf_size
, ts
->name
);
914 snprintf(buf
, buf_size
, "loc%d", idx
- s
->nb_globals
);
916 snprintf(buf
, buf_size
, "tmp%d", idx
- s
->nb_globals
);
921 char *tcg_get_arg_str_i32(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i32 arg
)
923 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I32(arg
));
926 char *tcg_get_arg_str_i64(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i64 arg
)
928 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I64(arg
));
931 /* Find helper name. */
932 static inline const char *tcg_find_helper(TCGContext
*s
, uintptr_t val
)
934 const char *ret
= NULL
;
936 TCGHelperInfo
*info
= g_hash_table_lookup(s
->helpers
, (gpointer
)val
);
944 static const char * const cond_name
[] =
946 [TCG_COND_NEVER
] = "never",
947 [TCG_COND_ALWAYS
] = "always",
948 [TCG_COND_EQ
] = "eq",
949 [TCG_COND_NE
] = "ne",
950 [TCG_COND_LT
] = "lt",
951 [TCG_COND_GE
] = "ge",
952 [TCG_COND_LE
] = "le",
953 [TCG_COND_GT
] = "gt",
954 [TCG_COND_LTU
] = "ltu",
955 [TCG_COND_GEU
] = "geu",
956 [TCG_COND_LEU
] = "leu",
957 [TCG_COND_GTU
] = "gtu"
960 static const char * const ldst_name
[] =
976 void tcg_dump_ops(TCGContext
*s
)
982 for (oi
= s
->gen_first_op_idx
; oi
>= 0; oi
= op
->next
) {
983 int i
, k
, nb_oargs
, nb_iargs
, nb_cargs
;
988 op
= &s
->gen_op_buf
[oi
];
990 def
= &tcg_op_defs
[c
];
991 args
= &s
->gen_opparam_buf
[op
->args
];
993 if (c
== INDEX_op_insn_start
) {
994 qemu_log("%s ----", oi
!= s
->gen_first_op_idx
? "\n" : "");
996 for (i
= 0; i
< TARGET_INSN_START_WORDS
; ++i
) {
998 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
999 a
= ((target_ulong
)args
[i
* 2 + 1] << 32) | args
[i
* 2];
1003 qemu_log(" " TARGET_FMT_lx
, a
);
1005 } else if (c
== INDEX_op_call
) {
1006 /* variable number of arguments */
1007 nb_oargs
= op
->callo
;
1008 nb_iargs
= op
->calli
;
1009 nb_cargs
= def
->nb_cargs
;
1011 /* function name, flags, out args */
1012 qemu_log(" %s %s,$0x%" TCG_PRIlx
",$%d", def
->name
,
1013 tcg_find_helper(s
, args
[nb_oargs
+ nb_iargs
]),
1014 args
[nb_oargs
+ nb_iargs
+ 1], nb_oargs
);
1015 for (i
= 0; i
< nb_oargs
; i
++) {
1016 qemu_log(",%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
1019 for (i
= 0; i
< nb_iargs
; i
++) {
1020 TCGArg arg
= args
[nb_oargs
+ i
];
1021 const char *t
= "<dummy>";
1022 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1023 t
= tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), arg
);
1028 qemu_log(" %s ", def
->name
);
1030 nb_oargs
= def
->nb_oargs
;
1031 nb_iargs
= def
->nb_iargs
;
1032 nb_cargs
= def
->nb_cargs
;
1035 for (i
= 0; i
< nb_oargs
; i
++) {
1039 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
1042 for (i
= 0; i
< nb_iargs
; i
++) {
1046 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
1050 case INDEX_op_brcond_i32
:
1051 case INDEX_op_setcond_i32
:
1052 case INDEX_op_movcond_i32
:
1053 case INDEX_op_brcond2_i32
:
1054 case INDEX_op_setcond2_i32
:
1055 case INDEX_op_brcond_i64
:
1056 case INDEX_op_setcond_i64
:
1057 case INDEX_op_movcond_i64
:
1058 if (args
[k
] < ARRAY_SIZE(cond_name
) && cond_name
[args
[k
]]) {
1059 qemu_log(",%s", cond_name
[args
[k
++]]);
1061 qemu_log(",$0x%" TCG_PRIlx
, args
[k
++]);
1065 case INDEX_op_qemu_ld_i32
:
1066 case INDEX_op_qemu_st_i32
:
1067 case INDEX_op_qemu_ld_i64
:
1068 case INDEX_op_qemu_st_i64
:
1070 TCGMemOpIdx oi
= args
[k
++];
1071 TCGMemOp op
= get_memop(oi
);
1072 unsigned ix
= get_mmuidx(oi
);
1074 if (op
& ~(MO_AMASK
| MO_BSWAP
| MO_SSIZE
)) {
1075 qemu_log(",$0x%x,%u", op
, ix
);
1077 const char *s_al
= "", *s_op
;
1078 if (op
& MO_AMASK
) {
1079 if ((op
& MO_AMASK
) == MO_ALIGN
) {
1085 s_op
= ldst_name
[op
& (MO_BSWAP
| MO_SSIZE
)];
1086 qemu_log(",%s%s,%u", s_al
, s_op
, ix
);
1096 case INDEX_op_set_label
:
1098 case INDEX_op_brcond_i32
:
1099 case INDEX_op_brcond_i64
:
1100 case INDEX_op_brcond2_i32
:
1101 qemu_log("%s$L%d", k
? "," : "", arg_label(args
[k
])->id
);
1107 for (; i
< nb_cargs
; i
++, k
++) {
1108 qemu_log("%s$0x%" TCG_PRIlx
, k
? "," : "", args
[k
]);
1115 /* we give more priority to constraints with less registers */
1116 static int get_constraint_priority(const TCGOpDef
*def
, int k
)
1118 const TCGArgConstraint
*arg_ct
;
1121 arg_ct
= &def
->args_ct
[k
];
1122 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1123 /* an alias is equivalent to a single register */
1126 if (!(arg_ct
->ct
& TCG_CT_REG
))
1129 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1130 if (tcg_regset_test_reg(arg_ct
->u
.regs
, i
))
1134 return TCG_TARGET_NB_REGS
- n
+ 1;
1137 /* sort from highest priority to lowest */
1138 static void sort_constraints(TCGOpDef
*def
, int start
, int n
)
1140 int i
, j
, p1
, p2
, tmp
;
1142 for(i
= 0; i
< n
; i
++)
1143 def
->sorted_args
[start
+ i
] = start
+ i
;
1146 for(i
= 0; i
< n
- 1; i
++) {
1147 for(j
= i
+ 1; j
< n
; j
++) {
1148 p1
= get_constraint_priority(def
, def
->sorted_args
[start
+ i
]);
1149 p2
= get_constraint_priority(def
, def
->sorted_args
[start
+ j
]);
1151 tmp
= def
->sorted_args
[start
+ i
];
1152 def
->sorted_args
[start
+ i
] = def
->sorted_args
[start
+ j
];
1153 def
->sorted_args
[start
+ j
] = tmp
;
1159 void tcg_add_target_add_op_defs(const TCGTargetOpDef
*tdefs
)
1167 if (tdefs
->op
== (TCGOpcode
)-1)
1170 assert((unsigned)op
< NB_OPS
);
1171 def
= &tcg_op_defs
[op
];
1172 #if defined(CONFIG_DEBUG_TCG)
1173 /* Duplicate entry in op definitions? */
1177 nb_args
= def
->nb_iargs
+ def
->nb_oargs
;
1178 for(i
= 0; i
< nb_args
; i
++) {
1179 ct_str
= tdefs
->args_ct_str
[i
];
1180 /* Incomplete TCGTargetOpDef entry? */
1181 assert(ct_str
!= NULL
);
1182 tcg_regset_clear(def
->args_ct
[i
].u
.regs
);
1183 def
->args_ct
[i
].ct
= 0;
1184 if (ct_str
[0] >= '0' && ct_str
[0] <= '9') {
1186 oarg
= ct_str
[0] - '0';
1187 assert(oarg
< def
->nb_oargs
);
1188 assert(def
->args_ct
[oarg
].ct
& TCG_CT_REG
);
1189 /* TCG_CT_ALIAS is for the output arguments. The input
1190 argument is tagged with TCG_CT_IALIAS. */
1191 def
->args_ct
[i
] = def
->args_ct
[oarg
];
1192 def
->args_ct
[oarg
].ct
= TCG_CT_ALIAS
;
1193 def
->args_ct
[oarg
].alias_index
= i
;
1194 def
->args_ct
[i
].ct
|= TCG_CT_IALIAS
;
1195 def
->args_ct
[i
].alias_index
= oarg
;
1198 if (*ct_str
== '\0')
1202 def
->args_ct
[i
].ct
|= TCG_CT_CONST
;
1206 if (target_parse_constraint(&def
->args_ct
[i
], &ct_str
) < 0) {
1207 fprintf(stderr
, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1208 ct_str
, i
, def
->name
);
1216 /* TCGTargetOpDef entry with too much information? */
1217 assert(i
== TCG_MAX_OP_ARGS
|| tdefs
->args_ct_str
[i
] == NULL
);
1219 /* sort the constraints (XXX: this is just an heuristic) */
1220 sort_constraints(def
, 0, def
->nb_oargs
);
1221 sort_constraints(def
, def
->nb_oargs
, def
->nb_iargs
);
1227 printf("%s: sorted=", def
->name
);
1228 for(i
= 0; i
< def
->nb_oargs
+ def
->nb_iargs
; i
++)
1229 printf(" %d", def
->sorted_args
[i
]);
1236 #if defined(CONFIG_DEBUG_TCG)
1238 for (op
= 0; op
< tcg_op_defs_max
; op
++) {
1239 const TCGOpDef
*def
= &tcg_op_defs
[op
];
1240 if (def
->flags
& TCG_OPF_NOT_PRESENT
) {
1241 /* Wrong entry in op definitions? */
1243 fprintf(stderr
, "Invalid op definition for %s\n", def
->name
);
1247 /* Missing entry in op definitions? */
1249 fprintf(stderr
, "Missing op definition for %s\n", def
->name
);
1260 void tcg_op_remove(TCGContext
*s
, TCGOp
*op
)
1262 int next
= op
->next
;
1263 int prev
= op
->prev
;
1266 s
->gen_op_buf
[next
].prev
= prev
;
1268 s
->gen_last_op_idx
= prev
;
1271 s
->gen_op_buf
[prev
].next
= next
;
1273 s
->gen_first_op_idx
= next
;
1276 memset(op
, -1, sizeof(*op
));
1278 #ifdef CONFIG_PROFILER
1283 #ifdef USE_LIVENESS_ANALYSIS
1284 /* liveness analysis: end of function: all temps are dead, and globals
1285 should be in memory. */
1286 static inline void tcg_la_func_end(TCGContext
*s
, uint8_t *dead_temps
,
1289 memset(dead_temps
, 1, s
->nb_temps
);
1290 memset(mem_temps
, 1, s
->nb_globals
);
1291 memset(mem_temps
+ s
->nb_globals
, 0, s
->nb_temps
- s
->nb_globals
);
1294 /* liveness analysis: end of basic block: all temps are dead, globals
1295 and local temps should be in memory. */
1296 static inline void tcg_la_bb_end(TCGContext
*s
, uint8_t *dead_temps
,
1301 memset(dead_temps
, 1, s
->nb_temps
);
1302 memset(mem_temps
, 1, s
->nb_globals
);
1303 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1304 mem_temps
[i
] = s
->temps
[i
].temp_local
;
1308 /* Liveness analysis : update the opc_dead_args array to tell if a
1309 given input arguments is dead. Instructions updating dead
1310 temporaries are removed. */
1311 static void tcg_liveness_analysis(TCGContext
*s
)
1313 uint8_t *dead_temps
, *mem_temps
;
1314 int oi
, oi_prev
, nb_ops
;
1316 nb_ops
= s
->gen_next_op_idx
;
1317 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1318 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1320 dead_temps
= tcg_malloc(s
->nb_temps
);
1321 mem_temps
= tcg_malloc(s
->nb_temps
);
1322 tcg_la_func_end(s
, dead_temps
, mem_temps
);
1324 for (oi
= s
->gen_last_op_idx
; oi
>= 0; oi
= oi_prev
) {
1325 int i
, nb_iargs
, nb_oargs
;
1326 TCGOpcode opc_new
, opc_new2
;
1332 TCGOp
* const op
= &s
->gen_op_buf
[oi
];
1333 TCGArg
* const args
= &s
->gen_opparam_buf
[op
->args
];
1334 TCGOpcode opc
= op
->opc
;
1335 const TCGOpDef
*def
= &tcg_op_defs
[opc
];
1344 nb_oargs
= op
->callo
;
1345 nb_iargs
= op
->calli
;
1346 call_flags
= args
[nb_oargs
+ nb_iargs
+ 1];
1348 /* pure functions can be removed if their result is unused */
1349 if (call_flags
& TCG_CALL_NO_SIDE_EFFECTS
) {
1350 for (i
= 0; i
< nb_oargs
; i
++) {
1352 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1353 goto do_not_remove_call
;
1360 /* output args are dead */
1363 for (i
= 0; i
< nb_oargs
; i
++) {
1365 if (dead_temps
[arg
]) {
1366 dead_args
|= (1 << i
);
1368 if (mem_temps
[arg
]) {
1369 sync_args
|= (1 << i
);
1371 dead_temps
[arg
] = 1;
1375 if (!(call_flags
& TCG_CALL_NO_READ_GLOBALS
)) {
1376 /* globals should be synced to memory */
1377 memset(mem_temps
, 1, s
->nb_globals
);
1379 if (!(call_flags
& (TCG_CALL_NO_WRITE_GLOBALS
|
1380 TCG_CALL_NO_READ_GLOBALS
))) {
1381 /* globals should go back to memory */
1382 memset(dead_temps
, 1, s
->nb_globals
);
1385 /* record arguments that die in this helper */
1386 for (i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
1388 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1389 if (dead_temps
[arg
]) {
1390 dead_args
|= (1 << i
);
1394 /* input arguments are live for preceding opcodes */
1395 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1397 dead_temps
[arg
] = 0;
1399 s
->op_dead_args
[oi
] = dead_args
;
1400 s
->op_sync_args
[oi
] = sync_args
;
1404 case INDEX_op_insn_start
:
1406 case INDEX_op_discard
:
1407 /* mark the temporary as dead */
1408 dead_temps
[args
[0]] = 1;
1409 mem_temps
[args
[0]] = 0;
1412 case INDEX_op_add2_i32
:
1413 opc_new
= INDEX_op_add_i32
;
1415 case INDEX_op_sub2_i32
:
1416 opc_new
= INDEX_op_sub_i32
;
1418 case INDEX_op_add2_i64
:
1419 opc_new
= INDEX_op_add_i64
;
1421 case INDEX_op_sub2_i64
:
1422 opc_new
= INDEX_op_sub_i64
;
1426 /* Test if the high part of the operation is dead, but not
1427 the low part. The result can be optimized to a simple
1428 add or sub. This happens often for x86_64 guest when the
1429 cpu mode is set to 32 bit. */
1430 if (dead_temps
[args
[1]] && !mem_temps
[args
[1]]) {
1431 if (dead_temps
[args
[0]] && !mem_temps
[args
[0]]) {
1434 /* Replace the opcode and adjust the args in place,
1435 leaving 3 unused args at the end. */
1436 op
->opc
= opc
= opc_new
;
1439 /* Fall through and mark the single-word operation live. */
1445 case INDEX_op_mulu2_i32
:
1446 opc_new
= INDEX_op_mul_i32
;
1447 opc_new2
= INDEX_op_muluh_i32
;
1448 have_opc_new2
= TCG_TARGET_HAS_muluh_i32
;
1450 case INDEX_op_muls2_i32
:
1451 opc_new
= INDEX_op_mul_i32
;
1452 opc_new2
= INDEX_op_mulsh_i32
;
1453 have_opc_new2
= TCG_TARGET_HAS_mulsh_i32
;
1455 case INDEX_op_mulu2_i64
:
1456 opc_new
= INDEX_op_mul_i64
;
1457 opc_new2
= INDEX_op_muluh_i64
;
1458 have_opc_new2
= TCG_TARGET_HAS_muluh_i64
;
1460 case INDEX_op_muls2_i64
:
1461 opc_new
= INDEX_op_mul_i64
;
1462 opc_new2
= INDEX_op_mulsh_i64
;
1463 have_opc_new2
= TCG_TARGET_HAS_mulsh_i64
;
1468 if (dead_temps
[args
[1]] && !mem_temps
[args
[1]]) {
1469 if (dead_temps
[args
[0]] && !mem_temps
[args
[0]]) {
1470 /* Both parts of the operation are dead. */
1473 /* The high part of the operation is dead; generate the low. */
1474 op
->opc
= opc
= opc_new
;
1477 } else if (have_opc_new2
&& dead_temps
[args
[0]]
1478 && !mem_temps
[args
[0]]) {
1479 /* The low part of the operation is dead; generate the high. */
1480 op
->opc
= opc
= opc_new2
;
1487 /* Mark the single-word operation live. */
1492 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1493 nb_iargs
= def
->nb_iargs
;
1494 nb_oargs
= def
->nb_oargs
;
1496 /* Test if the operation can be removed because all
1497 its outputs are dead. We assume that nb_oargs == 0
1498 implies side effects */
1499 if (!(def
->flags
& TCG_OPF_SIDE_EFFECTS
) && nb_oargs
!= 0) {
1500 for (i
= 0; i
< nb_oargs
; i
++) {
1502 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1507 tcg_op_remove(s
, op
);
1510 /* output args are dead */
1513 for (i
= 0; i
< nb_oargs
; i
++) {
1515 if (dead_temps
[arg
]) {
1516 dead_args
|= (1 << i
);
1518 if (mem_temps
[arg
]) {
1519 sync_args
|= (1 << i
);
1521 dead_temps
[arg
] = 1;
1525 /* if end of basic block, update */
1526 if (def
->flags
& TCG_OPF_BB_END
) {
1527 tcg_la_bb_end(s
, dead_temps
, mem_temps
);
1528 } else if (def
->flags
& TCG_OPF_SIDE_EFFECTS
) {
1529 /* globals should be synced to memory */
1530 memset(mem_temps
, 1, s
->nb_globals
);
1533 /* record arguments that die in this opcode */
1534 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1536 if (dead_temps
[arg
]) {
1537 dead_args
|= (1 << i
);
1540 /* input arguments are live for preceding opcodes */
1541 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1543 dead_temps
[arg
] = 0;
1545 s
->op_dead_args
[oi
] = dead_args
;
1546 s
->op_sync_args
[oi
] = sync_args
;
1553 /* dummy liveness analysis */
1554 static void tcg_liveness_analysis(TCGContext
*s
)
1557 nb_ops
= s
->gen_opc_ptr
- s
->gen_opc_buf
;
1559 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1560 memset(s
->op_dead_args
, 0, nb_ops
* sizeof(uint16_t));
1561 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1562 memset(s
->op_sync_args
, 0, nb_ops
* sizeof(uint8_t));
1567 static void dump_regs(TCGContext
*s
)
1573 for(i
= 0; i
< s
->nb_temps
; i
++) {
1575 printf(" %10s: ", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), i
));
1576 switch(ts
->val_type
) {
1578 printf("%s", tcg_target_reg_names
[ts
->reg
]);
1581 printf("%d(%s)", (int)ts
->mem_offset
, tcg_target_reg_names
[ts
->mem_reg
]);
1583 case TEMP_VAL_CONST
:
1584 printf("$0x%" TCG_PRIlx
, ts
->val
);
1596 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1597 if (s
->reg_to_temp
[i
] >= 0) {
1599 tcg_target_reg_names
[i
],
1600 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), s
->reg_to_temp
[i
]));
1605 static void check_regs(TCGContext
*s
)
1611 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1612 k
= s
->reg_to_temp
[reg
];
1615 if (ts
->val_type
!= TEMP_VAL_REG
||
1617 printf("Inconsistency for register %s:\n",
1618 tcg_target_reg_names
[reg
]);
1623 for(k
= 0; k
< s
->nb_temps
; k
++) {
1625 if (ts
->val_type
== TEMP_VAL_REG
&&
1627 s
->reg_to_temp
[ts
->reg
] != k
) {
1628 printf("Inconsistency for temp %s:\n",
1629 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), k
));
1631 printf("reg state:\n");
1639 static void temp_allocate_frame(TCGContext
*s
, int temp
)
1642 ts
= &s
->temps
[temp
];
1643 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64)
1644 /* Sparc64 stack is accessed with offset of 2047 */
1645 s
->current_frame_offset
= (s
->current_frame_offset
+
1646 (tcg_target_long
)sizeof(tcg_target_long
) - 1) &
1647 ~(sizeof(tcg_target_long
) - 1);
1649 if (s
->current_frame_offset
+ (tcg_target_long
)sizeof(tcg_target_long
) >
1653 ts
->mem_offset
= s
->current_frame_offset
;
1654 ts
->mem_reg
= s
->frame_reg
;
1655 ts
->mem_allocated
= 1;
1656 s
->current_frame_offset
+= sizeof(tcg_target_long
);
1659 /* sync register 'reg' by saving it to the corresponding temporary */
1660 static inline void tcg_reg_sync(TCGContext
*s
, int reg
)
1665 temp
= s
->reg_to_temp
[reg
];
1666 ts
= &s
->temps
[temp
];
1667 assert(ts
->val_type
== TEMP_VAL_REG
);
1668 if (!ts
->mem_coherent
&& !ts
->fixed_reg
) {
1669 if (!ts
->mem_allocated
) {
1670 temp_allocate_frame(s
, temp
);
1672 tcg_out_st(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1674 ts
->mem_coherent
= 1;
1677 /* free register 'reg' by spilling the corresponding temporary if necessary */
1678 static void tcg_reg_free(TCGContext
*s
, int reg
)
1682 temp
= s
->reg_to_temp
[reg
];
1684 tcg_reg_sync(s
, reg
);
1685 s
->temps
[temp
].val_type
= TEMP_VAL_MEM
;
1686 s
->reg_to_temp
[reg
] = -1;
1690 /* Allocate a register belonging to reg1 & ~reg2 */
1691 static int tcg_reg_alloc(TCGContext
*s
, TCGRegSet reg1
, TCGRegSet reg2
)
1696 tcg_regset_andnot(reg_ct
, reg1
, reg2
);
1698 /* first try free registers */
1699 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1700 reg
= tcg_target_reg_alloc_order
[i
];
1701 if (tcg_regset_test_reg(reg_ct
, reg
) && s
->reg_to_temp
[reg
] == -1)
1705 /* XXX: do better spill choice */
1706 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1707 reg
= tcg_target_reg_alloc_order
[i
];
1708 if (tcg_regset_test_reg(reg_ct
, reg
)) {
1709 tcg_reg_free(s
, reg
);
1717 /* mark a temporary as dead. */
1718 static inline void temp_dead(TCGContext
*s
, int temp
)
1722 ts
= &s
->temps
[temp
];
1723 if (!ts
->fixed_reg
) {
1724 if (ts
->val_type
== TEMP_VAL_REG
) {
1725 s
->reg_to_temp
[ts
->reg
] = -1;
1727 if (temp
< s
->nb_globals
|| ts
->temp_local
) {
1728 ts
->val_type
= TEMP_VAL_MEM
;
1730 ts
->val_type
= TEMP_VAL_DEAD
;
1735 /* sync a temporary to memory. 'allocated_regs' is used in case a
1736 temporary registers needs to be allocated to store a constant. */
1737 static inline void temp_sync(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1741 ts
= &s
->temps
[temp
];
1742 if (!ts
->fixed_reg
) {
1743 switch(ts
->val_type
) {
1744 case TEMP_VAL_CONST
:
1745 ts
->reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1747 ts
->val_type
= TEMP_VAL_REG
;
1748 s
->reg_to_temp
[ts
->reg
] = temp
;
1749 ts
->mem_coherent
= 0;
1750 tcg_out_movi(s
, ts
->type
, ts
->reg
, ts
->val
);
1753 tcg_reg_sync(s
, ts
->reg
);
1764 /* save a temporary to memory. 'allocated_regs' is used in case a
1765 temporary registers needs to be allocated to store a constant. */
1766 static inline void temp_save(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1768 #ifdef USE_LIVENESS_ANALYSIS
1769 /* The liveness analysis already ensures that globals are back
1770 in memory. Keep an assert for safety. */
1771 assert(s
->temps
[temp
].val_type
== TEMP_VAL_MEM
|| s
->temps
[temp
].fixed_reg
);
1773 temp_sync(s
, temp
, allocated_regs
);
1778 /* save globals to their canonical location and assume they can be
1779 modified be the following code. 'allocated_regs' is used in case a
1780 temporary registers needs to be allocated to store a constant. */
1781 static void save_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1785 for(i
= 0; i
< s
->nb_globals
; i
++) {
1786 temp_save(s
, i
, allocated_regs
);
1790 /* sync globals to their canonical location and assume they can be
1791 read by the following code. 'allocated_regs' is used in case a
1792 temporary registers needs to be allocated to store a constant. */
1793 static void sync_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1797 for (i
= 0; i
< s
->nb_globals
; i
++) {
1798 #ifdef USE_LIVENESS_ANALYSIS
1799 assert(s
->temps
[i
].val_type
!= TEMP_VAL_REG
|| s
->temps
[i
].fixed_reg
||
1800 s
->temps
[i
].mem_coherent
);
1802 temp_sync(s
, i
, allocated_regs
);
1807 /* at the end of a basic block, we assume all temporaries are dead and
1808 all globals are stored at their canonical location. */
1809 static void tcg_reg_alloc_bb_end(TCGContext
*s
, TCGRegSet allocated_regs
)
1814 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1816 if (ts
->temp_local
) {
1817 temp_save(s
, i
, allocated_regs
);
1819 #ifdef USE_LIVENESS_ANALYSIS
1820 /* The liveness analysis already ensures that temps are dead.
1821 Keep an assert for safety. */
1822 assert(ts
->val_type
== TEMP_VAL_DEAD
);
1829 save_globals(s
, allocated_regs
);
1832 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1)
1833 #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1)
1835 static void tcg_reg_alloc_movi(TCGContext
*s
, const TCGArg
*args
,
1836 uint16_t dead_args
, uint8_t sync_args
)
1839 tcg_target_ulong val
;
1841 ots
= &s
->temps
[args
[0]];
1844 if (ots
->fixed_reg
) {
1845 /* for fixed registers, we do not do any constant
1847 tcg_out_movi(s
, ots
->type
, ots
->reg
, val
);
1849 /* The movi is not explicitly generated here */
1850 if (ots
->val_type
== TEMP_VAL_REG
)
1851 s
->reg_to_temp
[ots
->reg
] = -1;
1852 ots
->val_type
= TEMP_VAL_CONST
;
1855 if (NEED_SYNC_ARG(0)) {
1856 temp_sync(s
, args
[0], s
->reserved_regs
);
1858 if (IS_DEAD_ARG(0)) {
1859 temp_dead(s
, args
[0]);
1863 static void tcg_reg_alloc_mov(TCGContext
*s
, const TCGOpDef
*def
,
1864 const TCGArg
*args
, uint16_t dead_args
,
1867 TCGRegSet allocated_regs
;
1869 TCGType otype
, itype
;
1871 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1872 ots
= &s
->temps
[args
[0]];
1873 ts
= &s
->temps
[args
[1]];
1875 /* Note that otype != itype for no-op truncation. */
1879 /* If the source value is not in a register, and we're going to be
1880 forced to have it in a register in order to perform the copy,
1881 then copy the SOURCE value into its own register first. That way
1882 we don't have to reload SOURCE the next time it is used. */
1883 if (((NEED_SYNC_ARG(0) || ots
->fixed_reg
) && ts
->val_type
!= TEMP_VAL_REG
)
1884 || ts
->val_type
== TEMP_VAL_MEM
) {
1885 ts
->reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[itype
],
1887 if (ts
->val_type
== TEMP_VAL_MEM
) {
1888 tcg_out_ld(s
, itype
, ts
->reg
, ts
->mem_reg
, ts
->mem_offset
);
1889 ts
->mem_coherent
= 1;
1890 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1891 tcg_out_movi(s
, itype
, ts
->reg
, ts
->val
);
1892 ts
->mem_coherent
= 0;
1894 s
->reg_to_temp
[ts
->reg
] = args
[1];
1895 ts
->val_type
= TEMP_VAL_REG
;
1898 if (IS_DEAD_ARG(0) && !ots
->fixed_reg
) {
1899 /* mov to a non-saved dead register makes no sense (even with
1900 liveness analysis disabled). */
1901 assert(NEED_SYNC_ARG(0));
1902 /* The code above should have moved the temp to a register. */
1903 assert(ts
->val_type
== TEMP_VAL_REG
);
1904 if (!ots
->mem_allocated
) {
1905 temp_allocate_frame(s
, args
[0]);
1907 tcg_out_st(s
, otype
, ts
->reg
, ots
->mem_reg
, ots
->mem_offset
);
1908 if (IS_DEAD_ARG(1)) {
1909 temp_dead(s
, args
[1]);
1911 temp_dead(s
, args
[0]);
1912 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1913 /* propagate constant */
1914 if (ots
->val_type
== TEMP_VAL_REG
) {
1915 s
->reg_to_temp
[ots
->reg
] = -1;
1917 ots
->val_type
= TEMP_VAL_CONST
;
1919 if (IS_DEAD_ARG(1)) {
1920 temp_dead(s
, args
[1]);
1923 /* The code in the first if block should have moved the
1924 temp to a register. */
1925 assert(ts
->val_type
== TEMP_VAL_REG
);
1926 if (IS_DEAD_ARG(1) && !ts
->fixed_reg
&& !ots
->fixed_reg
) {
1927 /* the mov can be suppressed */
1928 if (ots
->val_type
== TEMP_VAL_REG
) {
1929 s
->reg_to_temp
[ots
->reg
] = -1;
1932 temp_dead(s
, args
[1]);
1934 if (ots
->val_type
!= TEMP_VAL_REG
) {
1935 /* When allocating a new register, make sure to not spill the
1937 tcg_regset_set_reg(allocated_regs
, ts
->reg
);
1938 ots
->reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[otype
],
1941 tcg_out_mov(s
, otype
, ots
->reg
, ts
->reg
);
1943 ots
->val_type
= TEMP_VAL_REG
;
1944 ots
->mem_coherent
= 0;
1945 s
->reg_to_temp
[ots
->reg
] = args
[0];
1946 if (NEED_SYNC_ARG(0)) {
1947 tcg_reg_sync(s
, ots
->reg
);
1952 static void tcg_reg_alloc_op(TCGContext
*s
,
1953 const TCGOpDef
*def
, TCGOpcode opc
,
1954 const TCGArg
*args
, uint16_t dead_args
,
1957 TCGRegSet allocated_regs
;
1958 int i
, k
, nb_iargs
, nb_oargs
, reg
;
1960 const TCGArgConstraint
*arg_ct
;
1962 TCGArg new_args
[TCG_MAX_OP_ARGS
];
1963 int const_args
[TCG_MAX_OP_ARGS
];
1965 nb_oargs
= def
->nb_oargs
;
1966 nb_iargs
= def
->nb_iargs
;
1968 /* copy constants */
1969 memcpy(new_args
+ nb_oargs
+ nb_iargs
,
1970 args
+ nb_oargs
+ nb_iargs
,
1971 sizeof(TCGArg
) * def
->nb_cargs
);
1973 /* satisfy input constraints */
1974 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1975 for(k
= 0; k
< nb_iargs
; k
++) {
1976 i
= def
->sorted_args
[nb_oargs
+ k
];
1978 arg_ct
= &def
->args_ct
[i
];
1979 ts
= &s
->temps
[arg
];
1980 if (ts
->val_type
== TEMP_VAL_MEM
) {
1981 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1982 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1983 ts
->val_type
= TEMP_VAL_REG
;
1985 ts
->mem_coherent
= 1;
1986 s
->reg_to_temp
[reg
] = arg
;
1987 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1988 if (tcg_target_const_match(ts
->val
, ts
->type
, arg_ct
)) {
1989 /* constant is OK for instruction */
1991 new_args
[i
] = ts
->val
;
1994 /* need to move to a register */
1995 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1996 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1997 ts
->val_type
= TEMP_VAL_REG
;
1999 ts
->mem_coherent
= 0;
2000 s
->reg_to_temp
[reg
] = arg
;
2003 assert(ts
->val_type
== TEMP_VAL_REG
);
2004 if (arg_ct
->ct
& TCG_CT_IALIAS
) {
2005 if (ts
->fixed_reg
) {
2006 /* if fixed register, we must allocate a new register
2007 if the alias is not the same register */
2008 if (arg
!= args
[arg_ct
->alias_index
])
2009 goto allocate_in_reg
;
2011 /* if the input is aliased to an output and if it is
2012 not dead after the instruction, we must allocate
2013 a new register and move it */
2014 if (!IS_DEAD_ARG(i
)) {
2015 goto allocate_in_reg
;
2017 /* check if the current register has already been allocated
2018 for another input aliased to an output */
2020 for (k2
= 0 ; k2
< k
; k2
++) {
2021 i2
= def
->sorted_args
[nb_oargs
+ k2
];
2022 if ((def
->args_ct
[i2
].ct
& TCG_CT_IALIAS
) &&
2023 (new_args
[i2
] == ts
->reg
)) {
2024 goto allocate_in_reg
;
2030 if (tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
2031 /* nothing to do : the constraint is satisfied */
2034 /* allocate a new register matching the constraint
2035 and move the temporary register into it */
2036 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2037 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2041 tcg_regset_set_reg(allocated_regs
, reg
);
2045 /* mark dead temporaries and free the associated registers */
2046 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
2047 if (IS_DEAD_ARG(i
)) {
2048 temp_dead(s
, args
[i
]);
2052 if (def
->flags
& TCG_OPF_BB_END
) {
2053 tcg_reg_alloc_bb_end(s
, allocated_regs
);
2055 if (def
->flags
& TCG_OPF_CALL_CLOBBER
) {
2056 /* XXX: permit generic clobber register list ? */
2057 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
2058 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
2059 tcg_reg_free(s
, reg
);
2063 if (def
->flags
& TCG_OPF_SIDE_EFFECTS
) {
2064 /* sync globals if the op has side effects and might trigger
2066 sync_globals(s
, allocated_regs
);
2069 /* satisfy the output constraints */
2070 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
2071 for(k
= 0; k
< nb_oargs
; k
++) {
2072 i
= def
->sorted_args
[k
];
2074 arg_ct
= &def
->args_ct
[i
];
2075 ts
= &s
->temps
[arg
];
2076 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
2077 reg
= new_args
[arg_ct
->alias_index
];
2079 /* if fixed register, we try to use it */
2081 if (ts
->fixed_reg
&&
2082 tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
2085 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2087 tcg_regset_set_reg(allocated_regs
, reg
);
2088 /* if a fixed register is used, then a move will be done afterwards */
2089 if (!ts
->fixed_reg
) {
2090 if (ts
->val_type
== TEMP_VAL_REG
) {
2091 s
->reg_to_temp
[ts
->reg
] = -1;
2093 ts
->val_type
= TEMP_VAL_REG
;
2095 /* temp value is modified, so the value kept in memory is
2096 potentially not the same */
2097 ts
->mem_coherent
= 0;
2098 s
->reg_to_temp
[reg
] = arg
;
2105 /* emit instruction */
2106 tcg_out_op(s
, opc
, new_args
, const_args
);
2108 /* move the outputs in the correct register if needed */
2109 for(i
= 0; i
< nb_oargs
; i
++) {
2110 ts
= &s
->temps
[args
[i
]];
2112 if (ts
->fixed_reg
&& ts
->reg
!= reg
) {
2113 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
2115 if (NEED_SYNC_ARG(i
)) {
2116 tcg_reg_sync(s
, reg
);
2118 if (IS_DEAD_ARG(i
)) {
2119 temp_dead(s
, args
[i
]);
2124 #ifdef TCG_TARGET_STACK_GROWSUP
2125 #define STACK_DIR(x) (-(x))
2127 #define STACK_DIR(x) (x)
2130 static void tcg_reg_alloc_call(TCGContext
*s
, int nb_oargs
, int nb_iargs
,
2131 const TCGArg
* const args
, uint16_t dead_args
,
2134 int flags
, nb_regs
, i
, reg
;
2137 intptr_t stack_offset
;
2138 size_t call_stack_size
;
2139 tcg_insn_unit
*func_addr
;
2141 TCGRegSet allocated_regs
;
2143 func_addr
= (tcg_insn_unit
*)(intptr_t)args
[nb_oargs
+ nb_iargs
];
2144 flags
= args
[nb_oargs
+ nb_iargs
+ 1];
2146 nb_regs
= ARRAY_SIZE(tcg_target_call_iarg_regs
);
2147 if (nb_regs
> nb_iargs
) {
2151 /* assign stack slots first */
2152 call_stack_size
= (nb_iargs
- nb_regs
) * sizeof(tcg_target_long
);
2153 call_stack_size
= (call_stack_size
+ TCG_TARGET_STACK_ALIGN
- 1) &
2154 ~(TCG_TARGET_STACK_ALIGN
- 1);
2155 allocate_args
= (call_stack_size
> TCG_STATIC_CALL_ARGS_SIZE
);
2156 if (allocate_args
) {
2157 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed,
2158 preallocate call stack */
2162 stack_offset
= TCG_TARGET_CALL_STACK_OFFSET
;
2163 for(i
= nb_regs
; i
< nb_iargs
; i
++) {
2164 arg
= args
[nb_oargs
+ i
];
2165 #ifdef TCG_TARGET_STACK_GROWSUP
2166 stack_offset
-= sizeof(tcg_target_long
);
2168 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2169 ts
= &s
->temps
[arg
];
2170 if (ts
->val_type
== TEMP_VAL_REG
) {
2171 tcg_out_st(s
, ts
->type
, ts
->reg
, TCG_REG_CALL_STACK
, stack_offset
);
2172 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
2173 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
2175 /* XXX: not correct if reading values from the stack */
2176 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2177 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
2178 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2179 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
2181 /* XXX: sign extend may be needed on some targets */
2182 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2183 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
2188 #ifndef TCG_TARGET_STACK_GROWSUP
2189 stack_offset
+= sizeof(tcg_target_long
);
2193 /* assign input registers */
2194 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
2195 for(i
= 0; i
< nb_regs
; i
++) {
2196 arg
= args
[nb_oargs
+ i
];
2197 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2198 ts
= &s
->temps
[arg
];
2199 reg
= tcg_target_call_iarg_regs
[i
];
2200 tcg_reg_free(s
, reg
);
2201 if (ts
->val_type
== TEMP_VAL_REG
) {
2202 if (ts
->reg
!= reg
) {
2203 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2205 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
2206 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2207 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2208 /* XXX: sign extend ? */
2209 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2213 tcg_regset_set_reg(allocated_regs
, reg
);
2217 /* mark dead temporaries and free the associated registers */
2218 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
2219 if (IS_DEAD_ARG(i
)) {
2220 temp_dead(s
, args
[i
]);
2224 /* clobber call registers */
2225 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
2226 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
2227 tcg_reg_free(s
, reg
);
2231 /* Save globals if they might be written by the helper, sync them if
2232 they might be read. */
2233 if (flags
& TCG_CALL_NO_READ_GLOBALS
) {
2235 } else if (flags
& TCG_CALL_NO_WRITE_GLOBALS
) {
2236 sync_globals(s
, allocated_regs
);
2238 save_globals(s
, allocated_regs
);
2241 tcg_out_call(s
, func_addr
);
2243 /* assign output registers and emit moves if needed */
2244 for(i
= 0; i
< nb_oargs
; i
++) {
2246 ts
= &s
->temps
[arg
];
2247 reg
= tcg_target_call_oarg_regs
[i
];
2248 assert(s
->reg_to_temp
[reg
] == -1);
2250 if (ts
->fixed_reg
) {
2251 if (ts
->reg
!= reg
) {
2252 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
2255 if (ts
->val_type
== TEMP_VAL_REG
) {
2256 s
->reg_to_temp
[ts
->reg
] = -1;
2258 ts
->val_type
= TEMP_VAL_REG
;
2260 ts
->mem_coherent
= 0;
2261 s
->reg_to_temp
[reg
] = arg
;
2262 if (NEED_SYNC_ARG(i
)) {
2263 tcg_reg_sync(s
, reg
);
2265 if (IS_DEAD_ARG(i
)) {
2266 temp_dead(s
, args
[i
]);
2272 #ifdef CONFIG_PROFILER
2274 static int64_t tcg_table_op_count
[NB_OPS
];
2276 void tcg_dump_op_count(FILE *f
, fprintf_function cpu_fprintf
)
2280 for (i
= 0; i
< NB_OPS
; i
++) {
2281 cpu_fprintf(f
, "%s %" PRId64
"\n", tcg_op_defs
[i
].name
,
2282 tcg_table_op_count
[i
]);
2286 void tcg_dump_op_count(FILE *f
, fprintf_function cpu_fprintf
)
2288 cpu_fprintf(f
, "[TCG profiler not compiled]\n");
2293 static inline int tcg_gen_code_common(TCGContext
*s
,
2294 tcg_insn_unit
*gen_code_buf
,
2300 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP
))) {
2307 #ifdef CONFIG_PROFILER
2308 s
->opt_time
-= profile_getclock();
2311 #ifdef USE_TCG_OPTIMIZATIONS
2315 #ifdef CONFIG_PROFILER
2316 s
->opt_time
+= profile_getclock();
2317 s
->la_time
-= profile_getclock();
2320 tcg_liveness_analysis(s
);
2322 #ifdef CONFIG_PROFILER
2323 s
->la_time
+= profile_getclock();
2327 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT
))) {
2328 qemu_log("OP after optimization and liveness analysis:\n");
2334 tcg_reg_alloc_start(s
);
2336 s
->code_buf
= gen_code_buf
;
2337 s
->code_ptr
= gen_code_buf
;
2341 for (oi
= s
->gen_first_op_idx
; oi
>= 0; oi
= oi_next
) {
2342 TCGOp
* const op
= &s
->gen_op_buf
[oi
];
2343 TCGArg
* const args
= &s
->gen_opparam_buf
[op
->args
];
2344 TCGOpcode opc
= op
->opc
;
2345 const TCGOpDef
*def
= &tcg_op_defs
[opc
];
2346 uint16_t dead_args
= s
->op_dead_args
[oi
];
2347 uint8_t sync_args
= s
->op_sync_args
[oi
];
2350 #ifdef CONFIG_PROFILER
2351 tcg_table_op_count
[opc
]++;
2355 case INDEX_op_mov_i32
:
2356 case INDEX_op_mov_i64
:
2357 tcg_reg_alloc_mov(s
, def
, args
, dead_args
, sync_args
);
2359 case INDEX_op_movi_i32
:
2360 case INDEX_op_movi_i64
:
2361 tcg_reg_alloc_movi(s
, args
, dead_args
, sync_args
);
2363 case INDEX_op_insn_start
:
2365 case INDEX_op_discard
:
2366 temp_dead(s
, args
[0]);
2368 case INDEX_op_set_label
:
2369 tcg_reg_alloc_bb_end(s
, s
->reserved_regs
);
2370 tcg_out_label(s
, arg_label(args
[0]), s
->code_ptr
);
2373 tcg_reg_alloc_call(s
, op
->callo
, op
->calli
, args
,
2374 dead_args
, sync_args
);
2377 /* Sanity check that we've not introduced any unhandled opcodes. */
2378 if (def
->flags
& TCG_OPF_NOT_PRESENT
) {
2381 /* Note: in order to speed up the code, it would be much
2382 faster to have specialized register allocator functions for
2383 some common argument patterns */
2384 tcg_reg_alloc_op(s
, def
, opc
, args
, dead_args
, sync_args
);
2387 if (search_pc
>= 0 && search_pc
< tcg_current_code_size(s
)) {
2395 /* Generate TB finalization at the end of block */
2396 tcg_out_tb_finalize(s
);
2400 int tcg_gen_code(TCGContext
*s
, tcg_insn_unit
*gen_code_buf
)
2402 #ifdef CONFIG_PROFILER
2406 n
= s
->gen_last_op_idx
+ 1;
2408 if (n
> s
->op_count_max
) {
2409 s
->op_count_max
= n
;
2414 if (n
> s
->temp_count_max
) {
2415 s
->temp_count_max
= n
;
2420 tcg_gen_code_common(s
, gen_code_buf
, -1);
2422 /* flush instruction cache */
2423 flush_icache_range((uintptr_t)s
->code_buf
, (uintptr_t)s
->code_ptr
);
2425 return tcg_current_code_size(s
);
2428 /* Return the index of the micro operation such as the pc after is <
2429 offset bytes from the start of the TB. The contents of gen_code_buf must
2430 not be changed, though writing the same values is ok.
2431 Return -1 if not found. */
2432 int tcg_gen_code_search_pc(TCGContext
*s
, tcg_insn_unit
*gen_code_buf
,
2435 return tcg_gen_code_common(s
, gen_code_buf
, offset
);
2438 #ifdef CONFIG_PROFILER
2439 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2441 TCGContext
*s
= &tcg_ctx
;
2444 tot
= s
->interm_time
+ s
->code_time
;
2445 cpu_fprintf(f
, "JIT cycles %" PRId64
" (%0.3f s at 2.4 GHz)\n",
2447 cpu_fprintf(f
, "translated TBs %" PRId64
" (aborted=%" PRId64
" %0.1f%%)\n",
2449 s
->tb_count1
- s
->tb_count
,
2450 s
->tb_count1
? (double)(s
->tb_count1
- s
->tb_count
) / s
->tb_count1
* 100.0 : 0);
2451 cpu_fprintf(f
, "avg ops/TB %0.1f max=%d\n",
2452 s
->tb_count
? (double)s
->op_count
/ s
->tb_count
: 0, s
->op_count_max
);
2453 cpu_fprintf(f
, "deleted ops/TB %0.2f\n",
2455 (double)s
->del_op_count
/ s
->tb_count
: 0);
2456 cpu_fprintf(f
, "avg temps/TB %0.2f max=%d\n",
2458 (double)s
->temp_count
/ s
->tb_count
: 0,
2461 cpu_fprintf(f
, "cycles/op %0.1f\n",
2462 s
->op_count
? (double)tot
/ s
->op_count
: 0);
2463 cpu_fprintf(f
, "cycles/in byte %0.1f\n",
2464 s
->code_in_len
? (double)tot
/ s
->code_in_len
: 0);
2465 cpu_fprintf(f
, "cycles/out byte %0.1f\n",
2466 s
->code_out_len
? (double)tot
/ s
->code_out_len
: 0);
2469 cpu_fprintf(f
, " gen_interm time %0.1f%%\n",
2470 (double)s
->interm_time
/ tot
* 100.0);
2471 cpu_fprintf(f
, " gen_code time %0.1f%%\n",
2472 (double)s
->code_time
/ tot
* 100.0);
2473 cpu_fprintf(f
, "optim./code time %0.1f%%\n",
2474 (double)s
->opt_time
/ (s
->code_time
? s
->code_time
: 1)
2476 cpu_fprintf(f
, "liveness/code time %0.1f%%\n",
2477 (double)s
->la_time
/ (s
->code_time
? s
->code_time
: 1) * 100.0);
2478 cpu_fprintf(f
, "cpu_restore count %" PRId64
"\n",
2480 cpu_fprintf(f
, " avg cycles %0.1f\n",
2481 s
->restore_count
? (double)s
->restore_time
/ s
->restore_count
: 0);
2484 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2486 cpu_fprintf(f
, "[TCG profiler not compiled]\n");
2490 #ifdef ELF_HOST_MACHINE
2491 /* In order to use this feature, the backend needs to do three things:
2493 (1) Define ELF_HOST_MACHINE to indicate both what value to
2494 put into the ELF image and to indicate support for the feature.
2496 (2) Define tcg_register_jit. This should create a buffer containing
2497 the contents of a .debug_frame section that describes the post-
2498 prologue unwind info for the tcg machine.
2500 (3) Call tcg_register_jit_int, with the constructed .debug_frame.
2503 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */
2510 struct jit_code_entry
{
2511 struct jit_code_entry
*next_entry
;
2512 struct jit_code_entry
*prev_entry
;
2513 const void *symfile_addr
;
2514 uint64_t symfile_size
;
2517 struct jit_descriptor
{
2519 uint32_t action_flag
;
2520 struct jit_code_entry
*relevant_entry
;
2521 struct jit_code_entry
*first_entry
;
2524 void __jit_debug_register_code(void) __attribute__((noinline
));
2525 void __jit_debug_register_code(void)
2530 /* Must statically initialize the version, because GDB may check
2531 the version before we can set it. */
2532 struct jit_descriptor __jit_debug_descriptor
= { 1, 0, 0, 0 };
2534 /* End GDB interface. */
2536 static int find_string(const char *strtab
, const char *str
)
2538 const char *p
= strtab
+ 1;
2541 if (strcmp(p
, str
) == 0) {
2548 static void tcg_register_jit_int(void *buf_ptr
, size_t buf_size
,
2549 const void *debug_frame
,
2550 size_t debug_frame_size
)
2552 struct __attribute__((packed
)) DebugInfo
{
2559 uintptr_t cu_low_pc
;
2560 uintptr_t cu_high_pc
;
2563 uintptr_t fn_low_pc
;
2564 uintptr_t fn_high_pc
;
2573 struct DebugInfo di
;
2578 struct ElfImage
*img
;
2580 static const struct ElfImage img_template
= {
2582 .e_ident
[EI_MAG0
] = ELFMAG0
,
2583 .e_ident
[EI_MAG1
] = ELFMAG1
,
2584 .e_ident
[EI_MAG2
] = ELFMAG2
,
2585 .e_ident
[EI_MAG3
] = ELFMAG3
,
2586 .e_ident
[EI_CLASS
] = ELF_CLASS
,
2587 .e_ident
[EI_DATA
] = ELF_DATA
,
2588 .e_ident
[EI_VERSION
] = EV_CURRENT
,
2590 .e_machine
= ELF_HOST_MACHINE
,
2591 .e_version
= EV_CURRENT
,
2592 .e_phoff
= offsetof(struct ElfImage
, phdr
),
2593 .e_shoff
= offsetof(struct ElfImage
, shdr
),
2594 .e_ehsize
= sizeof(ElfW(Shdr
)),
2595 .e_phentsize
= sizeof(ElfW(Phdr
)),
2597 .e_shentsize
= sizeof(ElfW(Shdr
)),
2598 .e_shnum
= ARRAY_SIZE(img
->shdr
),
2599 .e_shstrndx
= ARRAY_SIZE(img
->shdr
) - 1,
2600 #ifdef ELF_HOST_FLAGS
2601 .e_flags
= ELF_HOST_FLAGS
,
2604 .e_ident
[EI_OSABI
] = ELF_OSABI
,
2612 [0] = { .sh_type
= SHT_NULL
},
2613 /* Trick: The contents of code_gen_buffer are not present in
2614 this fake ELF file; that got allocated elsewhere. Therefore
2615 we mark .text as SHT_NOBITS (similar to .bss) so that readers
2616 will not look for contents. We can record any address. */
2618 .sh_type
= SHT_NOBITS
,
2619 .sh_flags
= SHF_EXECINSTR
| SHF_ALLOC
,
2621 [2] = { /* .debug_info */
2622 .sh_type
= SHT_PROGBITS
,
2623 .sh_offset
= offsetof(struct ElfImage
, di
),
2624 .sh_size
= sizeof(struct DebugInfo
),
2626 [3] = { /* .debug_abbrev */
2627 .sh_type
= SHT_PROGBITS
,
2628 .sh_offset
= offsetof(struct ElfImage
, da
),
2629 .sh_size
= sizeof(img
->da
),
2631 [4] = { /* .debug_frame */
2632 .sh_type
= SHT_PROGBITS
,
2633 .sh_offset
= sizeof(struct ElfImage
),
2635 [5] = { /* .symtab */
2636 .sh_type
= SHT_SYMTAB
,
2637 .sh_offset
= offsetof(struct ElfImage
, sym
),
2638 .sh_size
= sizeof(img
->sym
),
2640 .sh_link
= ARRAY_SIZE(img
->shdr
) - 1,
2641 .sh_entsize
= sizeof(ElfW(Sym
)),
2643 [6] = { /* .strtab */
2644 .sh_type
= SHT_STRTAB
,
2645 .sh_offset
= offsetof(struct ElfImage
, str
),
2646 .sh_size
= sizeof(img
->str
),
2650 [1] = { /* code_gen_buffer */
2651 .st_info
= ELF_ST_INFO(STB_GLOBAL
, STT_FUNC
),
2656 .len
= sizeof(struct DebugInfo
) - 4,
2658 .ptr_size
= sizeof(void *),
2660 .cu_lang
= 0x8001, /* DW_LANG_Mips_Assembler */
2662 .fn_name
= "code_gen_buffer"
2665 1, /* abbrev number (the cu) */
2666 0x11, 1, /* DW_TAG_compile_unit, has children */
2667 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */
2668 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2669 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2670 0, 0, /* end of abbrev */
2671 2, /* abbrev number (the fn) */
2672 0x2e, 0, /* DW_TAG_subprogram, no children */
2673 0x3, 0x8, /* DW_AT_name, DW_FORM_string */
2674 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2675 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2676 0, 0, /* end of abbrev */
2677 0 /* no more abbrev */
2679 .str
= "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0"
2680 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer",
2683 /* We only need a single jit entry; statically allocate it. */
2684 static struct jit_code_entry one_entry
;
2686 uintptr_t buf
= (uintptr_t)buf_ptr
;
2687 size_t img_size
= sizeof(struct ElfImage
) + debug_frame_size
;
2688 DebugFrameHeader
*dfh
;
2690 img
= g_malloc(img_size
);
2691 *img
= img_template
;
2693 img
->phdr
.p_vaddr
= buf
;
2694 img
->phdr
.p_paddr
= buf
;
2695 img
->phdr
.p_memsz
= buf_size
;
2697 img
->shdr
[1].sh_name
= find_string(img
->str
, ".text");
2698 img
->shdr
[1].sh_addr
= buf
;
2699 img
->shdr
[1].sh_size
= buf_size
;
2701 img
->shdr
[2].sh_name
= find_string(img
->str
, ".debug_info");
2702 img
->shdr
[3].sh_name
= find_string(img
->str
, ".debug_abbrev");
2704 img
->shdr
[4].sh_name
= find_string(img
->str
, ".debug_frame");
2705 img
->shdr
[4].sh_size
= debug_frame_size
;
2707 img
->shdr
[5].sh_name
= find_string(img
->str
, ".symtab");
2708 img
->shdr
[6].sh_name
= find_string(img
->str
, ".strtab");
2710 img
->sym
[1].st_name
= find_string(img
->str
, "code_gen_buffer");
2711 img
->sym
[1].st_value
= buf
;
2712 img
->sym
[1].st_size
= buf_size
;
2714 img
->di
.cu_low_pc
= buf
;
2715 img
->di
.cu_high_pc
= buf
+ buf_size
;
2716 img
->di
.fn_low_pc
= buf
;
2717 img
->di
.fn_high_pc
= buf
+ buf_size
;
2719 dfh
= (DebugFrameHeader
*)(img
+ 1);
2720 memcpy(dfh
, debug_frame
, debug_frame_size
);
2721 dfh
->fde
.func_start
= buf
;
2722 dfh
->fde
.func_len
= buf_size
;
2725 /* Enable this block to be able to debug the ELF image file creation.
2726 One can use readelf, objdump, or other inspection utilities. */
2728 FILE *f
= fopen("/tmp/qemu.jit", "w+b");
2730 if (fwrite(img
, img_size
, 1, f
) != img_size
) {
2731 /* Avoid stupid unused return value warning for fwrite. */
2738 one_entry
.symfile_addr
= img
;
2739 one_entry
.symfile_size
= img_size
;
2741 __jit_debug_descriptor
.action_flag
= JIT_REGISTER_FN
;
2742 __jit_debug_descriptor
.relevant_entry
= &one_entry
;
2743 __jit_debug_descriptor
.first_entry
= &one_entry
;
2744 __jit_debug_register_code();
2747 /* No support for the feature. Provide the entry point expected by exec.c,
2748 and implement the internal function we declared earlier. */
2750 static void tcg_register_jit_int(void *buf
, size_t size
,
2751 const void *debug_frame
,
2752 size_t debug_frame_size
)
2756 void tcg_register_jit(void *buf
, size_t buf_size
)
2759 #endif /* ELF_HOST_MACHINE */