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1 /*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #ifndef VL_H
25 #define VL_H
26
27 /* we put basic includes here to avoid repeating them in device drivers */
28 #include <stdlib.h>
29 #include <stdio.h>
30 #include <stdarg.h>
31 #include <string.h>
32 #include <inttypes.h>
33 #include <limits.h>
34 #include <time.h>
35 #include <ctype.h>
36 #include <errno.h>
37 #include <unistd.h>
38 #include <fcntl.h>
39 #include <sys/stat.h>
40
41 #ifndef O_LARGEFILE
42 #define O_LARGEFILE 0
43 #endif
44 #ifndef O_BINARY
45 #define O_BINARY 0
46 #endif
47
48 #ifndef ENOMEDIUM
49 #define ENOMEDIUM ENODEV
50 #endif
51
52 #ifdef _WIN32
53 #include <windows.h>
54 #define fsync _commit
55 #define lseek _lseeki64
56 #define ENOTSUP 4096
57 extern int qemu_ftruncate64(int, int64_t);
58 #define ftruncate qemu_ftruncate64
59
60
61 static inline char *realpath(const char *path, char *resolved_path)
62 {
63 _fullpath(resolved_path, path, _MAX_PATH);
64 return resolved_path;
65 }
66
67 #define PRId64 "I64d"
68 #define PRIx64 "I64x"
69 #define PRIu64 "I64u"
70 #define PRIo64 "I64o"
71 #endif
72
73 #ifdef QEMU_TOOL
74
75 /* we use QEMU_TOOL in the command line tools which do not depend on
76 the target CPU type */
77 #include "config-host.h"
78 #include <setjmp.h>
79 #include "osdep.h"
80 #include "bswap.h"
81
82 #else
83
84 #include "audio/audio.h"
85 #include "cpu.h"
86
87 #endif /* !defined(QEMU_TOOL) */
88
89 #ifndef glue
90 #define xglue(x, y) x ## y
91 #define glue(x, y) xglue(x, y)
92 #define stringify(s) tostring(s)
93 #define tostring(s) #s
94 #endif
95
96 #ifndef MIN
97 #define MIN(a, b) (((a) < (b)) ? (a) : (b))
98 #endif
99 #ifndef MAX
100 #define MAX(a, b) (((a) > (b)) ? (a) : (b))
101 #endif
102
103 /* cutils.c */
104 void pstrcpy(char *buf, int buf_size, const char *str);
105 char *pstrcat(char *buf, int buf_size, const char *s);
106 int strstart(const char *str, const char *val, const char **ptr);
107 int stristart(const char *str, const char *val, const char **ptr);
108
109 /* vl.c */
110 uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
111
112 void hw_error(const char *fmt, ...);
113
114 extern const char *bios_dir;
115
116 extern int vm_running;
117
118 typedef struct vm_change_state_entry VMChangeStateEntry;
119 typedef void VMChangeStateHandler(void *opaque, int running);
120 typedef void VMStopHandler(void *opaque, int reason);
121
122 VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
123 void *opaque);
124 void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
125
126 int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
127 void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
128
129 void vm_start(void);
130 void vm_stop(int reason);
131
132 typedef void QEMUResetHandler(void *opaque);
133
134 void qemu_register_reset(QEMUResetHandler *func, void *opaque);
135 void qemu_system_reset_request(void);
136 void qemu_system_shutdown_request(void);
137 void qemu_system_powerdown_request(void);
138 #if !defined(TARGET_SPARC)
139 // Please implement a power failure function to signal the OS
140 #define qemu_system_powerdown() do{}while(0)
141 #else
142 void qemu_system_powerdown(void);
143 #endif
144
145 void main_loop_wait(int timeout);
146
147 extern int ram_size;
148 extern int bios_size;
149 extern int rtc_utc;
150 extern int cirrus_vga_enabled;
151 extern int graphic_width;
152 extern int graphic_height;
153 extern int graphic_depth;
154 extern const char *keyboard_layout;
155 extern int kqemu_allowed;
156 extern int win2k_install_hack;
157 extern int usb_enabled;
158 extern int smp_cpus;
159 extern int no_quit;
160 extern int semihosting_enabled;
161 extern int autostart;
162 extern const char *bootp_filename;
163
164 #define MAX_OPTION_ROMS 16
165 extern const char *option_rom[MAX_OPTION_ROMS];
166 extern int nb_option_roms;
167
168 /* XXX: make it dynamic */
169 #define MAX_BIOS_SIZE (4 * 1024 * 1024)
170 #if defined (TARGET_PPC) || defined (TARGET_SPARC64)
171 #define BIOS_SIZE ((512 + 32) * 1024)
172 #elif defined(TARGET_MIPS)
173 #define BIOS_SIZE (4 * 1024 * 1024)
174 #endif
175
176 /* keyboard/mouse support */
177
178 #define MOUSE_EVENT_LBUTTON 0x01
179 #define MOUSE_EVENT_RBUTTON 0x02
180 #define MOUSE_EVENT_MBUTTON 0x04
181
182 typedef void QEMUPutKBDEvent(void *opaque, int keycode);
183 typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
184
185 typedef struct QEMUPutMouseEntry {
186 QEMUPutMouseEvent *qemu_put_mouse_event;
187 void *qemu_put_mouse_event_opaque;
188 int qemu_put_mouse_event_absolute;
189 char *qemu_put_mouse_event_name;
190
191 /* used internally by qemu for handling mice */
192 struct QEMUPutMouseEntry *next;
193 } QEMUPutMouseEntry;
194
195 void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
196 QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func,
197 void *opaque, int absolute,
198 const char *name);
199 void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry);
200
201 void kbd_put_keycode(int keycode);
202 void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
203 int kbd_mouse_is_absolute(void);
204
205 void do_info_mice(void);
206 void do_mouse_set(int index);
207
208 /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
209 constants) */
210 #define QEMU_KEY_ESC1(c) ((c) | 0xe100)
211 #define QEMU_KEY_BACKSPACE 0x007f
212 #define QEMU_KEY_UP QEMU_KEY_ESC1('A')
213 #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
214 #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
215 #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
216 #define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
217 #define QEMU_KEY_END QEMU_KEY_ESC1(4)
218 #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
219 #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
220 #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
221
222 #define QEMU_KEY_CTRL_UP 0xe400
223 #define QEMU_KEY_CTRL_DOWN 0xe401
224 #define QEMU_KEY_CTRL_LEFT 0xe402
225 #define QEMU_KEY_CTRL_RIGHT 0xe403
226 #define QEMU_KEY_CTRL_HOME 0xe404
227 #define QEMU_KEY_CTRL_END 0xe405
228 #define QEMU_KEY_CTRL_PAGEUP 0xe406
229 #define QEMU_KEY_CTRL_PAGEDOWN 0xe407
230
231 void kbd_put_keysym(int keysym);
232
233 /* async I/O support */
234
235 typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
236 typedef int IOCanRWHandler(void *opaque);
237 typedef void IOHandler(void *opaque);
238
239 int qemu_set_fd_handler2(int fd,
240 IOCanRWHandler *fd_read_poll,
241 IOHandler *fd_read,
242 IOHandler *fd_write,
243 void *opaque);
244 int qemu_set_fd_handler(int fd,
245 IOHandler *fd_read,
246 IOHandler *fd_write,
247 void *opaque);
248
249 /* Polling handling */
250
251 /* return TRUE if no sleep should be done afterwards */
252 typedef int PollingFunc(void *opaque);
253
254 int qemu_add_polling_cb(PollingFunc *func, void *opaque);
255 void qemu_del_polling_cb(PollingFunc *func, void *opaque);
256
257 #ifdef _WIN32
258 /* Wait objects handling */
259 typedef void WaitObjectFunc(void *opaque);
260
261 int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
262 void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
263 #endif
264
265 typedef struct QEMUBH QEMUBH;
266
267 /* character device */
268
269 #define CHR_EVENT_BREAK 0 /* serial break char */
270 #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
271 #define CHR_EVENT_RESET 2 /* new connection established */
272
273
274 #define CHR_IOCTL_SERIAL_SET_PARAMS 1
275 typedef struct {
276 int speed;
277 int parity;
278 int data_bits;
279 int stop_bits;
280 } QEMUSerialSetParams;
281
282 #define CHR_IOCTL_SERIAL_SET_BREAK 2
283
284 #define CHR_IOCTL_PP_READ_DATA 3
285 #define CHR_IOCTL_PP_WRITE_DATA 4
286 #define CHR_IOCTL_PP_READ_CONTROL 5
287 #define CHR_IOCTL_PP_WRITE_CONTROL 6
288 #define CHR_IOCTL_PP_READ_STATUS 7
289 #define CHR_IOCTL_PP_EPP_READ_ADDR 8
290 #define CHR_IOCTL_PP_EPP_READ 9
291 #define CHR_IOCTL_PP_EPP_WRITE_ADDR 10
292 #define CHR_IOCTL_PP_EPP_WRITE 11
293
294 typedef void IOEventHandler(void *opaque, int event);
295
296 typedef struct CharDriverState {
297 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
298 void (*chr_update_read_handler)(struct CharDriverState *s);
299 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
300 IOEventHandler *chr_event;
301 IOCanRWHandler *chr_can_read;
302 IOReadHandler *chr_read;
303 void *handler_opaque;
304 void (*chr_send_event)(struct CharDriverState *chr, int event);
305 void (*chr_close)(struct CharDriverState *chr);
306 void *opaque;
307 int focus;
308 QEMUBH *bh;
309 } CharDriverState;
310
311 CharDriverState *qemu_chr_open(const char *filename);
312 void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
313 int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
314 void qemu_chr_send_event(CharDriverState *s, int event);
315 void qemu_chr_add_handlers(CharDriverState *s,
316 IOCanRWHandler *fd_can_read,
317 IOReadHandler *fd_read,
318 IOEventHandler *fd_event,
319 void *opaque);
320 int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
321 void qemu_chr_reset(CharDriverState *s);
322 int qemu_chr_can_read(CharDriverState *s);
323 void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len);
324
325 /* consoles */
326
327 typedef struct DisplayState DisplayState;
328 typedef struct TextConsole TextConsole;
329
330 typedef void (*vga_hw_update_ptr)(void *);
331 typedef void (*vga_hw_invalidate_ptr)(void *);
332 typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
333
334 TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
335 vga_hw_invalidate_ptr invalidate,
336 vga_hw_screen_dump_ptr screen_dump,
337 void *opaque);
338 void vga_hw_update(void);
339 void vga_hw_invalidate(void);
340 void vga_hw_screen_dump(const char *filename);
341
342 int is_graphic_console(void);
343 CharDriverState *text_console_init(DisplayState *ds);
344 void console_select(unsigned int index);
345
346 /* serial ports */
347
348 #define MAX_SERIAL_PORTS 4
349
350 extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
351
352 /* parallel ports */
353
354 #define MAX_PARALLEL_PORTS 3
355
356 extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
357
358 struct ParallelIOArg {
359 void *buffer;
360 int count;
361 };
362
363 /* VLANs support */
364
365 typedef struct VLANClientState VLANClientState;
366
367 struct VLANClientState {
368 IOReadHandler *fd_read;
369 /* Packets may still be sent if this returns zero. It's used to
370 rate-limit the slirp code. */
371 IOCanRWHandler *fd_can_read;
372 void *opaque;
373 struct VLANClientState *next;
374 struct VLANState *vlan;
375 char info_str[256];
376 };
377
378 typedef struct VLANState {
379 int id;
380 VLANClientState *first_client;
381 struct VLANState *next;
382 } VLANState;
383
384 VLANState *qemu_find_vlan(int id);
385 VLANClientState *qemu_new_vlan_client(VLANState *vlan,
386 IOReadHandler *fd_read,
387 IOCanRWHandler *fd_can_read,
388 void *opaque);
389 int qemu_can_send_packet(VLANClientState *vc);
390 void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
391 void qemu_handler_true(void *opaque);
392
393 void do_info_network(void);
394
395 /* TAP win32 */
396 int tap_win32_init(VLANState *vlan, const char *ifname);
397
398 /* NIC info */
399
400 #define MAX_NICS 8
401
402 typedef struct NICInfo {
403 uint8_t macaddr[6];
404 const char *model;
405 VLANState *vlan;
406 } NICInfo;
407
408 extern int nb_nics;
409 extern NICInfo nd_table[MAX_NICS];
410
411 /* timers */
412
413 typedef struct QEMUClock QEMUClock;
414 typedef struct QEMUTimer QEMUTimer;
415 typedef void QEMUTimerCB(void *opaque);
416
417 /* The real time clock should be used only for stuff which does not
418 change the virtual machine state, as it is run even if the virtual
419 machine is stopped. The real time clock has a frequency of 1000
420 Hz. */
421 extern QEMUClock *rt_clock;
422
423 /* The virtual clock is only run during the emulation. It is stopped
424 when the virtual machine is stopped. Virtual timers use a high
425 precision clock, usually cpu cycles (use ticks_per_sec). */
426 extern QEMUClock *vm_clock;
427
428 int64_t qemu_get_clock(QEMUClock *clock);
429
430 QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
431 void qemu_free_timer(QEMUTimer *ts);
432 void qemu_del_timer(QEMUTimer *ts);
433 void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
434 int qemu_timer_pending(QEMUTimer *ts);
435
436 extern int64_t ticks_per_sec;
437 extern int pit_min_timer_count;
438
439 int64_t cpu_get_ticks(void);
440 void cpu_enable_ticks(void);
441 void cpu_disable_ticks(void);
442
443 /* VM Load/Save */
444
445 typedef struct QEMUFile QEMUFile;
446
447 QEMUFile *qemu_fopen(const char *filename, const char *mode);
448 void qemu_fflush(QEMUFile *f);
449 void qemu_fclose(QEMUFile *f);
450 void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
451 void qemu_put_byte(QEMUFile *f, int v);
452 void qemu_put_be16(QEMUFile *f, unsigned int v);
453 void qemu_put_be32(QEMUFile *f, unsigned int v);
454 void qemu_put_be64(QEMUFile *f, uint64_t v);
455 int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
456 int qemu_get_byte(QEMUFile *f);
457 unsigned int qemu_get_be16(QEMUFile *f);
458 unsigned int qemu_get_be32(QEMUFile *f);
459 uint64_t qemu_get_be64(QEMUFile *f);
460
461 static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
462 {
463 qemu_put_be64(f, *pv);
464 }
465
466 static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
467 {
468 qemu_put_be32(f, *pv);
469 }
470
471 static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
472 {
473 qemu_put_be16(f, *pv);
474 }
475
476 static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
477 {
478 qemu_put_byte(f, *pv);
479 }
480
481 static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
482 {
483 *pv = qemu_get_be64(f);
484 }
485
486 static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
487 {
488 *pv = qemu_get_be32(f);
489 }
490
491 static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
492 {
493 *pv = qemu_get_be16(f);
494 }
495
496 static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
497 {
498 *pv = qemu_get_byte(f);
499 }
500
501 #if TARGET_LONG_BITS == 64
502 #define qemu_put_betl qemu_put_be64
503 #define qemu_get_betl qemu_get_be64
504 #define qemu_put_betls qemu_put_be64s
505 #define qemu_get_betls qemu_get_be64s
506 #else
507 #define qemu_put_betl qemu_put_be32
508 #define qemu_get_betl qemu_get_be32
509 #define qemu_put_betls qemu_put_be32s
510 #define qemu_get_betls qemu_get_be32s
511 #endif
512
513 int64_t qemu_ftell(QEMUFile *f);
514 int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
515
516 typedef void SaveStateHandler(QEMUFile *f, void *opaque);
517 typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
518
519 int register_savevm(const char *idstr,
520 int instance_id,
521 int version_id,
522 SaveStateHandler *save_state,
523 LoadStateHandler *load_state,
524 void *opaque);
525 void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
526 void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
527
528 void cpu_save(QEMUFile *f, void *opaque);
529 int cpu_load(QEMUFile *f, void *opaque, int version_id);
530
531 void do_savevm(const char *name);
532 void do_loadvm(const char *name);
533 void do_delvm(const char *name);
534 void do_info_snapshots(void);
535
536 /* bottom halves */
537 typedef void QEMUBHFunc(void *opaque);
538
539 QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
540 void qemu_bh_schedule(QEMUBH *bh);
541 void qemu_bh_cancel(QEMUBH *bh);
542 void qemu_bh_delete(QEMUBH *bh);
543 int qemu_bh_poll(void);
544
545 /* block.c */
546 typedef struct BlockDriverState BlockDriverState;
547 typedef struct BlockDriver BlockDriver;
548
549 extern BlockDriver bdrv_raw;
550 extern BlockDriver bdrv_host_device;
551 extern BlockDriver bdrv_cow;
552 extern BlockDriver bdrv_qcow;
553 extern BlockDriver bdrv_vmdk;
554 extern BlockDriver bdrv_cloop;
555 extern BlockDriver bdrv_dmg;
556 extern BlockDriver bdrv_bochs;
557 extern BlockDriver bdrv_vpc;
558 extern BlockDriver bdrv_vvfat;
559 extern BlockDriver bdrv_qcow2;
560
561 typedef struct BlockDriverInfo {
562 /* in bytes, 0 if irrelevant */
563 int cluster_size;
564 /* offset at which the VM state can be saved (0 if not possible) */
565 int64_t vm_state_offset;
566 } BlockDriverInfo;
567
568 typedef struct QEMUSnapshotInfo {
569 char id_str[128]; /* unique snapshot id */
570 /* the following fields are informative. They are not needed for
571 the consistency of the snapshot */
572 char name[256]; /* user choosen name */
573 uint32_t vm_state_size; /* VM state info size */
574 uint32_t date_sec; /* UTC date of the snapshot */
575 uint32_t date_nsec;
576 uint64_t vm_clock_nsec; /* VM clock relative to boot */
577 } QEMUSnapshotInfo;
578
579 #define BDRV_O_RDONLY 0x0000
580 #define BDRV_O_RDWR 0x0002
581 #define BDRV_O_ACCESS 0x0003
582 #define BDRV_O_CREAT 0x0004 /* create an empty file */
583 #define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
584 #define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
585 use a disk image format on top of
586 it (default for
587 bdrv_file_open()) */
588
589 void bdrv_init(void);
590 BlockDriver *bdrv_find_format(const char *format_name);
591 int bdrv_create(BlockDriver *drv,
592 const char *filename, int64_t size_in_sectors,
593 const char *backing_file, int flags);
594 BlockDriverState *bdrv_new(const char *device_name);
595 void bdrv_delete(BlockDriverState *bs);
596 int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
597 int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
598 int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
599 BlockDriver *drv);
600 void bdrv_close(BlockDriverState *bs);
601 int bdrv_read(BlockDriverState *bs, int64_t sector_num,
602 uint8_t *buf, int nb_sectors);
603 int bdrv_write(BlockDriverState *bs, int64_t sector_num,
604 const uint8_t *buf, int nb_sectors);
605 int bdrv_pread(BlockDriverState *bs, int64_t offset,
606 void *buf, int count);
607 int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
608 const void *buf, int count);
609 int bdrv_truncate(BlockDriverState *bs, int64_t offset);
610 int64_t bdrv_getlength(BlockDriverState *bs);
611 void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
612 int bdrv_commit(BlockDriverState *bs);
613 void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
614 /* async block I/O */
615 typedef struct BlockDriverAIOCB BlockDriverAIOCB;
616 typedef void BlockDriverCompletionFunc(void *opaque, int ret);
617
618 BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num,
619 uint8_t *buf, int nb_sectors,
620 BlockDriverCompletionFunc *cb, void *opaque);
621 BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num,
622 const uint8_t *buf, int nb_sectors,
623 BlockDriverCompletionFunc *cb, void *opaque);
624 void bdrv_aio_cancel(BlockDriverAIOCB *acb);
625
626 void qemu_aio_init(void);
627 void qemu_aio_poll(void);
628 void qemu_aio_flush(void);
629 void qemu_aio_wait_start(void);
630 void qemu_aio_wait(void);
631 void qemu_aio_wait_end(void);
632
633 /* Ensure contents are flushed to disk. */
634 void bdrv_flush(BlockDriverState *bs);
635
636 #define BDRV_TYPE_HD 0
637 #define BDRV_TYPE_CDROM 1
638 #define BDRV_TYPE_FLOPPY 2
639 #define BIOS_ATA_TRANSLATION_AUTO 0
640 #define BIOS_ATA_TRANSLATION_NONE 1
641 #define BIOS_ATA_TRANSLATION_LBA 2
642 #define BIOS_ATA_TRANSLATION_LARGE 3
643 #define BIOS_ATA_TRANSLATION_RECHS 4
644
645 void bdrv_set_geometry_hint(BlockDriverState *bs,
646 int cyls, int heads, int secs);
647 void bdrv_set_type_hint(BlockDriverState *bs, int type);
648 void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
649 void bdrv_get_geometry_hint(BlockDriverState *bs,
650 int *pcyls, int *pheads, int *psecs);
651 int bdrv_get_type_hint(BlockDriverState *bs);
652 int bdrv_get_translation_hint(BlockDriverState *bs);
653 int bdrv_is_removable(BlockDriverState *bs);
654 int bdrv_is_read_only(BlockDriverState *bs);
655 int bdrv_is_inserted(BlockDriverState *bs);
656 int bdrv_media_changed(BlockDriverState *bs);
657 int bdrv_is_locked(BlockDriverState *bs);
658 void bdrv_set_locked(BlockDriverState *bs, int locked);
659 void bdrv_eject(BlockDriverState *bs, int eject_flag);
660 void bdrv_set_change_cb(BlockDriverState *bs,
661 void (*change_cb)(void *opaque), void *opaque);
662 void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
663 void bdrv_info(void);
664 BlockDriverState *bdrv_find(const char *name);
665 void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
666 int bdrv_is_encrypted(BlockDriverState *bs);
667 int bdrv_set_key(BlockDriverState *bs, const char *key);
668 void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
669 void *opaque);
670 const char *bdrv_get_device_name(BlockDriverState *bs);
671 int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
672 const uint8_t *buf, int nb_sectors);
673 int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
674
675 void bdrv_get_backing_filename(BlockDriverState *bs,
676 char *filename, int filename_size);
677 int bdrv_snapshot_create(BlockDriverState *bs,
678 QEMUSnapshotInfo *sn_info);
679 int bdrv_snapshot_goto(BlockDriverState *bs,
680 const char *snapshot_id);
681 int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id);
682 int bdrv_snapshot_list(BlockDriverState *bs,
683 QEMUSnapshotInfo **psn_info);
684 char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn);
685
686 char *get_human_readable_size(char *buf, int buf_size, int64_t size);
687 int path_is_absolute(const char *path);
688 void path_combine(char *dest, int dest_size,
689 const char *base_path,
690 const char *filename);
691
692 #ifndef QEMU_TOOL
693
694 typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
695 int boot_device,
696 DisplayState *ds, const char **fd_filename, int snapshot,
697 const char *kernel_filename, const char *kernel_cmdline,
698 const char *initrd_filename, const char *cpu_model);
699
700 typedef struct QEMUMachine {
701 const char *name;
702 const char *desc;
703 QEMUMachineInitFunc *init;
704 struct QEMUMachine *next;
705 } QEMUMachine;
706
707 int qemu_register_machine(QEMUMachine *m);
708
709 typedef void SetIRQFunc(void *opaque, int irq_num, int level);
710 typedef void IRQRequestFunc(void *opaque, int level);
711
712 #if defined(TARGET_PPC)
713 void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
714 #endif
715
716 #if defined(TARGET_MIPS)
717 void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
718 #endif
719
720 /* ISA bus */
721
722 extern target_phys_addr_t isa_mem_base;
723
724 typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
725 typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
726
727 int register_ioport_read(int start, int length, int size,
728 IOPortReadFunc *func, void *opaque);
729 int register_ioport_write(int start, int length, int size,
730 IOPortWriteFunc *func, void *opaque);
731 void isa_unassign_ioport(int start, int length);
732
733 void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
734
735 /* PCI bus */
736
737 extern target_phys_addr_t pci_mem_base;
738
739 typedef struct PCIBus PCIBus;
740 typedef struct PCIDevice PCIDevice;
741
742 typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
743 uint32_t address, uint32_t data, int len);
744 typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
745 uint32_t address, int len);
746 typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
747 uint32_t addr, uint32_t size, int type);
748
749 #define PCI_ADDRESS_SPACE_MEM 0x00
750 #define PCI_ADDRESS_SPACE_IO 0x01
751 #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
752
753 typedef struct PCIIORegion {
754 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
755 uint32_t size;
756 uint8_t type;
757 PCIMapIORegionFunc *map_func;
758 } PCIIORegion;
759
760 #define PCI_ROM_SLOT 6
761 #define PCI_NUM_REGIONS 7
762
763 #define PCI_DEVICES_MAX 64
764
765 #define PCI_VENDOR_ID 0x00 /* 16 bits */
766 #define PCI_DEVICE_ID 0x02 /* 16 bits */
767 #define PCI_COMMAND 0x04 /* 16 bits */
768 #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
769 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
770 #define PCI_CLASS_DEVICE 0x0a /* Device class */
771 #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
772 #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
773 #define PCI_MIN_GNT 0x3e /* 8 bits */
774 #define PCI_MAX_LAT 0x3f /* 8 bits */
775
776 struct PCIDevice {
777 /* PCI config space */
778 uint8_t config[256];
779
780 /* the following fields are read only */
781 PCIBus *bus;
782 int devfn;
783 char name[64];
784 PCIIORegion io_regions[PCI_NUM_REGIONS];
785
786 /* do not access the following fields */
787 PCIConfigReadFunc *config_read;
788 PCIConfigWriteFunc *config_write;
789 /* ??? This is a PC-specific hack, and should be removed. */
790 int irq_index;
791
792 /* Current IRQ levels. Used internally by the generic PCI code. */
793 int irq_state[4];
794 };
795
796 PCIDevice *pci_register_device(PCIBus *bus, const char *name,
797 int instance_size, int devfn,
798 PCIConfigReadFunc *config_read,
799 PCIConfigWriteFunc *config_write);
800
801 void pci_register_io_region(PCIDevice *pci_dev, int region_num,
802 uint32_t size, int type,
803 PCIMapIORegionFunc *map_func);
804
805 void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
806
807 uint32_t pci_default_read_config(PCIDevice *d,
808 uint32_t address, int len);
809 void pci_default_write_config(PCIDevice *d,
810 uint32_t address, uint32_t val, int len);
811 void pci_device_save(PCIDevice *s, QEMUFile *f);
812 int pci_device_load(PCIDevice *s, QEMUFile *f);
813
814 typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level);
815 typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
816 PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
817 void *pic, int devfn_min, int nirq);
818
819 void pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn);
820 void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
821 uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
822 int pci_bus_num(PCIBus *s);
823 void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d));
824
825 void pci_info(void);
826 PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
827 pci_map_irq_fn map_irq, const char *name);
828
829 /* prep_pci.c */
830 PCIBus *pci_prep_init(void);
831
832 /* grackle_pci.c */
833 PCIBus *pci_grackle_init(uint32_t base, void *pic);
834
835 /* unin_pci.c */
836 PCIBus *pci_pmac_init(void *pic);
837
838 /* apb_pci.c */
839 PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
840 void *pic);
841
842 PCIBus *pci_vpb_init(void *pic, int irq, int realview);
843
844 /* piix_pci.c */
845 PCIBus *i440fx_init(PCIDevice **pi440fx_state);
846 void i440fx_set_smm(PCIDevice *d, int val);
847 int piix3_init(PCIBus *bus, int devfn);
848 void i440fx_init_memory_mappings(PCIDevice *d);
849
850 int piix4_init(PCIBus *bus, int devfn);
851
852 /* openpic.c */
853 typedef struct openpic_t openpic_t;
854 void openpic_set_irq(void *opaque, int n_IRQ, int level);
855 openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
856 CPUState **envp);
857
858 /* heathrow_pic.c */
859 typedef struct HeathrowPICS HeathrowPICS;
860 void heathrow_pic_set_irq(void *opaque, int num, int level);
861 HeathrowPICS *heathrow_pic_init(int *pmem_index);
862
863 /* gt64xxx.c */
864 PCIBus *pci_gt64120_init(void *pic);
865
866 #ifdef HAS_AUDIO
867 struct soundhw {
868 const char *name;
869 const char *descr;
870 int enabled;
871 int isa;
872 union {
873 int (*init_isa) (AudioState *s);
874 int (*init_pci) (PCIBus *bus, AudioState *s);
875 } init;
876 };
877
878 extern struct soundhw soundhw[];
879 #endif
880
881 /* vga.c */
882
883 #define VGA_RAM_SIZE (8192 * 1024)
884
885 struct DisplayState {
886 uint8_t *data;
887 int linesize;
888 int depth;
889 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
890 int width;
891 int height;
892 void *opaque;
893
894 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
895 void (*dpy_resize)(struct DisplayState *s, int w, int h);
896 void (*dpy_refresh)(struct DisplayState *s);
897 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
898 };
899
900 static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
901 {
902 s->dpy_update(s, x, y, w, h);
903 }
904
905 static inline void dpy_resize(DisplayState *s, int w, int h)
906 {
907 s->dpy_resize(s, w, h);
908 }
909
910 int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
911 unsigned long vga_ram_offset, int vga_ram_size);
912 int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
913 unsigned long vga_ram_offset, int vga_ram_size,
914 unsigned long vga_bios_offset, int vga_bios_size);
915
916 /* cirrus_vga.c */
917 void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
918 unsigned long vga_ram_offset, int vga_ram_size);
919 void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
920 unsigned long vga_ram_offset, int vga_ram_size);
921
922 /* sdl.c */
923 void sdl_display_init(DisplayState *ds, int full_screen, int no_frame);
924
925 /* cocoa.m */
926 void cocoa_display_init(DisplayState *ds, int full_screen);
927
928 /* vnc.c */
929 void vnc_display_init(DisplayState *ds, const char *display);
930 void do_info_vnc(void);
931
932 /* x_keymap.c */
933 extern uint8_t _translate_keycode(const int key);
934
935 /* ide.c */
936 #define MAX_DISKS 4
937
938 extern BlockDriverState *bs_table[MAX_DISKS + 1];
939
940 void isa_ide_init(int iobase, int iobase2, int irq,
941 BlockDriverState *hd0, BlockDriverState *hd1);
942 void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
943 int secondary_ide_enabled);
944 void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
945 int pmac_ide_init (BlockDriverState **hd_table,
946 SetIRQFunc *set_irq, void *irq_opaque, int irq);
947
948 /* cdrom.c */
949 int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
950 int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
951
952 /* ds1225y.c */
953 typedef struct ds1225y_t ds1225y_t;
954 ds1225y_t *ds1225y_init(target_ulong mem_base, const char *filename);
955
956 /* es1370.c */
957 int es1370_init (PCIBus *bus, AudioState *s);
958
959 /* sb16.c */
960 int SB16_init (AudioState *s);
961
962 /* adlib.c */
963 int Adlib_init (AudioState *s);
964
965 /* gus.c */
966 int GUS_init (AudioState *s);
967
968 /* dma.c */
969 typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
970 int DMA_get_channel_mode (int nchan);
971 int DMA_read_memory (int nchan, void *buf, int pos, int size);
972 int DMA_write_memory (int nchan, void *buf, int pos, int size);
973 void DMA_hold_DREQ (int nchan);
974 void DMA_release_DREQ (int nchan);
975 void DMA_schedule(int nchan);
976 void DMA_run (void);
977 void DMA_init (int high_page_enable);
978 void DMA_register_channel (int nchan,
979 DMA_transfer_handler transfer_handler,
980 void *opaque);
981 /* fdc.c */
982 #define MAX_FD 2
983 extern BlockDriverState *fd_table[MAX_FD];
984
985 typedef struct fdctrl_t fdctrl_t;
986
987 fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
988 uint32_t io_base,
989 BlockDriverState **fds);
990 int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
991
992 /* ne2000.c */
993
994 void isa_ne2000_init(int base, int irq, NICInfo *nd);
995 void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn);
996
997 /* rtl8139.c */
998
999 void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn);
1000
1001 /* pcnet.c */
1002
1003 void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn);
1004 void pcnet_h_reset(void *opaque);
1005 void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque);
1006
1007
1008 /* pckbd.c */
1009
1010 void kbd_init(void);
1011
1012 /* mc146818rtc.c */
1013
1014 typedef struct RTCState RTCState;
1015
1016 RTCState *rtc_init(int base, int irq);
1017 void rtc_set_memory(RTCState *s, int addr, int val);
1018 void rtc_set_date(RTCState *s, const struct tm *tm);
1019
1020 /* serial.c */
1021
1022 typedef struct SerialState SerialState;
1023 SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
1024 int base, int irq, CharDriverState *chr);
1025 SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
1026 target_ulong base, int it_shift,
1027 int irq, CharDriverState *chr);
1028
1029 /* parallel.c */
1030
1031 typedef struct ParallelState ParallelState;
1032 ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
1033
1034 /* i8259.c */
1035
1036 typedef struct PicState2 PicState2;
1037 extern PicState2 *isa_pic;
1038 void pic_set_irq(int irq, int level);
1039 void pic_set_irq_new(void *opaque, int irq, int level);
1040 PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
1041 void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
1042 void *alt_irq_opaque);
1043 int pic_read_irq(PicState2 *s);
1044 void pic_update_irq(PicState2 *s);
1045 uint32_t pic_intack_read(PicState2 *s);
1046 void pic_info(void);
1047 void irq_info(void);
1048
1049 /* APIC */
1050 typedef struct IOAPICState IOAPICState;
1051
1052 int apic_init(CPUState *env);
1053 int apic_get_interrupt(CPUState *env);
1054 IOAPICState *ioapic_init(void);
1055 void ioapic_set_irq(void *opaque, int vector, int level);
1056
1057 /* i8254.c */
1058
1059 #define PIT_FREQ 1193182
1060
1061 typedef struct PITState PITState;
1062
1063 PITState *pit_init(int base, int irq);
1064 void pit_set_gate(PITState *pit, int channel, int val);
1065 int pit_get_gate(PITState *pit, int channel);
1066 int pit_get_initial_count(PITState *pit, int channel);
1067 int pit_get_mode(PITState *pit, int channel);
1068 int pit_get_out(PITState *pit, int channel, int64_t current_time);
1069
1070 /* pcspk.c */
1071 void pcspk_init(PITState *);
1072 int pcspk_audio_init(AudioState *);
1073
1074 #include "hw/smbus.h"
1075
1076 /* acpi.c */
1077 extern int acpi_enabled;
1078 void piix4_pm_init(PCIBus *bus, int devfn);
1079 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
1080 void acpi_bios_init(void);
1081
1082 /* smbus_eeprom.c */
1083 SMBusDevice *smbus_eeprom_device_init(uint8_t addr, uint8_t *buf);
1084
1085 /* pc.c */
1086 extern QEMUMachine pc_machine;
1087 extern QEMUMachine isapc_machine;
1088 extern int fd_bootchk;
1089
1090 void ioport_set_a20(int enable);
1091 int ioport_get_a20(void);
1092
1093 /* ppc.c */
1094 extern QEMUMachine prep_machine;
1095 extern QEMUMachine core99_machine;
1096 extern QEMUMachine heathrow_machine;
1097
1098 /* mips_r4k.c */
1099 extern QEMUMachine mips_machine;
1100
1101 /* mips_malta.c */
1102 extern QEMUMachine mips_malta_machine;
1103
1104 /* mips_int */
1105 extern void cpu_mips_irq_request(void *opaque, int irq, int level);
1106
1107 /* mips_timer.c */
1108 extern void cpu_mips_clock_init(CPUState *);
1109 extern void cpu_mips_irqctrl_init (void);
1110
1111 /* shix.c */
1112 extern QEMUMachine shix_machine;
1113
1114 #ifdef TARGET_PPC
1115 ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
1116 #endif
1117 void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
1118
1119 extern CPUWriteMemoryFunc *PPC_io_write[];
1120 extern CPUReadMemoryFunc *PPC_io_read[];
1121 void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
1122
1123 /* sun4m.c */
1124 extern QEMUMachine sun4m_machine;
1125 void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
1126
1127 /* iommu.c */
1128 void *iommu_init(uint32_t addr);
1129 void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
1130 uint8_t *buf, int len, int is_write);
1131 static inline void sparc_iommu_memory_read(void *opaque,
1132 target_phys_addr_t addr,
1133 uint8_t *buf, int len)
1134 {
1135 sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
1136 }
1137
1138 static inline void sparc_iommu_memory_write(void *opaque,
1139 target_phys_addr_t addr,
1140 uint8_t *buf, int len)
1141 {
1142 sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
1143 }
1144
1145 /* tcx.c */
1146 void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
1147 unsigned long vram_offset, int vram_size, int width, int height);
1148
1149 /* slavio_intctl.c */
1150 void *slavio_intctl_init();
1151 void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
1152 void slavio_pic_info(void *opaque);
1153 void slavio_irq_info(void *opaque);
1154 void slavio_pic_set_irq(void *opaque, int irq, int level);
1155 void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
1156
1157 /* loader.c */
1158 int get_image_size(const char *filename);
1159 int load_image(const char *filename, uint8_t *addr);
1160 int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
1161 int load_aout(const char *filename, uint8_t *addr);
1162 int load_uboot(const char *filename, target_ulong *ep, int *is_linux);
1163
1164 /* slavio_timer.c */
1165 void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
1166
1167 /* slavio_serial.c */
1168 SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
1169 void slavio_serial_ms_kbd_init(int base, int irq);
1170
1171 /* slavio_misc.c */
1172 void *slavio_misc_init(uint32_t base, int irq);
1173 void slavio_set_power_fail(void *opaque, int power_failing);
1174
1175 /* esp.c */
1176 void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1177 void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque);
1178 void esp_reset(void *opaque);
1179
1180 /* sparc32_dma.c */
1181 void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu,
1182 void *intctl);
1183 void ledma_set_irq(void *opaque, int isr);
1184 void ledma_memory_read(void *opaque, target_phys_addr_t addr,
1185 uint8_t *buf, int len, int do_bswap);
1186 void ledma_memory_write(void *opaque, target_phys_addr_t addr,
1187 uint8_t *buf, int len, int do_bswap);
1188 void espdma_raise_irq(void *opaque);
1189 void espdma_clear_irq(void *opaque);
1190 void espdma_memory_read(void *opaque, uint8_t *buf, int len);
1191 void espdma_memory_write(void *opaque, uint8_t *buf, int len);
1192 void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque,
1193 void *lance_opaque);
1194
1195 /* cs4231.c */
1196 void cs_init(target_phys_addr_t base, int irq, void *intctl);
1197
1198 /* sun4u.c */
1199 extern QEMUMachine sun4u_machine;
1200
1201 /* NVRAM helpers */
1202 #include "hw/m48t59.h"
1203
1204 void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
1205 uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
1206 void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
1207 uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
1208 void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
1209 uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
1210 void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
1211 const unsigned char *str, uint32_t max);
1212 int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
1213 void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
1214 uint32_t start, uint32_t count);
1215 int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
1216 const unsigned char *arch,
1217 uint32_t RAM_size, int boot_device,
1218 uint32_t kernel_image, uint32_t kernel_size,
1219 const char *cmdline,
1220 uint32_t initrd_image, uint32_t initrd_size,
1221 uint32_t NVRAM_image,
1222 int width, int height, int depth);
1223
1224 /* adb.c */
1225
1226 #define MAX_ADB_DEVICES 16
1227
1228 #define ADB_MAX_OUT_LEN 16
1229
1230 typedef struct ADBDevice ADBDevice;
1231
1232 /* buf = NULL means polling */
1233 typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1234 const uint8_t *buf, int len);
1235 typedef int ADBDeviceReset(ADBDevice *d);
1236
1237 struct ADBDevice {
1238 struct ADBBusState *bus;
1239 int devaddr;
1240 int handler;
1241 ADBDeviceRequest *devreq;
1242 ADBDeviceReset *devreset;
1243 void *opaque;
1244 };
1245
1246 typedef struct ADBBusState {
1247 ADBDevice devices[MAX_ADB_DEVICES];
1248 int nb_devices;
1249 int poll_index;
1250 } ADBBusState;
1251
1252 int adb_request(ADBBusState *s, uint8_t *buf_out,
1253 const uint8_t *buf, int len);
1254 int adb_poll(ADBBusState *s, uint8_t *buf_out);
1255
1256 ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
1257 ADBDeviceRequest *devreq,
1258 ADBDeviceReset *devreset,
1259 void *opaque);
1260 void adb_kbd_init(ADBBusState *bus);
1261 void adb_mouse_init(ADBBusState *bus);
1262
1263 /* cuda.c */
1264
1265 extern ADBBusState adb_bus;
1266 int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
1267
1268 #include "hw/usb.h"
1269
1270 /* usb ports of the VM */
1271
1272 void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1273 usb_attachfn attach);
1274
1275 #define VM_USB_HUB_SIZE 8
1276
1277 void do_usb_add(const char *devname);
1278 void do_usb_del(const char *devname);
1279 void usb_info(void);
1280
1281 /* scsi-disk.c */
1282 enum scsi_reason {
1283 SCSI_REASON_DONE, /* Command complete. */
1284 SCSI_REASON_DATA /* Transfer complete, more data required. */
1285 };
1286
1287 typedef struct SCSIDevice SCSIDevice;
1288 typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag,
1289 uint32_t arg);
1290
1291 SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
1292 int tcq,
1293 scsi_completionfn completion,
1294 void *opaque);
1295 void scsi_disk_destroy(SCSIDevice *s);
1296
1297 int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
1298 /* SCSI data transfers are asynchrnonous. However, unlike the block IO
1299 layer the completion routine may be called directly by
1300 scsi_{read,write}_data. */
1301 void scsi_read_data(SCSIDevice *s, uint32_t tag);
1302 int scsi_write_data(SCSIDevice *s, uint32_t tag);
1303 void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
1304 uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag);
1305
1306 /* lsi53c895a.c */
1307 void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1308 void *lsi_scsi_init(PCIBus *bus, int devfn);
1309
1310 /* integratorcp.c */
1311 extern QEMUMachine integratorcp_machine;
1312
1313 /* versatilepb.c */
1314 extern QEMUMachine versatilepb_machine;
1315 extern QEMUMachine versatileab_machine;
1316
1317 /* realview.c */
1318 extern QEMUMachine realview_machine;
1319
1320 /* ps2.c */
1321 void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1322 void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1323 void ps2_write_mouse(void *, int val);
1324 void ps2_write_keyboard(void *, int val);
1325 uint32_t ps2_read_data(void *);
1326 void ps2_queue(void *, int b);
1327 void ps2_keyboard_set_translation(void *opaque, int mode);
1328
1329 /* smc91c111.c */
1330 void smc91c111_init(NICInfo *, uint32_t, void *, int);
1331
1332 /* pl110.c */
1333 void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
1334
1335 /* pl011.c */
1336 void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1337
1338 /* pl050.c */
1339 void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1340
1341 /* pl080.c */
1342 void *pl080_init(uint32_t base, void *pic, int irq, int nchannels);
1343
1344 /* pl190.c */
1345 void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1346
1347 /* arm-timer.c */
1348 void sp804_init(uint32_t base, void *pic, int irq);
1349 void icp_pit_init(uint32_t base, void *pic, int irq);
1350
1351 /* arm_sysctl.c */
1352 void arm_sysctl_init(uint32_t base, uint32_t sys_id);
1353
1354 /* arm_gic.c */
1355 void *arm_gic_init(uint32_t base, void *parent, int parent_irq);
1356
1357 /* arm_boot.c */
1358
1359 void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename,
1360 const char *kernel_cmdline, const char *initrd_filename,
1361 int board_id);
1362
1363 /* sh7750.c */
1364 struct SH7750State;
1365
1366 struct SH7750State *sh7750_init(CPUState * cpu);
1367
1368 typedef struct {
1369 /* The callback will be triggered if any of the designated lines change */
1370 uint16_t portamask_trigger;
1371 uint16_t portbmask_trigger;
1372 /* Return 0 if no action was taken */
1373 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1374 uint16_t * periph_pdtra,
1375 uint16_t * periph_portdira,
1376 uint16_t * periph_pdtrb,
1377 uint16_t * periph_portdirb);
1378 } sh7750_io_device;
1379
1380 int sh7750_register_io_device(struct SH7750State *s,
1381 sh7750_io_device * device);
1382 /* tc58128.c */
1383 int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1384
1385 /* NOR flash devices */
1386 typedef struct pflash_t pflash_t;
1387
1388 pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1389 BlockDriverState *bs,
1390 target_ulong sector_len, int nb_blocs, int width,
1391 uint16_t id0, uint16_t id1,
1392 uint16_t id2, uint16_t id3);
1393
1394 #include "gdbstub.h"
1395
1396 #endif /* defined(QEMU_TOOL) */
1397
1398 /* monitor.c */
1399 void monitor_init(CharDriverState *hd, int show_banner);
1400 void term_puts(const char *str);
1401 void term_vprintf(const char *fmt, va_list ap);
1402 void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
1403 void term_print_filename(const char *filename);
1404 void term_flush(void);
1405 void term_print_help(void);
1406 void monitor_readline(const char *prompt, int is_password,
1407 char *buf, int buf_size);
1408
1409 /* readline.c */
1410 typedef void ReadLineFunc(void *opaque, const char *str);
1411
1412 extern int completion_index;
1413 void add_completion(const char *str);
1414 void readline_handle_byte(int ch);
1415 void readline_find_completion(const char *cmdline);
1416 const char *readline_get_history(unsigned int index);
1417 void readline_start(const char *prompt, int is_password,
1418 ReadLineFunc *readline_func, void *opaque);
1419
1420 void kqemu_record_dump(void);
1421
1422 #endif /* VL_H */