]> git.proxmox.com Git - qemu.git/blob - vl.h
Dynamic handling of guest mice, by Lonnie Mendez.
[qemu.git] / vl.h
1 /*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #ifndef VL_H
25 #define VL_H
26
27 /* we put basic includes here to avoid repeating them in device drivers */
28 #include <stdlib.h>
29 #include <stdio.h>
30 #include <stdarg.h>
31 #include <string.h>
32 #include <inttypes.h>
33 #include <limits.h>
34 #include <time.h>
35 #include <ctype.h>
36 #include <errno.h>
37 #include <unistd.h>
38 #include <fcntl.h>
39 #include <sys/stat.h>
40
41 #ifndef O_LARGEFILE
42 #define O_LARGEFILE 0
43 #endif
44 #ifndef O_BINARY
45 #define O_BINARY 0
46 #endif
47
48 #ifdef _WIN32
49 #include <windows.h>
50 #define fsync _commit
51 #define lseek _lseeki64
52 #define ENOTSUP 4096
53 #define ENOMEDIUM 4097
54 extern int qemu_ftruncate64(int, int64_t);
55 #define ftruncate qemu_ftruncate64
56
57
58 static inline char *realpath(const char *path, char *resolved_path)
59 {
60 _fullpath(resolved_path, path, _MAX_PATH);
61 return resolved_path;
62 }
63
64 #define PRId64 "I64d"
65 #define PRIx64 "I64x"
66 #define PRIu64 "I64u"
67 #define PRIo64 "I64o"
68 #endif
69
70 #ifdef QEMU_TOOL
71
72 /* we use QEMU_TOOL in the command line tools which do not depend on
73 the target CPU type */
74 #include "config-host.h"
75 #include <setjmp.h>
76 #include "osdep.h"
77 #include "bswap.h"
78
79 #else
80
81 #include "audio/audio.h"
82 #include "cpu.h"
83 #include "gdbstub.h"
84
85 #endif /* !defined(QEMU_TOOL) */
86
87 #ifndef glue
88 #define xglue(x, y) x ## y
89 #define glue(x, y) xglue(x, y)
90 #define stringify(s) tostring(s)
91 #define tostring(s) #s
92 #endif
93
94 #ifndef MIN
95 #define MIN(a, b) (((a) < (b)) ? (a) : (b))
96 #endif
97 #ifndef MAX
98 #define MAX(a, b) (((a) > (b)) ? (a) : (b))
99 #endif
100
101 /* vl.c */
102 uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
103
104 void hw_error(const char *fmt, ...);
105
106 extern const char *bios_dir;
107
108 void pstrcpy(char *buf, int buf_size, const char *str);
109 char *pstrcat(char *buf, int buf_size, const char *s);
110 int strstart(const char *str, const char *val, const char **ptr);
111
112 extern int vm_running;
113
114 typedef struct vm_change_state_entry VMChangeStateEntry;
115 typedef void VMChangeStateHandler(void *opaque, int running);
116 typedef void VMStopHandler(void *opaque, int reason);
117
118 VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
119 void *opaque);
120 void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
121
122 int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
123 void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
124
125 void vm_start(void);
126 void vm_stop(int reason);
127
128 typedef void QEMUResetHandler(void *opaque);
129
130 void qemu_register_reset(QEMUResetHandler *func, void *opaque);
131 void qemu_system_reset_request(void);
132 void qemu_system_shutdown_request(void);
133 void qemu_system_powerdown_request(void);
134 #if !defined(TARGET_SPARC)
135 // Please implement a power failure function to signal the OS
136 #define qemu_system_powerdown() do{}while(0)
137 #else
138 void qemu_system_powerdown(void);
139 #endif
140
141 void main_loop_wait(int timeout);
142
143 extern int ram_size;
144 extern int bios_size;
145 extern int rtc_utc;
146 extern int cirrus_vga_enabled;
147 extern int graphic_width;
148 extern int graphic_height;
149 extern int graphic_depth;
150 extern const char *keyboard_layout;
151 extern int kqemu_allowed;
152 extern int win2k_install_hack;
153 extern int usb_enabled;
154 extern int smp_cpus;
155 extern int no_quit;
156
157 /* XXX: make it dynamic */
158 #if defined (TARGET_PPC) || defined (TARGET_SPARC64)
159 #define BIOS_SIZE ((512 + 32) * 1024)
160 #elif defined(TARGET_MIPS)
161 #define BIOS_SIZE (128 * 1024)
162 #else
163 #define BIOS_SIZE ((256 + 64) * 1024)
164 #endif
165
166 /* keyboard/mouse support */
167
168 #define MOUSE_EVENT_LBUTTON 0x01
169 #define MOUSE_EVENT_RBUTTON 0x02
170 #define MOUSE_EVENT_MBUTTON 0x04
171
172 typedef void QEMUPutKBDEvent(void *opaque, int keycode);
173 typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
174
175 typedef struct QEMUPutMouseEntry {
176 QEMUPutMouseEvent *qemu_put_mouse_event;
177 void *qemu_put_mouse_event_opaque;
178 int qemu_put_mouse_event_absolute;
179 char *qemu_put_mouse_event_name;
180
181 /* used internally by qemu for handling mice */
182 struct QEMUPutMouseEntry *next;
183 } QEMUPutMouseEntry;
184
185 void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
186 QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func,
187 void *opaque, int absolute,
188 const char *name);
189 void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry);
190
191 void kbd_put_keycode(int keycode);
192 void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
193 int kbd_mouse_is_absolute(void);
194
195 void do_info_mice(void);
196 void do_mouse_set(int index);
197
198 /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
199 constants) */
200 #define QEMU_KEY_ESC1(c) ((c) | 0xe100)
201 #define QEMU_KEY_BACKSPACE 0x007f
202 #define QEMU_KEY_UP QEMU_KEY_ESC1('A')
203 #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
204 #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
205 #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
206 #define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
207 #define QEMU_KEY_END QEMU_KEY_ESC1(4)
208 #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
209 #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
210 #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
211
212 #define QEMU_KEY_CTRL_UP 0xe400
213 #define QEMU_KEY_CTRL_DOWN 0xe401
214 #define QEMU_KEY_CTRL_LEFT 0xe402
215 #define QEMU_KEY_CTRL_RIGHT 0xe403
216 #define QEMU_KEY_CTRL_HOME 0xe404
217 #define QEMU_KEY_CTRL_END 0xe405
218 #define QEMU_KEY_CTRL_PAGEUP 0xe406
219 #define QEMU_KEY_CTRL_PAGEDOWN 0xe407
220
221 void kbd_put_keysym(int keysym);
222
223 /* async I/O support */
224
225 typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
226 typedef int IOCanRWHandler(void *opaque);
227 typedef void IOHandler(void *opaque);
228
229 int qemu_set_fd_handler2(int fd,
230 IOCanRWHandler *fd_read_poll,
231 IOHandler *fd_read,
232 IOHandler *fd_write,
233 void *opaque);
234 int qemu_set_fd_handler(int fd,
235 IOHandler *fd_read,
236 IOHandler *fd_write,
237 void *opaque);
238
239 /* Polling handling */
240
241 /* return TRUE if no sleep should be done afterwards */
242 typedef int PollingFunc(void *opaque);
243
244 int qemu_add_polling_cb(PollingFunc *func, void *opaque);
245 void qemu_del_polling_cb(PollingFunc *func, void *opaque);
246
247 #ifdef _WIN32
248 /* Wait objects handling */
249 typedef void WaitObjectFunc(void *opaque);
250
251 int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
252 void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
253 #endif
254
255 /* character device */
256
257 #define CHR_EVENT_BREAK 0 /* serial break char */
258 #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
259
260
261
262 #define CHR_IOCTL_SERIAL_SET_PARAMS 1
263 typedef struct {
264 int speed;
265 int parity;
266 int data_bits;
267 int stop_bits;
268 } QEMUSerialSetParams;
269
270 #define CHR_IOCTL_SERIAL_SET_BREAK 2
271
272 #define CHR_IOCTL_PP_READ_DATA 3
273 #define CHR_IOCTL_PP_WRITE_DATA 4
274 #define CHR_IOCTL_PP_READ_CONTROL 5
275 #define CHR_IOCTL_PP_WRITE_CONTROL 6
276 #define CHR_IOCTL_PP_READ_STATUS 7
277
278 typedef void IOEventHandler(void *opaque, int event);
279
280 typedef struct CharDriverState {
281 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
282 void (*chr_add_read_handler)(struct CharDriverState *s,
283 IOCanRWHandler *fd_can_read,
284 IOReadHandler *fd_read, void *opaque);
285 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
286 IOEventHandler *chr_event;
287 void (*chr_send_event)(struct CharDriverState *chr, int event);
288 void (*chr_close)(struct CharDriverState *chr);
289 void *opaque;
290 } CharDriverState;
291
292 void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
293 int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
294 void qemu_chr_send_event(CharDriverState *s, int event);
295 void qemu_chr_add_read_handler(CharDriverState *s,
296 IOCanRWHandler *fd_can_read,
297 IOReadHandler *fd_read, void *opaque);
298 void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
299 int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
300
301 /* consoles */
302
303 typedef struct DisplayState DisplayState;
304 typedef struct TextConsole TextConsole;
305
306 typedef void (*vga_hw_update_ptr)(void *);
307 typedef void (*vga_hw_invalidate_ptr)(void *);
308 typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
309
310 TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
311 vga_hw_invalidate_ptr invalidate,
312 vga_hw_screen_dump_ptr screen_dump,
313 void *opaque);
314 void vga_hw_update(void);
315 void vga_hw_invalidate(void);
316 void vga_hw_screen_dump(const char *filename);
317
318 int is_graphic_console(void);
319 CharDriverState *text_console_init(DisplayState *ds);
320 void console_select(unsigned int index);
321
322 /* serial ports */
323
324 #define MAX_SERIAL_PORTS 4
325
326 extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
327
328 /* parallel ports */
329
330 #define MAX_PARALLEL_PORTS 3
331
332 extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
333
334 /* VLANs support */
335
336 typedef struct VLANClientState VLANClientState;
337
338 struct VLANClientState {
339 IOReadHandler *fd_read;
340 /* Packets may still be sent if this returns zero. It's used to
341 rate-limit the slirp code. */
342 IOCanRWHandler *fd_can_read;
343 void *opaque;
344 struct VLANClientState *next;
345 struct VLANState *vlan;
346 char info_str[256];
347 };
348
349 typedef struct VLANState {
350 int id;
351 VLANClientState *first_client;
352 struct VLANState *next;
353 } VLANState;
354
355 VLANState *qemu_find_vlan(int id);
356 VLANClientState *qemu_new_vlan_client(VLANState *vlan,
357 IOReadHandler *fd_read,
358 IOCanRWHandler *fd_can_read,
359 void *opaque);
360 int qemu_can_send_packet(VLANClientState *vc);
361 void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
362 void qemu_handler_true(void *opaque);
363
364 void do_info_network(void);
365
366 /* TAP win32 */
367 int tap_win32_init(VLANState *vlan, const char *ifname);
368
369 /* NIC info */
370
371 #define MAX_NICS 8
372
373 typedef struct NICInfo {
374 uint8_t macaddr[6];
375 const char *model;
376 VLANState *vlan;
377 } NICInfo;
378
379 extern int nb_nics;
380 extern NICInfo nd_table[MAX_NICS];
381
382 /* timers */
383
384 typedef struct QEMUClock QEMUClock;
385 typedef struct QEMUTimer QEMUTimer;
386 typedef void QEMUTimerCB(void *opaque);
387
388 /* The real time clock should be used only for stuff which does not
389 change the virtual machine state, as it is run even if the virtual
390 machine is stopped. The real time clock has a frequency of 1000
391 Hz. */
392 extern QEMUClock *rt_clock;
393
394 /* The virtual clock is only run during the emulation. It is stopped
395 when the virtual machine is stopped. Virtual timers use a high
396 precision clock, usually cpu cycles (use ticks_per_sec). */
397 extern QEMUClock *vm_clock;
398
399 int64_t qemu_get_clock(QEMUClock *clock);
400
401 QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
402 void qemu_free_timer(QEMUTimer *ts);
403 void qemu_del_timer(QEMUTimer *ts);
404 void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
405 int qemu_timer_pending(QEMUTimer *ts);
406
407 extern int64_t ticks_per_sec;
408 extern int pit_min_timer_count;
409
410 int64_t cpu_get_ticks(void);
411 void cpu_enable_ticks(void);
412 void cpu_disable_ticks(void);
413
414 /* VM Load/Save */
415
416 typedef struct QEMUFile QEMUFile;
417
418 QEMUFile *qemu_fopen(const char *filename, const char *mode);
419 void qemu_fflush(QEMUFile *f);
420 void qemu_fclose(QEMUFile *f);
421 void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
422 void qemu_put_byte(QEMUFile *f, int v);
423 void qemu_put_be16(QEMUFile *f, unsigned int v);
424 void qemu_put_be32(QEMUFile *f, unsigned int v);
425 void qemu_put_be64(QEMUFile *f, uint64_t v);
426 int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
427 int qemu_get_byte(QEMUFile *f);
428 unsigned int qemu_get_be16(QEMUFile *f);
429 unsigned int qemu_get_be32(QEMUFile *f);
430 uint64_t qemu_get_be64(QEMUFile *f);
431
432 static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
433 {
434 qemu_put_be64(f, *pv);
435 }
436
437 static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
438 {
439 qemu_put_be32(f, *pv);
440 }
441
442 static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
443 {
444 qemu_put_be16(f, *pv);
445 }
446
447 static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
448 {
449 qemu_put_byte(f, *pv);
450 }
451
452 static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
453 {
454 *pv = qemu_get_be64(f);
455 }
456
457 static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
458 {
459 *pv = qemu_get_be32(f);
460 }
461
462 static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
463 {
464 *pv = qemu_get_be16(f);
465 }
466
467 static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
468 {
469 *pv = qemu_get_byte(f);
470 }
471
472 #if TARGET_LONG_BITS == 64
473 #define qemu_put_betl qemu_put_be64
474 #define qemu_get_betl qemu_get_be64
475 #define qemu_put_betls qemu_put_be64s
476 #define qemu_get_betls qemu_get_be64s
477 #else
478 #define qemu_put_betl qemu_put_be32
479 #define qemu_get_betl qemu_get_be32
480 #define qemu_put_betls qemu_put_be32s
481 #define qemu_get_betls qemu_get_be32s
482 #endif
483
484 int64_t qemu_ftell(QEMUFile *f);
485 int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
486
487 typedef void SaveStateHandler(QEMUFile *f, void *opaque);
488 typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
489
490 int register_savevm(const char *idstr,
491 int instance_id,
492 int version_id,
493 SaveStateHandler *save_state,
494 LoadStateHandler *load_state,
495 void *opaque);
496 void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
497 void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
498
499 void cpu_save(QEMUFile *f, void *opaque);
500 int cpu_load(QEMUFile *f, void *opaque, int version_id);
501
502 void do_savevm(const char *name);
503 void do_loadvm(const char *name);
504 void do_delvm(const char *name);
505 void do_info_snapshots(void);
506
507 /* bottom halves */
508 typedef struct QEMUBH QEMUBH;
509 typedef void QEMUBHFunc(void *opaque);
510
511 QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
512 void qemu_bh_schedule(QEMUBH *bh);
513 void qemu_bh_cancel(QEMUBH *bh);
514 void qemu_bh_delete(QEMUBH *bh);
515 int qemu_bh_poll(void);
516
517 /* block.c */
518 typedef struct BlockDriverState BlockDriverState;
519 typedef struct BlockDriver BlockDriver;
520
521 extern BlockDriver bdrv_raw;
522 extern BlockDriver bdrv_host_device;
523 extern BlockDriver bdrv_cow;
524 extern BlockDriver bdrv_qcow;
525 extern BlockDriver bdrv_vmdk;
526 extern BlockDriver bdrv_cloop;
527 extern BlockDriver bdrv_dmg;
528 extern BlockDriver bdrv_bochs;
529 extern BlockDriver bdrv_vpc;
530 extern BlockDriver bdrv_vvfat;
531 extern BlockDriver bdrv_qcow2;
532
533 typedef struct BlockDriverInfo {
534 /* in bytes, 0 if irrelevant */
535 int cluster_size;
536 /* offset at which the VM state can be saved (0 if not possible) */
537 int64_t vm_state_offset;
538 } BlockDriverInfo;
539
540 typedef struct QEMUSnapshotInfo {
541 char id_str[128]; /* unique snapshot id */
542 /* the following fields are informative. They are not needed for
543 the consistency of the snapshot */
544 char name[256]; /* user choosen name */
545 uint32_t vm_state_size; /* VM state info size */
546 uint32_t date_sec; /* UTC date of the snapshot */
547 uint32_t date_nsec;
548 uint64_t vm_clock_nsec; /* VM clock relative to boot */
549 } QEMUSnapshotInfo;
550
551 #define BDRV_O_RDONLY 0x0000
552 #define BDRV_O_RDWR 0x0002
553 #define BDRV_O_ACCESS 0x0003
554 #define BDRV_O_CREAT 0x0004 /* create an empty file */
555 #define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
556 #define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
557 use a disk image format on top of
558 it (default for
559 bdrv_file_open()) */
560
561 void bdrv_init(void);
562 BlockDriver *bdrv_find_format(const char *format_name);
563 int bdrv_create(BlockDriver *drv,
564 const char *filename, int64_t size_in_sectors,
565 const char *backing_file, int flags);
566 BlockDriverState *bdrv_new(const char *device_name);
567 void bdrv_delete(BlockDriverState *bs);
568 int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
569 int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
570 int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
571 BlockDriver *drv);
572 void bdrv_close(BlockDriverState *bs);
573 int bdrv_read(BlockDriverState *bs, int64_t sector_num,
574 uint8_t *buf, int nb_sectors);
575 int bdrv_write(BlockDriverState *bs, int64_t sector_num,
576 const uint8_t *buf, int nb_sectors);
577 int bdrv_pread(BlockDriverState *bs, int64_t offset,
578 void *buf, int count);
579 int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
580 const void *buf, int count);
581 int bdrv_truncate(BlockDriverState *bs, int64_t offset);
582 int64_t bdrv_getlength(BlockDriverState *bs);
583 void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
584 int bdrv_commit(BlockDriverState *bs);
585 void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
586 /* async block I/O */
587 typedef struct BlockDriverAIOCB BlockDriverAIOCB;
588 typedef void BlockDriverCompletionFunc(void *opaque, int ret);
589
590 BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num,
591 uint8_t *buf, int nb_sectors,
592 BlockDriverCompletionFunc *cb, void *opaque);
593 BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num,
594 const uint8_t *buf, int nb_sectors,
595 BlockDriverCompletionFunc *cb, void *opaque);
596 void bdrv_aio_cancel(BlockDriverAIOCB *acb);
597
598 void qemu_aio_init(void);
599 void qemu_aio_poll(void);
600 void qemu_aio_flush(void);
601 void qemu_aio_wait_start(void);
602 void qemu_aio_wait(void);
603 void qemu_aio_wait_end(void);
604
605 /* Ensure contents are flushed to disk. */
606 void bdrv_flush(BlockDriverState *bs);
607
608 #define BDRV_TYPE_HD 0
609 #define BDRV_TYPE_CDROM 1
610 #define BDRV_TYPE_FLOPPY 2
611 #define BIOS_ATA_TRANSLATION_AUTO 0
612 #define BIOS_ATA_TRANSLATION_NONE 1
613 #define BIOS_ATA_TRANSLATION_LBA 2
614
615 void bdrv_set_geometry_hint(BlockDriverState *bs,
616 int cyls, int heads, int secs);
617 void bdrv_set_type_hint(BlockDriverState *bs, int type);
618 void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
619 void bdrv_get_geometry_hint(BlockDriverState *bs,
620 int *pcyls, int *pheads, int *psecs);
621 int bdrv_get_type_hint(BlockDriverState *bs);
622 int bdrv_get_translation_hint(BlockDriverState *bs);
623 int bdrv_is_removable(BlockDriverState *bs);
624 int bdrv_is_read_only(BlockDriverState *bs);
625 int bdrv_is_inserted(BlockDriverState *bs);
626 int bdrv_media_changed(BlockDriverState *bs);
627 int bdrv_is_locked(BlockDriverState *bs);
628 void bdrv_set_locked(BlockDriverState *bs, int locked);
629 void bdrv_eject(BlockDriverState *bs, int eject_flag);
630 void bdrv_set_change_cb(BlockDriverState *bs,
631 void (*change_cb)(void *opaque), void *opaque);
632 void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
633 void bdrv_info(void);
634 BlockDriverState *bdrv_find(const char *name);
635 void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
636 int bdrv_is_encrypted(BlockDriverState *bs);
637 int bdrv_set_key(BlockDriverState *bs, const char *key);
638 void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
639 void *opaque);
640 const char *bdrv_get_device_name(BlockDriverState *bs);
641 int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
642 const uint8_t *buf, int nb_sectors);
643 int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
644
645 void bdrv_get_backing_filename(BlockDriverState *bs,
646 char *filename, int filename_size);
647 int bdrv_snapshot_create(BlockDriverState *bs,
648 QEMUSnapshotInfo *sn_info);
649 int bdrv_snapshot_goto(BlockDriverState *bs,
650 const char *snapshot_id);
651 int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id);
652 int bdrv_snapshot_list(BlockDriverState *bs,
653 QEMUSnapshotInfo **psn_info);
654 char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn);
655
656 char *get_human_readable_size(char *buf, int buf_size, int64_t size);
657 int path_is_absolute(const char *path);
658 void path_combine(char *dest, int dest_size,
659 const char *base_path,
660 const char *filename);
661
662 #ifndef QEMU_TOOL
663
664 typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
665 int boot_device,
666 DisplayState *ds, const char **fd_filename, int snapshot,
667 const char *kernel_filename, const char *kernel_cmdline,
668 const char *initrd_filename);
669
670 typedef struct QEMUMachine {
671 const char *name;
672 const char *desc;
673 QEMUMachineInitFunc *init;
674 struct QEMUMachine *next;
675 } QEMUMachine;
676
677 int qemu_register_machine(QEMUMachine *m);
678
679 typedef void SetIRQFunc(void *opaque, int irq_num, int level);
680 typedef void IRQRequestFunc(void *opaque, int level);
681
682 /* ISA bus */
683
684 extern target_phys_addr_t isa_mem_base;
685
686 typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
687 typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
688
689 int register_ioport_read(int start, int length, int size,
690 IOPortReadFunc *func, void *opaque);
691 int register_ioport_write(int start, int length, int size,
692 IOPortWriteFunc *func, void *opaque);
693 void isa_unassign_ioport(int start, int length);
694
695 void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
696
697 /* PCI bus */
698
699 extern target_phys_addr_t pci_mem_base;
700
701 typedef struct PCIBus PCIBus;
702 typedef struct PCIDevice PCIDevice;
703
704 typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
705 uint32_t address, uint32_t data, int len);
706 typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
707 uint32_t address, int len);
708 typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
709 uint32_t addr, uint32_t size, int type);
710
711 #define PCI_ADDRESS_SPACE_MEM 0x00
712 #define PCI_ADDRESS_SPACE_IO 0x01
713 #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
714
715 typedef struct PCIIORegion {
716 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
717 uint32_t size;
718 uint8_t type;
719 PCIMapIORegionFunc *map_func;
720 } PCIIORegion;
721
722 #define PCI_ROM_SLOT 6
723 #define PCI_NUM_REGIONS 7
724
725 #define PCI_DEVICES_MAX 64
726
727 #define PCI_VENDOR_ID 0x00 /* 16 bits */
728 #define PCI_DEVICE_ID 0x02 /* 16 bits */
729 #define PCI_COMMAND 0x04 /* 16 bits */
730 #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
731 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
732 #define PCI_CLASS_DEVICE 0x0a /* Device class */
733 #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
734 #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
735 #define PCI_MIN_GNT 0x3e /* 8 bits */
736 #define PCI_MAX_LAT 0x3f /* 8 bits */
737
738 struct PCIDevice {
739 /* PCI config space */
740 uint8_t config[256];
741
742 /* the following fields are read only */
743 PCIBus *bus;
744 int devfn;
745 char name[64];
746 PCIIORegion io_regions[PCI_NUM_REGIONS];
747
748 /* do not access the following fields */
749 PCIConfigReadFunc *config_read;
750 PCIConfigWriteFunc *config_write;
751 /* ??? This is a PC-specific hack, and should be removed. */
752 int irq_index;
753
754 /* Current IRQ levels. Used internally by the generic PCI code. */
755 int irq_state[4];
756 };
757
758 PCIDevice *pci_register_device(PCIBus *bus, const char *name,
759 int instance_size, int devfn,
760 PCIConfigReadFunc *config_read,
761 PCIConfigWriteFunc *config_write);
762
763 void pci_register_io_region(PCIDevice *pci_dev, int region_num,
764 uint32_t size, int type,
765 PCIMapIORegionFunc *map_func);
766
767 void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
768
769 uint32_t pci_default_read_config(PCIDevice *d,
770 uint32_t address, int len);
771 void pci_default_write_config(PCIDevice *d,
772 uint32_t address, uint32_t val, int len);
773 void pci_device_save(PCIDevice *s, QEMUFile *f);
774 int pci_device_load(PCIDevice *s, QEMUFile *f);
775
776 typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level);
777 typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
778 PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
779 void *pic, int devfn_min, int nirq);
780
781 void pci_nic_init(PCIBus *bus, NICInfo *nd);
782 void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
783 uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
784 int pci_bus_num(PCIBus *s);
785 void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d));
786
787 void pci_info(void);
788 PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
789 pci_map_irq_fn map_irq, const char *name);
790
791 /* prep_pci.c */
792 PCIBus *pci_prep_init(void);
793
794 /* grackle_pci.c */
795 PCIBus *pci_grackle_init(uint32_t base, void *pic);
796
797 /* unin_pci.c */
798 PCIBus *pci_pmac_init(void *pic);
799
800 /* apb_pci.c */
801 PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
802 void *pic);
803
804 PCIBus *pci_vpb_init(void *pic, int irq, int realview);
805
806 /* piix_pci.c */
807 PCIBus *i440fx_init(PCIDevice **pi440fx_state);
808 void i440fx_set_smm(PCIDevice *d, int val);
809 int piix3_init(PCIBus *bus);
810 void i440fx_init_memory_mappings(PCIDevice *d);
811
812 /* openpic.c */
813 typedef struct openpic_t openpic_t;
814 void openpic_set_irq(void *opaque, int n_IRQ, int level);
815 openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
816 CPUState **envp);
817
818 /* heathrow_pic.c */
819 typedef struct HeathrowPICS HeathrowPICS;
820 void heathrow_pic_set_irq(void *opaque, int num, int level);
821 HeathrowPICS *heathrow_pic_init(int *pmem_index);
822
823 #ifdef HAS_AUDIO
824 struct soundhw {
825 const char *name;
826 const char *descr;
827 int enabled;
828 int isa;
829 union {
830 int (*init_isa) (AudioState *s);
831 int (*init_pci) (PCIBus *bus, AudioState *s);
832 } init;
833 };
834
835 extern struct soundhw soundhw[];
836 #endif
837
838 /* vga.c */
839
840 #define VGA_RAM_SIZE (8192 * 1024)
841
842 struct DisplayState {
843 uint8_t *data;
844 int linesize;
845 int depth;
846 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
847 int width;
848 int height;
849 void *opaque;
850
851 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
852 void (*dpy_resize)(struct DisplayState *s, int w, int h);
853 void (*dpy_refresh)(struct DisplayState *s);
854 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
855 };
856
857 static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
858 {
859 s->dpy_update(s, x, y, w, h);
860 }
861
862 static inline void dpy_resize(DisplayState *s, int w, int h)
863 {
864 s->dpy_resize(s, w, h);
865 }
866
867 int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
868 unsigned long vga_ram_offset, int vga_ram_size);
869 int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
870 unsigned long vga_ram_offset, int vga_ram_size,
871 unsigned long vga_bios_offset, int vga_bios_size);
872
873 /* cirrus_vga.c */
874 void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
875 unsigned long vga_ram_offset, int vga_ram_size);
876 void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
877 unsigned long vga_ram_offset, int vga_ram_size);
878
879 /* sdl.c */
880 void sdl_display_init(DisplayState *ds, int full_screen);
881
882 /* cocoa.m */
883 void cocoa_display_init(DisplayState *ds, int full_screen);
884
885 /* vnc.c */
886 void vnc_display_init(DisplayState *ds, const char *display);
887
888 /* ide.c */
889 #define MAX_DISKS 4
890
891 extern BlockDriverState *bs_table[MAX_DISKS + 1];
892
893 void isa_ide_init(int iobase, int iobase2, int irq,
894 BlockDriverState *hd0, BlockDriverState *hd1);
895 void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
896 int secondary_ide_enabled);
897 void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
898 int pmac_ide_init (BlockDriverState **hd_table,
899 SetIRQFunc *set_irq, void *irq_opaque, int irq);
900
901 /* cdrom.c */
902 int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
903 int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
904
905 /* es1370.c */
906 int es1370_init (PCIBus *bus, AudioState *s);
907
908 /* sb16.c */
909 int SB16_init (AudioState *s);
910
911 /* adlib.c */
912 int Adlib_init (AudioState *s);
913
914 /* gus.c */
915 int GUS_init (AudioState *s);
916
917 /* dma.c */
918 typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
919 int DMA_get_channel_mode (int nchan);
920 int DMA_read_memory (int nchan, void *buf, int pos, int size);
921 int DMA_write_memory (int nchan, void *buf, int pos, int size);
922 void DMA_hold_DREQ (int nchan);
923 void DMA_release_DREQ (int nchan);
924 void DMA_schedule(int nchan);
925 void DMA_run (void);
926 void DMA_init (int high_page_enable);
927 void DMA_register_channel (int nchan,
928 DMA_transfer_handler transfer_handler,
929 void *opaque);
930 /* fdc.c */
931 #define MAX_FD 2
932 extern BlockDriverState *fd_table[MAX_FD];
933
934 typedef struct fdctrl_t fdctrl_t;
935
936 fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
937 uint32_t io_base,
938 BlockDriverState **fds);
939 int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
940
941 /* ne2000.c */
942
943 void isa_ne2000_init(int base, int irq, NICInfo *nd);
944 void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
945
946 /* rtl8139.c */
947
948 void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
949
950 /* pcnet.c */
951
952 void pci_pcnet_init(PCIBus *bus, NICInfo *nd);
953 void pcnet_h_reset(void *opaque);
954 void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque);
955
956
957 /* pckbd.c */
958
959 void kbd_init(void);
960
961 /* mc146818rtc.c */
962
963 typedef struct RTCState RTCState;
964
965 RTCState *rtc_init(int base, int irq);
966 void rtc_set_memory(RTCState *s, int addr, int val);
967 void rtc_set_date(RTCState *s, const struct tm *tm);
968
969 /* serial.c */
970
971 typedef struct SerialState SerialState;
972 SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
973 int base, int irq, CharDriverState *chr);
974 SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
975 target_ulong base, int it_shift,
976 int irq, CharDriverState *chr);
977
978 /* parallel.c */
979
980 typedef struct ParallelState ParallelState;
981 ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
982
983 /* i8259.c */
984
985 typedef struct PicState2 PicState2;
986 extern PicState2 *isa_pic;
987 void pic_set_irq(int irq, int level);
988 void pic_set_irq_new(void *opaque, int irq, int level);
989 PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
990 void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
991 void *alt_irq_opaque);
992 int pic_read_irq(PicState2 *s);
993 void pic_update_irq(PicState2 *s);
994 uint32_t pic_intack_read(PicState2 *s);
995 void pic_info(void);
996 void irq_info(void);
997
998 /* APIC */
999 typedef struct IOAPICState IOAPICState;
1000
1001 int apic_init(CPUState *env);
1002 int apic_get_interrupt(CPUState *env);
1003 IOAPICState *ioapic_init(void);
1004 void ioapic_set_irq(void *opaque, int vector, int level);
1005
1006 /* i8254.c */
1007
1008 #define PIT_FREQ 1193182
1009
1010 typedef struct PITState PITState;
1011
1012 PITState *pit_init(int base, int irq);
1013 void pit_set_gate(PITState *pit, int channel, int val);
1014 int pit_get_gate(PITState *pit, int channel);
1015 int pit_get_initial_count(PITState *pit, int channel);
1016 int pit_get_mode(PITState *pit, int channel);
1017 int pit_get_out(PITState *pit, int channel, int64_t current_time);
1018
1019 /* pcspk.c */
1020 void pcspk_init(PITState *);
1021 int pcspk_audio_init(AudioState *);
1022
1023 /* acpi.c */
1024 extern int acpi_enabled;
1025 void piix4_pm_init(PCIBus *bus, int devfn);
1026 void acpi_bios_init(void);
1027
1028 /* pc.c */
1029 extern QEMUMachine pc_machine;
1030 extern QEMUMachine isapc_machine;
1031 extern int fd_bootchk;
1032
1033 void ioport_set_a20(int enable);
1034 int ioport_get_a20(void);
1035
1036 /* ppc.c */
1037 extern QEMUMachine prep_machine;
1038 extern QEMUMachine core99_machine;
1039 extern QEMUMachine heathrow_machine;
1040
1041 /* mips_r4k.c */
1042 extern QEMUMachine mips_machine;
1043
1044 /* mips_timer.c */
1045 extern void cpu_mips_clock_init(CPUState *);
1046 extern void cpu_mips_irqctrl_init (void);
1047
1048 /* shix.c */
1049 extern QEMUMachine shix_machine;
1050
1051 #ifdef TARGET_PPC
1052 ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
1053 #endif
1054 void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
1055
1056 extern CPUWriteMemoryFunc *PPC_io_write[];
1057 extern CPUReadMemoryFunc *PPC_io_read[];
1058 void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
1059
1060 /* sun4m.c */
1061 extern QEMUMachine sun4m_machine;
1062 void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
1063
1064 /* iommu.c */
1065 void *iommu_init(uint32_t addr);
1066 void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
1067 uint8_t *buf, int len, int is_write);
1068 static inline void sparc_iommu_memory_read(void *opaque,
1069 target_phys_addr_t addr,
1070 uint8_t *buf, int len)
1071 {
1072 sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
1073 }
1074
1075 static inline void sparc_iommu_memory_write(void *opaque,
1076 target_phys_addr_t addr,
1077 uint8_t *buf, int len)
1078 {
1079 sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
1080 }
1081
1082 /* tcx.c */
1083 void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
1084 unsigned long vram_offset, int vram_size, int width, int height);
1085
1086 /* slavio_intctl.c */
1087 void *slavio_intctl_init();
1088 void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
1089 void slavio_pic_info(void *opaque);
1090 void slavio_irq_info(void *opaque);
1091 void slavio_pic_set_irq(void *opaque, int irq, int level);
1092 void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
1093
1094 /* loader.c */
1095 int get_image_size(const char *filename);
1096 int load_image(const char *filename, uint8_t *addr);
1097 int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
1098 int load_aout(const char *filename, uint8_t *addr);
1099
1100 /* slavio_timer.c */
1101 void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
1102
1103 /* slavio_serial.c */
1104 SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
1105 void slavio_serial_ms_kbd_init(int base, int irq);
1106
1107 /* slavio_misc.c */
1108 void *slavio_misc_init(uint32_t base, int irq);
1109 void slavio_set_power_fail(void *opaque, int power_failing);
1110
1111 /* esp.c */
1112 void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1113 void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque);
1114 void esp_reset(void *opaque);
1115
1116 /* sparc32_dma.c */
1117 void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu,
1118 void *intctl);
1119 void ledma_set_irq(void *opaque, int isr);
1120 void ledma_memory_read(void *opaque, target_phys_addr_t addr,
1121 uint8_t *buf, int len, int do_bswap);
1122 void ledma_memory_write(void *opaque, target_phys_addr_t addr,
1123 uint8_t *buf, int len, int do_bswap);
1124 void espdma_raise_irq(void *opaque);
1125 void espdma_clear_irq(void *opaque);
1126 void espdma_memory_read(void *opaque, uint8_t *buf, int len);
1127 void espdma_memory_write(void *opaque, uint8_t *buf, int len);
1128 void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque,
1129 void *lance_opaque);
1130
1131 /* cs4231.c */
1132 void cs_init(target_phys_addr_t base, int irq, void *intctl);
1133
1134 /* sun4u.c */
1135 extern QEMUMachine sun4u_machine;
1136
1137 /* NVRAM helpers */
1138 #include "hw/m48t59.h"
1139
1140 void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
1141 uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
1142 void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
1143 uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
1144 void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
1145 uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
1146 void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
1147 const unsigned char *str, uint32_t max);
1148 int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
1149 void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
1150 uint32_t start, uint32_t count);
1151 int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
1152 const unsigned char *arch,
1153 uint32_t RAM_size, int boot_device,
1154 uint32_t kernel_image, uint32_t kernel_size,
1155 const char *cmdline,
1156 uint32_t initrd_image, uint32_t initrd_size,
1157 uint32_t NVRAM_image,
1158 int width, int height, int depth);
1159
1160 /* adb.c */
1161
1162 #define MAX_ADB_DEVICES 16
1163
1164 #define ADB_MAX_OUT_LEN 16
1165
1166 typedef struct ADBDevice ADBDevice;
1167
1168 /* buf = NULL means polling */
1169 typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1170 const uint8_t *buf, int len);
1171 typedef int ADBDeviceReset(ADBDevice *d);
1172
1173 struct ADBDevice {
1174 struct ADBBusState *bus;
1175 int devaddr;
1176 int handler;
1177 ADBDeviceRequest *devreq;
1178 ADBDeviceReset *devreset;
1179 void *opaque;
1180 };
1181
1182 typedef struct ADBBusState {
1183 ADBDevice devices[MAX_ADB_DEVICES];
1184 int nb_devices;
1185 int poll_index;
1186 } ADBBusState;
1187
1188 int adb_request(ADBBusState *s, uint8_t *buf_out,
1189 const uint8_t *buf, int len);
1190 int adb_poll(ADBBusState *s, uint8_t *buf_out);
1191
1192 ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
1193 ADBDeviceRequest *devreq,
1194 ADBDeviceReset *devreset,
1195 void *opaque);
1196 void adb_kbd_init(ADBBusState *bus);
1197 void adb_mouse_init(ADBBusState *bus);
1198
1199 /* cuda.c */
1200
1201 extern ADBBusState adb_bus;
1202 int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
1203
1204 #include "hw/usb.h"
1205
1206 /* usb ports of the VM */
1207
1208 void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1209 usb_attachfn attach);
1210
1211 #define VM_USB_HUB_SIZE 8
1212
1213 void do_usb_add(const char *devname);
1214 void do_usb_del(const char *devname);
1215 void usb_info(void);
1216
1217 /* scsi-disk.c */
1218 enum scsi_reason {
1219 SCSI_REASON_DONE, /* Command complete. */
1220 SCSI_REASON_DATA /* Transfer complete, more data required. */
1221 };
1222
1223 typedef struct SCSIDevice SCSIDevice;
1224 typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag,
1225 uint32_t arg);
1226
1227 SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
1228 int tcq,
1229 scsi_completionfn completion,
1230 void *opaque);
1231 void scsi_disk_destroy(SCSIDevice *s);
1232
1233 int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
1234 /* SCSI data transfers are asynchrnonous. However, unlike the block IO
1235 layer the completion routine may be called directly by
1236 scsi_{read,write}_data. */
1237 void scsi_read_data(SCSIDevice *s, uint32_t tag);
1238 int scsi_write_data(SCSIDevice *s, uint32_t tag);
1239 void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
1240 uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag);
1241
1242 enum scsi_host_adapters {
1243 SCSI_LSI_53C895A,
1244 SCSI_ESP
1245 };
1246 enum scsi_devices {
1247 SCSI_CDROM,
1248 SCSI_DISK,
1249 SCSI_NONE
1250 };
1251 typedef enum scsi_host_adapters scsi_host_adapters;
1252 typedef enum scsi_devices scsi_devices;
1253 typedef struct SCSIDiskInfo {
1254 scsi_host_adapters adapter;
1255 int id;
1256 scsi_devices device_type;
1257 } SCSIDiskInfo;
1258
1259 #define MAX_SCSI_DISKS 7
1260 extern BlockDriverState *bs_scsi_table[MAX_SCSI_DISKS];
1261 extern SCSIDiskInfo scsi_disks_info[MAX_SCSI_DISKS];
1262
1263 /* lsi53c895a.c */
1264 void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1265 void *lsi_scsi_init(PCIBus *bus, int devfn);
1266 extern int scsi_hba_lsi; // Count of scsi disks/cdrom using this lsi adapter
1267
1268 /* integratorcp.c */
1269 extern QEMUMachine integratorcp926_machine;
1270 extern QEMUMachine integratorcp1026_machine;
1271
1272 /* versatilepb.c */
1273 extern QEMUMachine versatilepb_machine;
1274 extern QEMUMachine versatileab_machine;
1275
1276 /* realview.c */
1277 extern QEMUMachine realview_machine;
1278
1279 /* ps2.c */
1280 void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1281 void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1282 void ps2_write_mouse(void *, int val);
1283 void ps2_write_keyboard(void *, int val);
1284 uint32_t ps2_read_data(void *);
1285 void ps2_queue(void *, int b);
1286 void ps2_keyboard_set_translation(void *opaque, int mode);
1287
1288 /* smc91c111.c */
1289 void smc91c111_init(NICInfo *, uint32_t, void *, int);
1290
1291 /* pl110.c */
1292 void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
1293
1294 /* pl011.c */
1295 void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1296
1297 /* pl050.c */
1298 void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1299
1300 /* pl080.c */
1301 void *pl080_init(uint32_t base, void *pic, int irq, int nchannels);
1302
1303 /* pl190.c */
1304 void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1305
1306 /* arm-timer.c */
1307 void sp804_init(uint32_t base, void *pic, int irq);
1308 void icp_pit_init(uint32_t base, void *pic, int irq);
1309
1310 /* arm_sysctl.c */
1311 void arm_sysctl_init(uint32_t base, uint32_t sys_id);
1312
1313 /* arm_gic.c */
1314 void *arm_gic_init(uint32_t base, void *parent, int parent_irq);
1315
1316 /* arm_boot.c */
1317
1318 void arm_load_kernel(int ram_size, const char *kernel_filename,
1319 const char *kernel_cmdline, const char *initrd_filename,
1320 int board_id);
1321
1322 /* sh7750.c */
1323 struct SH7750State;
1324
1325 struct SH7750State *sh7750_init(CPUState * cpu);
1326
1327 typedef struct {
1328 /* The callback will be triggered if any of the designated lines change */
1329 uint16_t portamask_trigger;
1330 uint16_t portbmask_trigger;
1331 /* Return 0 if no action was taken */
1332 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1333 uint16_t * periph_pdtra,
1334 uint16_t * periph_portdira,
1335 uint16_t * periph_pdtrb,
1336 uint16_t * periph_portdirb);
1337 } sh7750_io_device;
1338
1339 int sh7750_register_io_device(struct SH7750State *s,
1340 sh7750_io_device * device);
1341 /* tc58128.c */
1342 int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1343
1344 /* NOR flash devices */
1345 typedef struct pflash_t pflash_t;
1346
1347 pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1348 BlockDriverState *bs,
1349 target_ulong sector_len, int nb_blocs, int width,
1350 uint16_t id0, uint16_t id1,
1351 uint16_t id2, uint16_t id3);
1352
1353 #endif /* defined(QEMU_TOOL) */
1354
1355 /* monitor.c */
1356 void monitor_init(CharDriverState *hd, int show_banner);
1357 void term_puts(const char *str);
1358 void term_vprintf(const char *fmt, va_list ap);
1359 void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
1360 void term_print_filename(const char *filename);
1361 void term_flush(void);
1362 void term_print_help(void);
1363 void monitor_readline(const char *prompt, int is_password,
1364 char *buf, int buf_size);
1365
1366 /* readline.c */
1367 typedef void ReadLineFunc(void *opaque, const char *str);
1368
1369 extern int completion_index;
1370 void add_completion(const char *str);
1371 void readline_handle_byte(int ch);
1372 void readline_find_completion(const char *cmdline);
1373 const char *readline_get_history(unsigned int index);
1374 void readline_start(const char *prompt, int is_password,
1375 ReadLineFunc *readline_func, void *opaque);
1376
1377 void kqemu_record_dump(void);
1378
1379 #endif /* VL_H */