2 * QEMU System Emulator header
4 * Copyright (c) 2003 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 /* we put basic includes here to avoid repeating them in device drivers */
49 #define ENOMEDIUM 4097
55 #define lseek _lseeki64
57 #define ENOMEDIUM 4097
58 extern int qemu_ftruncate64(int, int64_t);
59 #define ftruncate qemu_ftruncate64
62 static inline char *realpath(const char *path
, char *resolved_path
)
64 _fullpath(resolved_path
, path
, _MAX_PATH
);
76 /* we use QEMU_TOOL in the command line tools which do not depend on
77 the target CPU type */
78 #include "config-host.h"
85 #include "audio/audio.h"
89 #endif /* !defined(QEMU_TOOL) */
92 #define xglue(x, y) x ## y
93 #define glue(x, y) xglue(x, y)
94 #define stringify(s) tostring(s)
95 #define tostring(s) #s
99 #define MIN(a, b) (((a) < (b)) ? (a) : (b))
102 #define MAX(a, b) (((a) > (b)) ? (a) : (b))
106 void pstrcpy(char *buf
, int buf_size
, const char *str
);
107 char *pstrcat(char *buf
, int buf_size
, const char *s
);
108 int strstart(const char *str
, const char *val
, const char **ptr
);
109 int stristart(const char *str
, const char *val
, const char **ptr
);
112 uint64_t muldiv64(uint64_t a
, uint32_t b
, uint32_t c
);
114 void hw_error(const char *fmt
, ...);
116 extern const char *bios_dir
;
118 extern int vm_running
;
120 typedef struct vm_change_state_entry VMChangeStateEntry
;
121 typedef void VMChangeStateHandler(void *opaque
, int running
);
122 typedef void VMStopHandler(void *opaque
, int reason
);
124 VMChangeStateEntry
*qemu_add_vm_change_state_handler(VMChangeStateHandler
*cb
,
126 void qemu_del_vm_change_state_handler(VMChangeStateEntry
*e
);
128 int qemu_add_vm_stop_handler(VMStopHandler
*cb
, void *opaque
);
129 void qemu_del_vm_stop_handler(VMStopHandler
*cb
, void *opaque
);
132 void vm_stop(int reason
);
134 typedef void QEMUResetHandler(void *opaque
);
136 void qemu_register_reset(QEMUResetHandler
*func
, void *opaque
);
137 void qemu_system_reset_request(void);
138 void qemu_system_shutdown_request(void);
139 void qemu_system_powerdown_request(void);
140 #if !defined(TARGET_SPARC)
141 // Please implement a power failure function to signal the OS
142 #define qemu_system_powerdown() do{}while(0)
144 void qemu_system_powerdown(void);
147 void main_loop_wait(int timeout
);
150 extern int bios_size
;
152 extern int cirrus_vga_enabled
;
153 extern int graphic_width
;
154 extern int graphic_height
;
155 extern int graphic_depth
;
156 extern const char *keyboard_layout
;
157 extern int kqemu_allowed
;
158 extern int win2k_install_hack
;
159 extern int usb_enabled
;
162 extern int semihosting_enabled
;
164 #define MAX_OPTION_ROMS 16
165 extern const char *option_rom
[MAX_OPTION_ROMS
];
166 extern int nb_option_roms
;
168 /* XXX: make it dynamic */
169 #if defined (TARGET_PPC) || defined (TARGET_SPARC64)
170 #define BIOS_SIZE ((512 + 32) * 1024)
171 #elif defined(TARGET_MIPS)
172 #define BIOS_SIZE (4 * 1024 * 1024)
174 #define BIOS_SIZE ((256 + 64) * 1024)
177 /* keyboard/mouse support */
179 #define MOUSE_EVENT_LBUTTON 0x01
180 #define MOUSE_EVENT_RBUTTON 0x02
181 #define MOUSE_EVENT_MBUTTON 0x04
183 typedef void QEMUPutKBDEvent(void *opaque
, int keycode
);
184 typedef void QEMUPutMouseEvent(void *opaque
, int dx
, int dy
, int dz
, int buttons_state
);
186 typedef struct QEMUPutMouseEntry
{
187 QEMUPutMouseEvent
*qemu_put_mouse_event
;
188 void *qemu_put_mouse_event_opaque
;
189 int qemu_put_mouse_event_absolute
;
190 char *qemu_put_mouse_event_name
;
192 /* used internally by qemu for handling mice */
193 struct QEMUPutMouseEntry
*next
;
196 void qemu_add_kbd_event_handler(QEMUPutKBDEvent
*func
, void *opaque
);
197 QEMUPutMouseEntry
*qemu_add_mouse_event_handler(QEMUPutMouseEvent
*func
,
198 void *opaque
, int absolute
,
200 void qemu_remove_mouse_event_handler(QEMUPutMouseEntry
*entry
);
202 void kbd_put_keycode(int keycode
);
203 void kbd_mouse_event(int dx
, int dy
, int dz
, int buttons_state
);
204 int kbd_mouse_is_absolute(void);
206 void do_info_mice(void);
207 void do_mouse_set(int index
);
209 /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
211 #define QEMU_KEY_ESC1(c) ((c) | 0xe100)
212 #define QEMU_KEY_BACKSPACE 0x007f
213 #define QEMU_KEY_UP QEMU_KEY_ESC1('A')
214 #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
215 #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
216 #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
217 #define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
218 #define QEMU_KEY_END QEMU_KEY_ESC1(4)
219 #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
220 #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
221 #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
223 #define QEMU_KEY_CTRL_UP 0xe400
224 #define QEMU_KEY_CTRL_DOWN 0xe401
225 #define QEMU_KEY_CTRL_LEFT 0xe402
226 #define QEMU_KEY_CTRL_RIGHT 0xe403
227 #define QEMU_KEY_CTRL_HOME 0xe404
228 #define QEMU_KEY_CTRL_END 0xe405
229 #define QEMU_KEY_CTRL_PAGEUP 0xe406
230 #define QEMU_KEY_CTRL_PAGEDOWN 0xe407
232 void kbd_put_keysym(int keysym
);
234 /* async I/O support */
236 typedef void IOReadHandler(void *opaque
, const uint8_t *buf
, int size
);
237 typedef int IOCanRWHandler(void *opaque
);
238 typedef void IOHandler(void *opaque
);
240 int qemu_set_fd_handler2(int fd
,
241 IOCanRWHandler
*fd_read_poll
,
245 int qemu_set_fd_handler(int fd
,
250 /* Polling handling */
252 /* return TRUE if no sleep should be done afterwards */
253 typedef int PollingFunc(void *opaque
);
255 int qemu_add_polling_cb(PollingFunc
*func
, void *opaque
);
256 void qemu_del_polling_cb(PollingFunc
*func
, void *opaque
);
259 /* Wait objects handling */
260 typedef void WaitObjectFunc(void *opaque
);
262 int qemu_add_wait_object(HANDLE handle
, WaitObjectFunc
*func
, void *opaque
);
263 void qemu_del_wait_object(HANDLE handle
, WaitObjectFunc
*func
, void *opaque
);
266 typedef struct QEMUBH QEMUBH
;
268 /* character device */
270 #define CHR_EVENT_BREAK 0 /* serial break char */
271 #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
272 #define CHR_EVENT_RESET 2 /* new connection established */
275 #define CHR_IOCTL_SERIAL_SET_PARAMS 1
281 } QEMUSerialSetParams
;
283 #define CHR_IOCTL_SERIAL_SET_BREAK 2
285 #define CHR_IOCTL_PP_READ_DATA 3
286 #define CHR_IOCTL_PP_WRITE_DATA 4
287 #define CHR_IOCTL_PP_READ_CONTROL 5
288 #define CHR_IOCTL_PP_WRITE_CONTROL 6
289 #define CHR_IOCTL_PP_READ_STATUS 7
291 typedef void IOEventHandler(void *opaque
, int event
);
293 typedef struct CharDriverState
{
294 int (*chr_write
)(struct CharDriverState
*s
, const uint8_t *buf
, int len
);
295 void (*chr_add_read_handler
)(struct CharDriverState
*s
,
296 IOCanRWHandler
*fd_can_read
,
297 IOReadHandler
*fd_read
, void *opaque
);
298 int (*chr_ioctl
)(struct CharDriverState
*s
, int cmd
, void *arg
);
299 IOEventHandler
*chr_event
;
300 void (*chr_send_event
)(struct CharDriverState
*chr
, int event
);
301 void (*chr_close
)(struct CharDriverState
*chr
);
306 CharDriverState
*qemu_chr_open(const char *filename
);
307 void qemu_chr_printf(CharDriverState
*s
, const char *fmt
, ...);
308 int qemu_chr_write(CharDriverState
*s
, const uint8_t *buf
, int len
);
309 void qemu_chr_send_event(CharDriverState
*s
, int event
);
310 void qemu_chr_add_read_handler(CharDriverState
*s
,
311 IOCanRWHandler
*fd_can_read
,
312 IOReadHandler
*fd_read
, void *opaque
);
313 void qemu_chr_add_event_handler(CharDriverState
*s
, IOEventHandler
*chr_event
);
314 int qemu_chr_ioctl(CharDriverState
*s
, int cmd
, void *arg
);
315 void qemu_chr_reset(CharDriverState
*s
);
319 typedef struct DisplayState DisplayState
;
320 typedef struct TextConsole TextConsole
;
322 typedef void (*vga_hw_update_ptr
)(void *);
323 typedef void (*vga_hw_invalidate_ptr
)(void *);
324 typedef void (*vga_hw_screen_dump_ptr
)(void *, const char *);
326 TextConsole
*graphic_console_init(DisplayState
*ds
, vga_hw_update_ptr update
,
327 vga_hw_invalidate_ptr invalidate
,
328 vga_hw_screen_dump_ptr screen_dump
,
330 void vga_hw_update(void);
331 void vga_hw_invalidate(void);
332 void vga_hw_screen_dump(const char *filename
);
334 int is_graphic_console(void);
335 CharDriverState
*text_console_init(DisplayState
*ds
);
336 void console_select(unsigned int index
);
340 #define MAX_SERIAL_PORTS 4
342 extern CharDriverState
*serial_hds
[MAX_SERIAL_PORTS
];
346 #define MAX_PARALLEL_PORTS 3
348 extern CharDriverState
*parallel_hds
[MAX_PARALLEL_PORTS
];
352 typedef struct VLANClientState VLANClientState
;
354 struct VLANClientState
{
355 IOReadHandler
*fd_read
;
356 /* Packets may still be sent if this returns zero. It's used to
357 rate-limit the slirp code. */
358 IOCanRWHandler
*fd_can_read
;
360 struct VLANClientState
*next
;
361 struct VLANState
*vlan
;
365 typedef struct VLANState
{
367 VLANClientState
*first_client
;
368 struct VLANState
*next
;
371 VLANState
*qemu_find_vlan(int id
);
372 VLANClientState
*qemu_new_vlan_client(VLANState
*vlan
,
373 IOReadHandler
*fd_read
,
374 IOCanRWHandler
*fd_can_read
,
376 int qemu_can_send_packet(VLANClientState
*vc
);
377 void qemu_send_packet(VLANClientState
*vc
, const uint8_t *buf
, int size
);
378 void qemu_handler_true(void *opaque
);
380 void do_info_network(void);
383 int tap_win32_init(VLANState
*vlan
, const char *ifname
);
389 typedef struct NICInfo
{
396 extern NICInfo nd_table
[MAX_NICS
];
400 typedef struct QEMUClock QEMUClock
;
401 typedef struct QEMUTimer QEMUTimer
;
402 typedef void QEMUTimerCB(void *opaque
);
404 /* The real time clock should be used only for stuff which does not
405 change the virtual machine state, as it is run even if the virtual
406 machine is stopped. The real time clock has a frequency of 1000
408 extern QEMUClock
*rt_clock
;
410 /* The virtual clock is only run during the emulation. It is stopped
411 when the virtual machine is stopped. Virtual timers use a high
412 precision clock, usually cpu cycles (use ticks_per_sec). */
413 extern QEMUClock
*vm_clock
;
415 int64_t qemu_get_clock(QEMUClock
*clock
);
417 QEMUTimer
*qemu_new_timer(QEMUClock
*clock
, QEMUTimerCB
*cb
, void *opaque
);
418 void qemu_free_timer(QEMUTimer
*ts
);
419 void qemu_del_timer(QEMUTimer
*ts
);
420 void qemu_mod_timer(QEMUTimer
*ts
, int64_t expire_time
);
421 int qemu_timer_pending(QEMUTimer
*ts
);
423 extern int64_t ticks_per_sec
;
424 extern int pit_min_timer_count
;
426 int64_t cpu_get_ticks(void);
427 void cpu_enable_ticks(void);
428 void cpu_disable_ticks(void);
432 typedef struct QEMUFile QEMUFile
;
434 QEMUFile
*qemu_fopen(const char *filename
, const char *mode
);
435 void qemu_fflush(QEMUFile
*f
);
436 void qemu_fclose(QEMUFile
*f
);
437 void qemu_put_buffer(QEMUFile
*f
, const uint8_t *buf
, int size
);
438 void qemu_put_byte(QEMUFile
*f
, int v
);
439 void qemu_put_be16(QEMUFile
*f
, unsigned int v
);
440 void qemu_put_be32(QEMUFile
*f
, unsigned int v
);
441 void qemu_put_be64(QEMUFile
*f
, uint64_t v
);
442 int qemu_get_buffer(QEMUFile
*f
, uint8_t *buf
, int size
);
443 int qemu_get_byte(QEMUFile
*f
);
444 unsigned int qemu_get_be16(QEMUFile
*f
);
445 unsigned int qemu_get_be32(QEMUFile
*f
);
446 uint64_t qemu_get_be64(QEMUFile
*f
);
448 static inline void qemu_put_be64s(QEMUFile
*f
, const uint64_t *pv
)
450 qemu_put_be64(f
, *pv
);
453 static inline void qemu_put_be32s(QEMUFile
*f
, const uint32_t *pv
)
455 qemu_put_be32(f
, *pv
);
458 static inline void qemu_put_be16s(QEMUFile
*f
, const uint16_t *pv
)
460 qemu_put_be16(f
, *pv
);
463 static inline void qemu_put_8s(QEMUFile
*f
, const uint8_t *pv
)
465 qemu_put_byte(f
, *pv
);
468 static inline void qemu_get_be64s(QEMUFile
*f
, uint64_t *pv
)
470 *pv
= qemu_get_be64(f
);
473 static inline void qemu_get_be32s(QEMUFile
*f
, uint32_t *pv
)
475 *pv
= qemu_get_be32(f
);
478 static inline void qemu_get_be16s(QEMUFile
*f
, uint16_t *pv
)
480 *pv
= qemu_get_be16(f
);
483 static inline void qemu_get_8s(QEMUFile
*f
, uint8_t *pv
)
485 *pv
= qemu_get_byte(f
);
488 #if TARGET_LONG_BITS == 64
489 #define qemu_put_betl qemu_put_be64
490 #define qemu_get_betl qemu_get_be64
491 #define qemu_put_betls qemu_put_be64s
492 #define qemu_get_betls qemu_get_be64s
494 #define qemu_put_betl qemu_put_be32
495 #define qemu_get_betl qemu_get_be32
496 #define qemu_put_betls qemu_put_be32s
497 #define qemu_get_betls qemu_get_be32s
500 int64_t qemu_ftell(QEMUFile
*f
);
501 int64_t qemu_fseek(QEMUFile
*f
, int64_t pos
, int whence
);
503 typedef void SaveStateHandler(QEMUFile
*f
, void *opaque
);
504 typedef int LoadStateHandler(QEMUFile
*f
, void *opaque
, int version_id
);
506 int register_savevm(const char *idstr
,
509 SaveStateHandler
*save_state
,
510 LoadStateHandler
*load_state
,
512 void qemu_get_timer(QEMUFile
*f
, QEMUTimer
*ts
);
513 void qemu_put_timer(QEMUFile
*f
, QEMUTimer
*ts
);
515 void cpu_save(QEMUFile
*f
, void *opaque
);
516 int cpu_load(QEMUFile
*f
, void *opaque
, int version_id
);
518 void do_savevm(const char *name
);
519 void do_loadvm(const char *name
);
520 void do_delvm(const char *name
);
521 void do_info_snapshots(void);
524 typedef void QEMUBHFunc(void *opaque
);
526 QEMUBH
*qemu_bh_new(QEMUBHFunc
*cb
, void *opaque
);
527 void qemu_bh_schedule(QEMUBH
*bh
);
528 void qemu_bh_cancel(QEMUBH
*bh
);
529 void qemu_bh_delete(QEMUBH
*bh
);
530 int qemu_bh_poll(void);
533 typedef struct BlockDriverState BlockDriverState
;
534 typedef struct BlockDriver BlockDriver
;
536 extern BlockDriver bdrv_raw
;
537 extern BlockDriver bdrv_host_device
;
538 extern BlockDriver bdrv_cow
;
539 extern BlockDriver bdrv_qcow
;
540 extern BlockDriver bdrv_vmdk
;
541 extern BlockDriver bdrv_cloop
;
542 extern BlockDriver bdrv_dmg
;
543 extern BlockDriver bdrv_bochs
;
544 extern BlockDriver bdrv_vpc
;
545 extern BlockDriver bdrv_vvfat
;
546 extern BlockDriver bdrv_qcow2
;
548 typedef struct BlockDriverInfo
{
549 /* in bytes, 0 if irrelevant */
551 /* offset at which the VM state can be saved (0 if not possible) */
552 int64_t vm_state_offset
;
555 typedef struct QEMUSnapshotInfo
{
556 char id_str
[128]; /* unique snapshot id */
557 /* the following fields are informative. They are not needed for
558 the consistency of the snapshot */
559 char name
[256]; /* user choosen name */
560 uint32_t vm_state_size
; /* VM state info size */
561 uint32_t date_sec
; /* UTC date of the snapshot */
563 uint64_t vm_clock_nsec
; /* VM clock relative to boot */
566 #define BDRV_O_RDONLY 0x0000
567 #define BDRV_O_RDWR 0x0002
568 #define BDRV_O_ACCESS 0x0003
569 #define BDRV_O_CREAT 0x0004 /* create an empty file */
570 #define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
571 #define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
572 use a disk image format on top of
576 void bdrv_init(void);
577 BlockDriver
*bdrv_find_format(const char *format_name
);
578 int bdrv_create(BlockDriver
*drv
,
579 const char *filename
, int64_t size_in_sectors
,
580 const char *backing_file
, int flags
);
581 BlockDriverState
*bdrv_new(const char *device_name
);
582 void bdrv_delete(BlockDriverState
*bs
);
583 int bdrv_file_open(BlockDriverState
**pbs
, const char *filename
, int flags
);
584 int bdrv_open(BlockDriverState
*bs
, const char *filename
, int flags
);
585 int bdrv_open2(BlockDriverState
*bs
, const char *filename
, int flags
,
587 void bdrv_close(BlockDriverState
*bs
);
588 int bdrv_read(BlockDriverState
*bs
, int64_t sector_num
,
589 uint8_t *buf
, int nb_sectors
);
590 int bdrv_write(BlockDriverState
*bs
, int64_t sector_num
,
591 const uint8_t *buf
, int nb_sectors
);
592 int bdrv_pread(BlockDriverState
*bs
, int64_t offset
,
593 void *buf
, int count
);
594 int bdrv_pwrite(BlockDriverState
*bs
, int64_t offset
,
595 const void *buf
, int count
);
596 int bdrv_truncate(BlockDriverState
*bs
, int64_t offset
);
597 int64_t bdrv_getlength(BlockDriverState
*bs
);
598 void bdrv_get_geometry(BlockDriverState
*bs
, int64_t *nb_sectors_ptr
);
599 int bdrv_commit(BlockDriverState
*bs
);
600 void bdrv_set_boot_sector(BlockDriverState
*bs
, const uint8_t *data
, int size
);
601 /* async block I/O */
602 typedef struct BlockDriverAIOCB BlockDriverAIOCB
;
603 typedef void BlockDriverCompletionFunc(void *opaque
, int ret
);
605 BlockDriverAIOCB
*bdrv_aio_read(BlockDriverState
*bs
, int64_t sector_num
,
606 uint8_t *buf
, int nb_sectors
,
607 BlockDriverCompletionFunc
*cb
, void *opaque
);
608 BlockDriverAIOCB
*bdrv_aio_write(BlockDriverState
*bs
, int64_t sector_num
,
609 const uint8_t *buf
, int nb_sectors
,
610 BlockDriverCompletionFunc
*cb
, void *opaque
);
611 void bdrv_aio_cancel(BlockDriverAIOCB
*acb
);
613 void qemu_aio_init(void);
614 void qemu_aio_poll(void);
615 void qemu_aio_flush(void);
616 void qemu_aio_wait_start(void);
617 void qemu_aio_wait(void);
618 void qemu_aio_wait_end(void);
620 /* Ensure contents are flushed to disk. */
621 void bdrv_flush(BlockDriverState
*bs
);
623 #define BDRV_TYPE_HD 0
624 #define BDRV_TYPE_CDROM 1
625 #define BDRV_TYPE_FLOPPY 2
626 #define BIOS_ATA_TRANSLATION_AUTO 0
627 #define BIOS_ATA_TRANSLATION_NONE 1
628 #define BIOS_ATA_TRANSLATION_LBA 2
629 #define BIOS_ATA_TRANSLATION_LARGE 3
630 #define BIOS_ATA_TRANSLATION_RECHS 4
632 void bdrv_set_geometry_hint(BlockDriverState
*bs
,
633 int cyls
, int heads
, int secs
);
634 void bdrv_set_type_hint(BlockDriverState
*bs
, int type
);
635 void bdrv_set_translation_hint(BlockDriverState
*bs
, int translation
);
636 void bdrv_get_geometry_hint(BlockDriverState
*bs
,
637 int *pcyls
, int *pheads
, int *psecs
);
638 int bdrv_get_type_hint(BlockDriverState
*bs
);
639 int bdrv_get_translation_hint(BlockDriverState
*bs
);
640 int bdrv_is_removable(BlockDriverState
*bs
);
641 int bdrv_is_read_only(BlockDriverState
*bs
);
642 int bdrv_is_inserted(BlockDriverState
*bs
);
643 int bdrv_media_changed(BlockDriverState
*bs
);
644 int bdrv_is_locked(BlockDriverState
*bs
);
645 void bdrv_set_locked(BlockDriverState
*bs
, int locked
);
646 void bdrv_eject(BlockDriverState
*bs
, int eject_flag
);
647 void bdrv_set_change_cb(BlockDriverState
*bs
,
648 void (*change_cb
)(void *opaque
), void *opaque
);
649 void bdrv_get_format(BlockDriverState
*bs
, char *buf
, int buf_size
);
650 void bdrv_info(void);
651 BlockDriverState
*bdrv_find(const char *name
);
652 void bdrv_iterate(void (*it
)(void *opaque
, const char *name
), void *opaque
);
653 int bdrv_is_encrypted(BlockDriverState
*bs
);
654 int bdrv_set_key(BlockDriverState
*bs
, const char *key
);
655 void bdrv_iterate_format(void (*it
)(void *opaque
, const char *name
),
657 const char *bdrv_get_device_name(BlockDriverState
*bs
);
658 int bdrv_write_compressed(BlockDriverState
*bs
, int64_t sector_num
,
659 const uint8_t *buf
, int nb_sectors
);
660 int bdrv_get_info(BlockDriverState
*bs
, BlockDriverInfo
*bdi
);
662 void bdrv_get_backing_filename(BlockDriverState
*bs
,
663 char *filename
, int filename_size
);
664 int bdrv_snapshot_create(BlockDriverState
*bs
,
665 QEMUSnapshotInfo
*sn_info
);
666 int bdrv_snapshot_goto(BlockDriverState
*bs
,
667 const char *snapshot_id
);
668 int bdrv_snapshot_delete(BlockDriverState
*bs
, const char *snapshot_id
);
669 int bdrv_snapshot_list(BlockDriverState
*bs
,
670 QEMUSnapshotInfo
**psn_info
);
671 char *bdrv_snapshot_dump(char *buf
, int buf_size
, QEMUSnapshotInfo
*sn
);
673 char *get_human_readable_size(char *buf
, int buf_size
, int64_t size
);
674 int path_is_absolute(const char *path
);
675 void path_combine(char *dest
, int dest_size
,
676 const char *base_path
,
677 const char *filename
);
681 typedef void QEMUMachineInitFunc(int ram_size
, int vga_ram_size
,
683 DisplayState
*ds
, const char **fd_filename
, int snapshot
,
684 const char *kernel_filename
, const char *kernel_cmdline
,
685 const char *initrd_filename
);
687 typedef struct QEMUMachine
{
690 QEMUMachineInitFunc
*init
;
691 struct QEMUMachine
*next
;
694 int qemu_register_machine(QEMUMachine
*m
);
696 typedef void SetIRQFunc(void *opaque
, int irq_num
, int level
);
697 typedef void IRQRequestFunc(void *opaque
, int level
);
701 extern target_phys_addr_t isa_mem_base
;
703 typedef void (IOPortWriteFunc
)(void *opaque
, uint32_t address
, uint32_t data
);
704 typedef uint32_t (IOPortReadFunc
)(void *opaque
, uint32_t address
);
706 int register_ioport_read(int start
, int length
, int size
,
707 IOPortReadFunc
*func
, void *opaque
);
708 int register_ioport_write(int start
, int length
, int size
,
709 IOPortWriteFunc
*func
, void *opaque
);
710 void isa_unassign_ioport(int start
, int length
);
712 void isa_mmio_init(target_phys_addr_t base
, target_phys_addr_t size
);
716 extern target_phys_addr_t pci_mem_base
;
718 typedef struct PCIBus PCIBus
;
719 typedef struct PCIDevice PCIDevice
;
721 typedef void PCIConfigWriteFunc(PCIDevice
*pci_dev
,
722 uint32_t address
, uint32_t data
, int len
);
723 typedef uint32_t PCIConfigReadFunc(PCIDevice
*pci_dev
,
724 uint32_t address
, int len
);
725 typedef void PCIMapIORegionFunc(PCIDevice
*pci_dev
, int region_num
,
726 uint32_t addr
, uint32_t size
, int type
);
728 #define PCI_ADDRESS_SPACE_MEM 0x00
729 #define PCI_ADDRESS_SPACE_IO 0x01
730 #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
732 typedef struct PCIIORegion
{
733 uint32_t addr
; /* current PCI mapping address. -1 means not mapped */
736 PCIMapIORegionFunc
*map_func
;
739 #define PCI_ROM_SLOT 6
740 #define PCI_NUM_REGIONS 7
742 #define PCI_DEVICES_MAX 64
744 #define PCI_VENDOR_ID 0x00 /* 16 bits */
745 #define PCI_DEVICE_ID 0x02 /* 16 bits */
746 #define PCI_COMMAND 0x04 /* 16 bits */
747 #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
748 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
749 #define PCI_CLASS_DEVICE 0x0a /* Device class */
750 #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
751 #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
752 #define PCI_MIN_GNT 0x3e /* 8 bits */
753 #define PCI_MAX_LAT 0x3f /* 8 bits */
756 /* PCI config space */
759 /* the following fields are read only */
763 PCIIORegion io_regions
[PCI_NUM_REGIONS
];
765 /* do not access the following fields */
766 PCIConfigReadFunc
*config_read
;
767 PCIConfigWriteFunc
*config_write
;
768 /* ??? This is a PC-specific hack, and should be removed. */
771 /* Current IRQ levels. Used internally by the generic PCI code. */
775 PCIDevice
*pci_register_device(PCIBus
*bus
, const char *name
,
776 int instance_size
, int devfn
,
777 PCIConfigReadFunc
*config_read
,
778 PCIConfigWriteFunc
*config_write
);
780 void pci_register_io_region(PCIDevice
*pci_dev
, int region_num
,
781 uint32_t size
, int type
,
782 PCIMapIORegionFunc
*map_func
);
784 void pci_set_irq(PCIDevice
*pci_dev
, int irq_num
, int level
);
786 uint32_t pci_default_read_config(PCIDevice
*d
,
787 uint32_t address
, int len
);
788 void pci_default_write_config(PCIDevice
*d
,
789 uint32_t address
, uint32_t val
, int len
);
790 void pci_device_save(PCIDevice
*s
, QEMUFile
*f
);
791 int pci_device_load(PCIDevice
*s
, QEMUFile
*f
);
793 typedef void (*pci_set_irq_fn
)(void *pic
, int irq_num
, int level
);
794 typedef int (*pci_map_irq_fn
)(PCIDevice
*pci_dev
, int irq_num
);
795 PCIBus
*pci_register_bus(pci_set_irq_fn set_irq
, pci_map_irq_fn map_irq
,
796 void *pic
, int devfn_min
, int nirq
);
798 void pci_nic_init(PCIBus
*bus
, NICInfo
*nd
, int devfn
);
799 void pci_data_write(void *opaque
, uint32_t addr
, uint32_t val
, int len
);
800 uint32_t pci_data_read(void *opaque
, uint32_t addr
, int len
);
801 int pci_bus_num(PCIBus
*s
);
802 void pci_for_each_device(int bus_num
, void (*fn
)(PCIDevice
*d
));
805 PCIBus
*pci_bridge_init(PCIBus
*bus
, int devfn
, uint32_t id
,
806 pci_map_irq_fn map_irq
, const char *name
);
809 PCIBus
*pci_prep_init(void);
812 PCIBus
*pci_grackle_init(uint32_t base
, void *pic
);
815 PCIBus
*pci_pmac_init(void *pic
);
818 PCIBus
*pci_apb_init(target_ulong special_base
, target_ulong mem_base
,
821 PCIBus
*pci_vpb_init(void *pic
, int irq
, int realview
);
824 PCIBus
*i440fx_init(PCIDevice
**pi440fx_state
);
825 void i440fx_set_smm(PCIDevice
*d
, int val
);
826 int piix3_init(PCIBus
*bus
, int devfn
);
827 void i440fx_init_memory_mappings(PCIDevice
*d
);
829 int piix4_init(PCIBus
*bus
, int devfn
);
832 typedef struct openpic_t openpic_t
;
833 void openpic_set_irq(void *opaque
, int n_IRQ
, int level
);
834 openpic_t
*openpic_init (PCIBus
*bus
, int *pmem_index
, int nb_cpus
,
838 typedef struct HeathrowPICS HeathrowPICS
;
839 void heathrow_pic_set_irq(void *opaque
, int num
, int level
);
840 HeathrowPICS
*heathrow_pic_init(int *pmem_index
);
843 PCIBus
*pci_gt64120_init(void *pic
);
852 int (*init_isa
) (AudioState
*s
);
853 int (*init_pci
) (PCIBus
*bus
, AudioState
*s
);
857 extern struct soundhw soundhw
[];
862 #define VGA_RAM_SIZE (8192 * 1024)
864 struct DisplayState
{
868 int bgr
; /* BGR color order instead of RGB. Only valid for depth == 32 */
873 void (*dpy_update
)(struct DisplayState
*s
, int x
, int y
, int w
, int h
);
874 void (*dpy_resize
)(struct DisplayState
*s
, int w
, int h
);
875 void (*dpy_refresh
)(struct DisplayState
*s
);
876 void (*dpy_copy
)(struct DisplayState
*s
, int src_x
, int src_y
, int dst_x
, int dst_y
, int w
, int h
);
879 static inline void dpy_update(DisplayState
*s
, int x
, int y
, int w
, int h
)
881 s
->dpy_update(s
, x
, y
, w
, h
);
884 static inline void dpy_resize(DisplayState
*s
, int w
, int h
)
886 s
->dpy_resize(s
, w
, h
);
889 int isa_vga_init(DisplayState
*ds
, uint8_t *vga_ram_base
,
890 unsigned long vga_ram_offset
, int vga_ram_size
);
891 int pci_vga_init(PCIBus
*bus
, DisplayState
*ds
, uint8_t *vga_ram_base
,
892 unsigned long vga_ram_offset
, int vga_ram_size
,
893 unsigned long vga_bios_offset
, int vga_bios_size
);
896 void pci_cirrus_vga_init(PCIBus
*bus
, DisplayState
*ds
, uint8_t *vga_ram_base
,
897 unsigned long vga_ram_offset
, int vga_ram_size
);
898 void isa_cirrus_vga_init(DisplayState
*ds
, uint8_t *vga_ram_base
,
899 unsigned long vga_ram_offset
, int vga_ram_size
);
902 void sdl_display_init(DisplayState
*ds
, int full_screen
);
905 void cocoa_display_init(DisplayState
*ds
, int full_screen
);
908 void vnc_display_init(DisplayState
*ds
, const char *display
);
913 extern BlockDriverState
*bs_table
[MAX_DISKS
+ 1];
915 void isa_ide_init(int iobase
, int iobase2
, int irq
,
916 BlockDriverState
*hd0
, BlockDriverState
*hd1
);
917 void pci_cmd646_ide_init(PCIBus
*bus
, BlockDriverState
**hd_table
,
918 int secondary_ide_enabled
);
919 void pci_piix3_ide_init(PCIBus
*bus
, BlockDriverState
**hd_table
, int devfn
);
920 int pmac_ide_init (BlockDriverState
**hd_table
,
921 SetIRQFunc
*set_irq
, void *irq_opaque
, int irq
);
924 int cdrom_read_toc(int nb_sectors
, uint8_t *buf
, int msf
, int start_track
);
925 int cdrom_read_toc_raw(int nb_sectors
, uint8_t *buf
, int msf
, int session_num
);
928 int es1370_init (PCIBus
*bus
, AudioState
*s
);
931 int SB16_init (AudioState
*s
);
934 int Adlib_init (AudioState
*s
);
937 int GUS_init (AudioState
*s
);
940 typedef int (*DMA_transfer_handler
) (void *opaque
, int nchan
, int pos
, int size
);
941 int DMA_get_channel_mode (int nchan
);
942 int DMA_read_memory (int nchan
, void *buf
, int pos
, int size
);
943 int DMA_write_memory (int nchan
, void *buf
, int pos
, int size
);
944 void DMA_hold_DREQ (int nchan
);
945 void DMA_release_DREQ (int nchan
);
946 void DMA_schedule(int nchan
);
948 void DMA_init (int high_page_enable
);
949 void DMA_register_channel (int nchan
,
950 DMA_transfer_handler transfer_handler
,
954 extern BlockDriverState
*fd_table
[MAX_FD
];
956 typedef struct fdctrl_t fdctrl_t
;
958 fdctrl_t
*fdctrl_init (int irq_lvl
, int dma_chann
, int mem_mapped
,
960 BlockDriverState
**fds
);
961 int fdctrl_get_drive_type(fdctrl_t
*fdctrl
, int drive_num
);
965 void isa_ne2000_init(int base
, int irq
, NICInfo
*nd
);
966 void pci_ne2000_init(PCIBus
*bus
, NICInfo
*nd
, int devfn
);
970 void pci_rtl8139_init(PCIBus
*bus
, NICInfo
*nd
, int devfn
);
974 void pci_pcnet_init(PCIBus
*bus
, NICInfo
*nd
, int devfn
);
975 void pcnet_h_reset(void *opaque
);
976 void *lance_init(NICInfo
*nd
, uint32_t leaddr
, void *dma_opaque
);
985 typedef struct RTCState RTCState
;
987 RTCState
*rtc_init(int base
, int irq
);
988 void rtc_set_memory(RTCState
*s
, int addr
, int val
);
989 void rtc_set_date(RTCState
*s
, const struct tm
*tm
);
993 typedef struct SerialState SerialState
;
994 SerialState
*serial_init(SetIRQFunc
*set_irq
, void *opaque
,
995 int base
, int irq
, CharDriverState
*chr
);
996 SerialState
*serial_mm_init (SetIRQFunc
*set_irq
, void *opaque
,
997 target_ulong base
, int it_shift
,
998 int irq
, CharDriverState
*chr
);
1002 typedef struct ParallelState ParallelState
;
1003 ParallelState
*parallel_init(int base
, int irq
, CharDriverState
*chr
);
1007 typedef struct PicState2 PicState2
;
1008 extern PicState2
*isa_pic
;
1009 void pic_set_irq(int irq
, int level
);
1010 void pic_set_irq_new(void *opaque
, int irq
, int level
);
1011 PicState2
*pic_init(IRQRequestFunc
*irq_request
, void *irq_request_opaque
);
1012 void pic_set_alt_irq_func(PicState2
*s
, SetIRQFunc
*alt_irq_func
,
1013 void *alt_irq_opaque
);
1014 int pic_read_irq(PicState2
*s
);
1015 void pic_update_irq(PicState2
*s
);
1016 uint32_t pic_intack_read(PicState2
*s
);
1017 void pic_info(void);
1018 void irq_info(void);
1021 typedef struct IOAPICState IOAPICState
;
1023 int apic_init(CPUState
*env
);
1024 int apic_get_interrupt(CPUState
*env
);
1025 IOAPICState
*ioapic_init(void);
1026 void ioapic_set_irq(void *opaque
, int vector
, int level
);
1030 #define PIT_FREQ 1193182
1032 typedef struct PITState PITState
;
1034 PITState
*pit_init(int base
, int irq
);
1035 void pit_set_gate(PITState
*pit
, int channel
, int val
);
1036 int pit_get_gate(PITState
*pit
, int channel
);
1037 int pit_get_initial_count(PITState
*pit
, int channel
);
1038 int pit_get_mode(PITState
*pit
, int channel
);
1039 int pit_get_out(PITState
*pit
, int channel
, int64_t current_time
);
1042 void pcspk_init(PITState
*);
1043 int pcspk_audio_init(AudioState
*);
1046 extern int acpi_enabled
;
1047 void piix4_pm_init(PCIBus
*bus
, int devfn
);
1048 void acpi_bios_init(void);
1051 extern QEMUMachine pc_machine
;
1052 extern QEMUMachine isapc_machine
;
1053 extern int fd_bootchk
;
1055 void ioport_set_a20(int enable
);
1056 int ioport_get_a20(void);
1059 extern QEMUMachine prep_machine
;
1060 extern QEMUMachine core99_machine
;
1061 extern QEMUMachine heathrow_machine
;
1064 extern QEMUMachine mips_machine
;
1067 extern QEMUMachine mips_malta_machine
;
1070 extern void cpu_mips_clock_init(CPUState
*);
1071 extern void cpu_mips_irqctrl_init (void);
1074 extern QEMUMachine shix_machine
;
1077 ppc_tb_t
*cpu_ppc_tb_init (CPUState
*env
, uint32_t freq
);
1079 void PREP_debug_write (void *opaque
, uint32_t addr
, uint32_t val
);
1081 extern CPUWriteMemoryFunc
*PPC_io_write
[];
1082 extern CPUReadMemoryFunc
*PPC_io_read
[];
1083 void PPC_debug_write (void *opaque
, uint32_t addr
, uint32_t val
);
1086 extern QEMUMachine sun4m_machine
;
1087 void pic_set_irq_cpu(int irq
, int level
, unsigned int cpu
);
1090 void *iommu_init(uint32_t addr
);
1091 void sparc_iommu_memory_rw(void *opaque
, target_phys_addr_t addr
,
1092 uint8_t *buf
, int len
, int is_write
);
1093 static inline void sparc_iommu_memory_read(void *opaque
,
1094 target_phys_addr_t addr
,
1095 uint8_t *buf
, int len
)
1097 sparc_iommu_memory_rw(opaque
, addr
, buf
, len
, 0);
1100 static inline void sparc_iommu_memory_write(void *opaque
,
1101 target_phys_addr_t addr
,
1102 uint8_t *buf
, int len
)
1104 sparc_iommu_memory_rw(opaque
, addr
, buf
, len
, 1);
1108 void tcx_init(DisplayState
*ds
, uint32_t addr
, uint8_t *vram_base
,
1109 unsigned long vram_offset
, int vram_size
, int width
, int height
);
1111 /* slavio_intctl.c */
1112 void *slavio_intctl_init();
1113 void slavio_intctl_set_cpu(void *opaque
, unsigned int cpu
, CPUState
*env
);
1114 void slavio_pic_info(void *opaque
);
1115 void slavio_irq_info(void *opaque
);
1116 void slavio_pic_set_irq(void *opaque
, int irq
, int level
);
1117 void slavio_pic_set_irq_cpu(void *opaque
, int irq
, int level
, unsigned int cpu
);
1120 int get_image_size(const char *filename
);
1121 int load_image(const char *filename
, uint8_t *addr
);
1122 int load_elf(const char *filename
, int64_t virt_to_phys_addend
, uint64_t *pentry
);
1123 int load_aout(const char *filename
, uint8_t *addr
);
1125 /* slavio_timer.c */
1126 void slavio_timer_init(uint32_t addr
, int irq
, int mode
, unsigned int cpu
);
1128 /* slavio_serial.c */
1129 SerialState
*slavio_serial_init(int base
, int irq
, CharDriverState
*chr1
, CharDriverState
*chr2
);
1130 void slavio_serial_ms_kbd_init(int base
, int irq
);
1133 void *slavio_misc_init(uint32_t base
, int irq
);
1134 void slavio_set_power_fail(void *opaque
, int power_failing
);
1137 void esp_scsi_attach(void *opaque
, BlockDriverState
*bd
, int id
);
1138 void *esp_init(BlockDriverState
**bd
, uint32_t espaddr
, void *dma_opaque
);
1139 void esp_reset(void *opaque
);
1142 void *sparc32_dma_init(uint32_t daddr
, int espirq
, int leirq
, void *iommu
,
1144 void ledma_set_irq(void *opaque
, int isr
);
1145 void ledma_memory_read(void *opaque
, target_phys_addr_t addr
,
1146 uint8_t *buf
, int len
, int do_bswap
);
1147 void ledma_memory_write(void *opaque
, target_phys_addr_t addr
,
1148 uint8_t *buf
, int len
, int do_bswap
);
1149 void espdma_raise_irq(void *opaque
);
1150 void espdma_clear_irq(void *opaque
);
1151 void espdma_memory_read(void *opaque
, uint8_t *buf
, int len
);
1152 void espdma_memory_write(void *opaque
, uint8_t *buf
, int len
);
1153 void sparc32_dma_set_reset_data(void *opaque
, void *esp_opaque
,
1154 void *lance_opaque
);
1157 void cs_init(target_phys_addr_t base
, int irq
, void *intctl
);
1160 extern QEMUMachine sun4u_machine
;
1163 #include "hw/m48t59.h"
1165 void NVRAM_set_byte (m48t59_t
*nvram
, uint32_t addr
, uint8_t value
);
1166 uint8_t NVRAM_get_byte (m48t59_t
*nvram
, uint32_t addr
);
1167 void NVRAM_set_word (m48t59_t
*nvram
, uint32_t addr
, uint16_t value
);
1168 uint16_t NVRAM_get_word (m48t59_t
*nvram
, uint32_t addr
);
1169 void NVRAM_set_lword (m48t59_t
*nvram
, uint32_t addr
, uint32_t value
);
1170 uint32_t NVRAM_get_lword (m48t59_t
*nvram
, uint32_t addr
);
1171 void NVRAM_set_string (m48t59_t
*nvram
, uint32_t addr
,
1172 const unsigned char *str
, uint32_t max
);
1173 int NVRAM_get_string (m48t59_t
*nvram
, uint8_t *dst
, uint16_t addr
, int max
);
1174 void NVRAM_set_crc (m48t59_t
*nvram
, uint32_t addr
,
1175 uint32_t start
, uint32_t count
);
1176 int PPC_NVRAM_set_params (m48t59_t
*nvram
, uint16_t NVRAM_size
,
1177 const unsigned char *arch
,
1178 uint32_t RAM_size
, int boot_device
,
1179 uint32_t kernel_image
, uint32_t kernel_size
,
1180 const char *cmdline
,
1181 uint32_t initrd_image
, uint32_t initrd_size
,
1182 uint32_t NVRAM_image
,
1183 int width
, int height
, int depth
);
1187 #define MAX_ADB_DEVICES 16
1189 #define ADB_MAX_OUT_LEN 16
1191 typedef struct ADBDevice ADBDevice
;
1193 /* buf = NULL means polling */
1194 typedef int ADBDeviceRequest(ADBDevice
*d
, uint8_t *buf_out
,
1195 const uint8_t *buf
, int len
);
1196 typedef int ADBDeviceReset(ADBDevice
*d
);
1199 struct ADBBusState
*bus
;
1202 ADBDeviceRequest
*devreq
;
1203 ADBDeviceReset
*devreset
;
1207 typedef struct ADBBusState
{
1208 ADBDevice devices
[MAX_ADB_DEVICES
];
1213 int adb_request(ADBBusState
*s
, uint8_t *buf_out
,
1214 const uint8_t *buf
, int len
);
1215 int adb_poll(ADBBusState
*s
, uint8_t *buf_out
);
1217 ADBDevice
*adb_register_device(ADBBusState
*s
, int devaddr
,
1218 ADBDeviceRequest
*devreq
,
1219 ADBDeviceReset
*devreset
,
1221 void adb_kbd_init(ADBBusState
*bus
);
1222 void adb_mouse_init(ADBBusState
*bus
);
1226 extern ADBBusState adb_bus
;
1227 int cuda_init(SetIRQFunc
*set_irq
, void *irq_opaque
, int irq
);
1231 /* usb ports of the VM */
1233 void qemu_register_usb_port(USBPort
*port
, void *opaque
, int index
,
1234 usb_attachfn attach
);
1236 #define VM_USB_HUB_SIZE 8
1238 void do_usb_add(const char *devname
);
1239 void do_usb_del(const char *devname
);
1240 void usb_info(void);
1244 SCSI_REASON_DONE
, /* Command complete. */
1245 SCSI_REASON_DATA
/* Transfer complete, more data required. */
1248 typedef struct SCSIDevice SCSIDevice
;
1249 typedef void (*scsi_completionfn
)(void *opaque
, int reason
, uint32_t tag
,
1252 SCSIDevice
*scsi_disk_init(BlockDriverState
*bdrv
,
1254 scsi_completionfn completion
,
1256 void scsi_disk_destroy(SCSIDevice
*s
);
1258 int32_t scsi_send_command(SCSIDevice
*s
, uint32_t tag
, uint8_t *buf
, int lun
);
1259 /* SCSI data transfers are asynchrnonous. However, unlike the block IO
1260 layer the completion routine may be called directly by
1261 scsi_{read,write}_data. */
1262 void scsi_read_data(SCSIDevice
*s
, uint32_t tag
);
1263 int scsi_write_data(SCSIDevice
*s
, uint32_t tag
);
1264 void scsi_cancel_io(SCSIDevice
*s
, uint32_t tag
);
1265 uint8_t *scsi_get_buf(SCSIDevice
*s
, uint32_t tag
);
1268 void lsi_scsi_attach(void *opaque
, BlockDriverState
*bd
, int id
);
1269 void *lsi_scsi_init(PCIBus
*bus
, int devfn
);
1271 /* integratorcp.c */
1272 extern QEMUMachine integratorcp926_machine
;
1273 extern QEMUMachine integratorcp1026_machine
;
1276 extern QEMUMachine versatilepb_machine
;
1277 extern QEMUMachine versatileab_machine
;
1280 extern QEMUMachine realview_machine
;
1283 void *ps2_kbd_init(void (*update_irq
)(void *, int), void *update_arg
);
1284 void *ps2_mouse_init(void (*update_irq
)(void *, int), void *update_arg
);
1285 void ps2_write_mouse(void *, int val
);
1286 void ps2_write_keyboard(void *, int val
);
1287 uint32_t ps2_read_data(void *);
1288 void ps2_queue(void *, int b
);
1289 void ps2_keyboard_set_translation(void *opaque
, int mode
);
1292 void smc91c111_init(NICInfo
*, uint32_t, void *, int);
1295 void *pl110_init(DisplayState
*ds
, uint32_t base
, void *pic
, int irq
, int);
1298 void pl011_init(uint32_t base
, void *pic
, int irq
, CharDriverState
*chr
);
1301 void pl050_init(uint32_t base
, void *pic
, int irq
, int is_mouse
);
1304 void *pl080_init(uint32_t base
, void *pic
, int irq
, int nchannels
);
1307 void *pl190_init(uint32_t base
, void *parent
, int irq
, int fiq
);
1310 void sp804_init(uint32_t base
, void *pic
, int irq
);
1311 void icp_pit_init(uint32_t base
, void *pic
, int irq
);
1314 void arm_sysctl_init(uint32_t base
, uint32_t sys_id
);
1317 void *arm_gic_init(uint32_t base
, void *parent
, int parent_irq
);
1321 void arm_load_kernel(CPUState
*env
, int ram_size
, const char *kernel_filename
,
1322 const char *kernel_cmdline
, const char *initrd_filename
,
1328 struct SH7750State
*sh7750_init(CPUState
* cpu
);
1331 /* The callback will be triggered if any of the designated lines change */
1332 uint16_t portamask_trigger
;
1333 uint16_t portbmask_trigger
;
1334 /* Return 0 if no action was taken */
1335 int (*port_change_cb
) (uint16_t porta
, uint16_t portb
,
1336 uint16_t * periph_pdtra
,
1337 uint16_t * periph_portdira
,
1338 uint16_t * periph_pdtrb
,
1339 uint16_t * periph_portdirb
);
1342 int sh7750_register_io_device(struct SH7750State
*s
,
1343 sh7750_io_device
* device
);
1345 int tc58128_init(struct SH7750State
*s
, char *zone1
, char *zone2
);
1347 /* NOR flash devices */
1348 typedef struct pflash_t pflash_t
;
1350 pflash_t
*pflash_register (target_ulong base
, ram_addr_t off
,
1351 BlockDriverState
*bs
,
1352 target_ulong sector_len
, int nb_blocs
, int width
,
1353 uint16_t id0
, uint16_t id1
,
1354 uint16_t id2
, uint16_t id3
);
1356 #endif /* defined(QEMU_TOOL) */
1359 void monitor_init(CharDriverState
*hd
, int show_banner
);
1360 void term_puts(const char *str
);
1361 void term_vprintf(const char *fmt
, va_list ap
);
1362 void term_printf(const char *fmt
, ...) __attribute__ ((__format__ (__printf__
, 1, 2)));
1363 void term_print_filename(const char *filename
);
1364 void term_flush(void);
1365 void term_print_help(void);
1366 void monitor_readline(const char *prompt
, int is_password
,
1367 char *buf
, int buf_size
);
1370 typedef void ReadLineFunc(void *opaque
, const char *str
);
1372 extern int completion_index
;
1373 void add_completion(const char *str
);
1374 void readline_handle_byte(int ch
);
1375 void readline_find_completion(const char *cmdline
);
1376 const char *readline_get_history(unsigned int index
);
1377 void readline_start(const char *prompt
, int is_password
,
1378 ReadLineFunc
*readline_func
, void *opaque
);
1380 void kqemu_record_dump(void);