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Revert -disk patch, as requested by Fabrice. The general idea of this
[qemu.git] / vl.h
1 /*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #ifndef VL_H
25 #define VL_H
26
27 /* we put basic includes here to avoid repeating them in device drivers */
28 #include <stdlib.h>
29 #include <stdio.h>
30 #include <stdarg.h>
31 #include <string.h>
32 #include <inttypes.h>
33 #include <limits.h>
34 #include <time.h>
35 #include <ctype.h>
36 #include <errno.h>
37 #include <unistd.h>
38 #include <fcntl.h>
39 #include <sys/stat.h>
40
41 #ifndef O_LARGEFILE
42 #define O_LARGEFILE 0
43 #endif
44 #ifndef O_BINARY
45 #define O_BINARY 0
46 #endif
47
48 #ifdef __sun__
49 #define ENOMEDIUM 4097
50 #endif
51
52 #ifdef _WIN32
53 #include <windows.h>
54 #define fsync _commit
55 #define lseek _lseeki64
56 #define ENOTSUP 4096
57 #define ENOMEDIUM 4097
58 extern int qemu_ftruncate64(int, int64_t);
59 #define ftruncate qemu_ftruncate64
60
61
62 static inline char *realpath(const char *path, char *resolved_path)
63 {
64 _fullpath(resolved_path, path, _MAX_PATH);
65 return resolved_path;
66 }
67
68 #define PRId64 "I64d"
69 #define PRIx64 "I64x"
70 #define PRIu64 "I64u"
71 #define PRIo64 "I64o"
72 #endif
73
74 #ifdef QEMU_TOOL
75
76 /* we use QEMU_TOOL in the command line tools which do not depend on
77 the target CPU type */
78 #include "config-host.h"
79 #include <setjmp.h>
80 #include "osdep.h"
81 #include "bswap.h"
82
83 #else
84
85 #include "audio/audio.h"
86 #include "cpu.h"
87 #include "gdbstub.h"
88
89 #endif /* !defined(QEMU_TOOL) */
90
91 #ifndef glue
92 #define xglue(x, y) x ## y
93 #define glue(x, y) xglue(x, y)
94 #define stringify(s) tostring(s)
95 #define tostring(s) #s
96 #endif
97
98 #ifndef MIN
99 #define MIN(a, b) (((a) < (b)) ? (a) : (b))
100 #endif
101 #ifndef MAX
102 #define MAX(a, b) (((a) > (b)) ? (a) : (b))
103 #endif
104
105 /* vl.c */
106 uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
107
108 void hw_error(const char *fmt, ...);
109
110 extern const char *bios_dir;
111
112 void pstrcpy(char *buf, int buf_size, const char *str);
113 char *pstrcat(char *buf, int buf_size, const char *s);
114 int strstart(const char *str, const char *val, const char **ptr);
115
116 extern int vm_running;
117
118 typedef struct vm_change_state_entry VMChangeStateEntry;
119 typedef void VMChangeStateHandler(void *opaque, int running);
120 typedef void VMStopHandler(void *opaque, int reason);
121
122 VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
123 void *opaque);
124 void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
125
126 int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
127 void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
128
129 void vm_start(void);
130 void vm_stop(int reason);
131
132 typedef void QEMUResetHandler(void *opaque);
133
134 void qemu_register_reset(QEMUResetHandler *func, void *opaque);
135 void qemu_system_reset_request(void);
136 void qemu_system_shutdown_request(void);
137 void qemu_system_powerdown_request(void);
138 #if !defined(TARGET_SPARC)
139 // Please implement a power failure function to signal the OS
140 #define qemu_system_powerdown() do{}while(0)
141 #else
142 void qemu_system_powerdown(void);
143 #endif
144
145 void main_loop_wait(int timeout);
146
147 extern int ram_size;
148 extern int bios_size;
149 extern int rtc_utc;
150 extern int cirrus_vga_enabled;
151 extern int graphic_width;
152 extern int graphic_height;
153 extern int graphic_depth;
154 extern const char *keyboard_layout;
155 extern int kqemu_allowed;
156 extern int win2k_install_hack;
157 extern int usb_enabled;
158 extern int smp_cpus;
159 extern int no_quit;
160
161 #define MAX_OPTION_ROMS 16
162 extern const char *option_rom[MAX_OPTION_ROMS];
163 extern int nb_option_roms;
164
165 /* XXX: make it dynamic */
166 #if defined (TARGET_PPC) || defined (TARGET_SPARC64)
167 #define BIOS_SIZE ((512 + 32) * 1024)
168 #elif defined(TARGET_MIPS)
169 #define BIOS_SIZE (128 * 1024)
170 #else
171 #define BIOS_SIZE ((256 + 64) * 1024)
172 #endif
173
174 /* keyboard/mouse support */
175
176 #define MOUSE_EVENT_LBUTTON 0x01
177 #define MOUSE_EVENT_RBUTTON 0x02
178 #define MOUSE_EVENT_MBUTTON 0x04
179
180 typedef void QEMUPutKBDEvent(void *opaque, int keycode);
181 typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
182
183 typedef struct QEMUPutMouseEntry {
184 QEMUPutMouseEvent *qemu_put_mouse_event;
185 void *qemu_put_mouse_event_opaque;
186 int qemu_put_mouse_event_absolute;
187 char *qemu_put_mouse_event_name;
188
189 /* used internally by qemu for handling mice */
190 struct QEMUPutMouseEntry *next;
191 } QEMUPutMouseEntry;
192
193 void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
194 QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func,
195 void *opaque, int absolute,
196 const char *name);
197 void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry);
198
199 void kbd_put_keycode(int keycode);
200 void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
201 int kbd_mouse_is_absolute(void);
202
203 void do_info_mice(void);
204 void do_mouse_set(int index);
205
206 /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
207 constants) */
208 #define QEMU_KEY_ESC1(c) ((c) | 0xe100)
209 #define QEMU_KEY_BACKSPACE 0x007f
210 #define QEMU_KEY_UP QEMU_KEY_ESC1('A')
211 #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
212 #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
213 #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
214 #define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
215 #define QEMU_KEY_END QEMU_KEY_ESC1(4)
216 #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
217 #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
218 #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
219
220 #define QEMU_KEY_CTRL_UP 0xe400
221 #define QEMU_KEY_CTRL_DOWN 0xe401
222 #define QEMU_KEY_CTRL_LEFT 0xe402
223 #define QEMU_KEY_CTRL_RIGHT 0xe403
224 #define QEMU_KEY_CTRL_HOME 0xe404
225 #define QEMU_KEY_CTRL_END 0xe405
226 #define QEMU_KEY_CTRL_PAGEUP 0xe406
227 #define QEMU_KEY_CTRL_PAGEDOWN 0xe407
228
229 void kbd_put_keysym(int keysym);
230
231 /* async I/O support */
232
233 typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
234 typedef int IOCanRWHandler(void *opaque);
235 typedef void IOHandler(void *opaque);
236
237 int qemu_set_fd_handler2(int fd,
238 IOCanRWHandler *fd_read_poll,
239 IOHandler *fd_read,
240 IOHandler *fd_write,
241 void *opaque);
242 int qemu_set_fd_handler(int fd,
243 IOHandler *fd_read,
244 IOHandler *fd_write,
245 void *opaque);
246
247 /* Polling handling */
248
249 /* return TRUE if no sleep should be done afterwards */
250 typedef int PollingFunc(void *opaque);
251
252 int qemu_add_polling_cb(PollingFunc *func, void *opaque);
253 void qemu_del_polling_cb(PollingFunc *func, void *opaque);
254
255 #ifdef _WIN32
256 /* Wait objects handling */
257 typedef void WaitObjectFunc(void *opaque);
258
259 int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
260 void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
261 #endif
262
263 typedef struct QEMUBH QEMUBH;
264
265 /* character device */
266
267 #define CHR_EVENT_BREAK 0 /* serial break char */
268 #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
269 #define CHR_EVENT_RESET 2 /* new connection established */
270
271
272 #define CHR_IOCTL_SERIAL_SET_PARAMS 1
273 typedef struct {
274 int speed;
275 int parity;
276 int data_bits;
277 int stop_bits;
278 } QEMUSerialSetParams;
279
280 #define CHR_IOCTL_SERIAL_SET_BREAK 2
281
282 #define CHR_IOCTL_PP_READ_DATA 3
283 #define CHR_IOCTL_PP_WRITE_DATA 4
284 #define CHR_IOCTL_PP_READ_CONTROL 5
285 #define CHR_IOCTL_PP_WRITE_CONTROL 6
286 #define CHR_IOCTL_PP_READ_STATUS 7
287
288 typedef void IOEventHandler(void *opaque, int event);
289
290 typedef struct CharDriverState {
291 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
292 void (*chr_add_read_handler)(struct CharDriverState *s,
293 IOCanRWHandler *fd_can_read,
294 IOReadHandler *fd_read, void *opaque);
295 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
296 IOEventHandler *chr_event;
297 void (*chr_send_event)(struct CharDriverState *chr, int event);
298 void (*chr_close)(struct CharDriverState *chr);
299 void *opaque;
300 QEMUBH *bh;
301 } CharDriverState;
302
303 void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
304 int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
305 void qemu_chr_send_event(CharDriverState *s, int event);
306 void qemu_chr_add_read_handler(CharDriverState *s,
307 IOCanRWHandler *fd_can_read,
308 IOReadHandler *fd_read, void *opaque);
309 void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
310 int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
311 void qemu_chr_reset(CharDriverState *s);
312
313 /* consoles */
314
315 typedef struct DisplayState DisplayState;
316 typedef struct TextConsole TextConsole;
317
318 typedef void (*vga_hw_update_ptr)(void *);
319 typedef void (*vga_hw_invalidate_ptr)(void *);
320 typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
321
322 TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
323 vga_hw_invalidate_ptr invalidate,
324 vga_hw_screen_dump_ptr screen_dump,
325 void *opaque);
326 void vga_hw_update(void);
327 void vga_hw_invalidate(void);
328 void vga_hw_screen_dump(const char *filename);
329
330 int is_graphic_console(void);
331 CharDriverState *text_console_init(DisplayState *ds);
332 void console_select(unsigned int index);
333
334 /* serial ports */
335
336 #define MAX_SERIAL_PORTS 4
337
338 extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
339
340 /* parallel ports */
341
342 #define MAX_PARALLEL_PORTS 3
343
344 extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
345
346 /* VLANs support */
347
348 typedef struct VLANClientState VLANClientState;
349
350 struct VLANClientState {
351 IOReadHandler *fd_read;
352 /* Packets may still be sent if this returns zero. It's used to
353 rate-limit the slirp code. */
354 IOCanRWHandler *fd_can_read;
355 void *opaque;
356 struct VLANClientState *next;
357 struct VLANState *vlan;
358 char info_str[256];
359 };
360
361 typedef struct VLANState {
362 int id;
363 VLANClientState *first_client;
364 struct VLANState *next;
365 } VLANState;
366
367 VLANState *qemu_find_vlan(int id);
368 VLANClientState *qemu_new_vlan_client(VLANState *vlan,
369 IOReadHandler *fd_read,
370 IOCanRWHandler *fd_can_read,
371 void *opaque);
372 int qemu_can_send_packet(VLANClientState *vc);
373 void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
374 void qemu_handler_true(void *opaque);
375
376 void do_info_network(void);
377
378 /* TAP win32 */
379 int tap_win32_init(VLANState *vlan, const char *ifname);
380
381 /* NIC info */
382
383 #define MAX_NICS 8
384
385 typedef struct NICInfo {
386 uint8_t macaddr[6];
387 const char *model;
388 VLANState *vlan;
389 } NICInfo;
390
391 extern int nb_nics;
392 extern NICInfo nd_table[MAX_NICS];
393
394 /* timers */
395
396 typedef struct QEMUClock QEMUClock;
397 typedef struct QEMUTimer QEMUTimer;
398 typedef void QEMUTimerCB(void *opaque);
399
400 /* The real time clock should be used only for stuff which does not
401 change the virtual machine state, as it is run even if the virtual
402 machine is stopped. The real time clock has a frequency of 1000
403 Hz. */
404 extern QEMUClock *rt_clock;
405
406 /* The virtual clock is only run during the emulation. It is stopped
407 when the virtual machine is stopped. Virtual timers use a high
408 precision clock, usually cpu cycles (use ticks_per_sec). */
409 extern QEMUClock *vm_clock;
410
411 int64_t qemu_get_clock(QEMUClock *clock);
412
413 QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
414 void qemu_free_timer(QEMUTimer *ts);
415 void qemu_del_timer(QEMUTimer *ts);
416 void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
417 int qemu_timer_pending(QEMUTimer *ts);
418
419 extern int64_t ticks_per_sec;
420 extern int pit_min_timer_count;
421
422 int64_t cpu_get_ticks(void);
423 void cpu_enable_ticks(void);
424 void cpu_disable_ticks(void);
425
426 /* VM Load/Save */
427
428 typedef struct QEMUFile QEMUFile;
429
430 QEMUFile *qemu_fopen(const char *filename, const char *mode);
431 void qemu_fflush(QEMUFile *f);
432 void qemu_fclose(QEMUFile *f);
433 void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
434 void qemu_put_byte(QEMUFile *f, int v);
435 void qemu_put_be16(QEMUFile *f, unsigned int v);
436 void qemu_put_be32(QEMUFile *f, unsigned int v);
437 void qemu_put_be64(QEMUFile *f, uint64_t v);
438 int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
439 int qemu_get_byte(QEMUFile *f);
440 unsigned int qemu_get_be16(QEMUFile *f);
441 unsigned int qemu_get_be32(QEMUFile *f);
442 uint64_t qemu_get_be64(QEMUFile *f);
443
444 static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
445 {
446 qemu_put_be64(f, *pv);
447 }
448
449 static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
450 {
451 qemu_put_be32(f, *pv);
452 }
453
454 static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
455 {
456 qemu_put_be16(f, *pv);
457 }
458
459 static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
460 {
461 qemu_put_byte(f, *pv);
462 }
463
464 static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
465 {
466 *pv = qemu_get_be64(f);
467 }
468
469 static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
470 {
471 *pv = qemu_get_be32(f);
472 }
473
474 static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
475 {
476 *pv = qemu_get_be16(f);
477 }
478
479 static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
480 {
481 *pv = qemu_get_byte(f);
482 }
483
484 #if TARGET_LONG_BITS == 64
485 #define qemu_put_betl qemu_put_be64
486 #define qemu_get_betl qemu_get_be64
487 #define qemu_put_betls qemu_put_be64s
488 #define qemu_get_betls qemu_get_be64s
489 #else
490 #define qemu_put_betl qemu_put_be32
491 #define qemu_get_betl qemu_get_be32
492 #define qemu_put_betls qemu_put_be32s
493 #define qemu_get_betls qemu_get_be32s
494 #endif
495
496 int64_t qemu_ftell(QEMUFile *f);
497 int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
498
499 typedef void SaveStateHandler(QEMUFile *f, void *opaque);
500 typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
501
502 int register_savevm(const char *idstr,
503 int instance_id,
504 int version_id,
505 SaveStateHandler *save_state,
506 LoadStateHandler *load_state,
507 void *opaque);
508 void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
509 void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
510
511 void cpu_save(QEMUFile *f, void *opaque);
512 int cpu_load(QEMUFile *f, void *opaque, int version_id);
513
514 void do_savevm(const char *name);
515 void do_loadvm(const char *name);
516 void do_delvm(const char *name);
517 void do_info_snapshots(void);
518
519 /* bottom halves */
520 typedef void QEMUBHFunc(void *opaque);
521
522 QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
523 void qemu_bh_schedule(QEMUBH *bh);
524 void qemu_bh_cancel(QEMUBH *bh);
525 void qemu_bh_delete(QEMUBH *bh);
526 int qemu_bh_poll(void);
527
528 /* block.c */
529 typedef struct BlockDriverState BlockDriverState;
530 typedef struct BlockDriver BlockDriver;
531
532 extern BlockDriver bdrv_raw;
533 extern BlockDriver bdrv_host_device;
534 extern BlockDriver bdrv_cow;
535 extern BlockDriver bdrv_qcow;
536 extern BlockDriver bdrv_vmdk;
537 extern BlockDriver bdrv_cloop;
538 extern BlockDriver bdrv_dmg;
539 extern BlockDriver bdrv_bochs;
540 extern BlockDriver bdrv_vpc;
541 extern BlockDriver bdrv_vvfat;
542 extern BlockDriver bdrv_qcow2;
543
544 typedef struct BlockDriverInfo {
545 /* in bytes, 0 if irrelevant */
546 int cluster_size;
547 /* offset at which the VM state can be saved (0 if not possible) */
548 int64_t vm_state_offset;
549 } BlockDriverInfo;
550
551 typedef struct QEMUSnapshotInfo {
552 char id_str[128]; /* unique snapshot id */
553 /* the following fields are informative. They are not needed for
554 the consistency of the snapshot */
555 char name[256]; /* user choosen name */
556 uint32_t vm_state_size; /* VM state info size */
557 uint32_t date_sec; /* UTC date of the snapshot */
558 uint32_t date_nsec;
559 uint64_t vm_clock_nsec; /* VM clock relative to boot */
560 } QEMUSnapshotInfo;
561
562 #define BDRV_O_RDONLY 0x0000
563 #define BDRV_O_RDWR 0x0002
564 #define BDRV_O_ACCESS 0x0003
565 #define BDRV_O_CREAT 0x0004 /* create an empty file */
566 #define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
567 #define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
568 use a disk image format on top of
569 it (default for
570 bdrv_file_open()) */
571
572 void bdrv_init(void);
573 BlockDriver *bdrv_find_format(const char *format_name);
574 int bdrv_create(BlockDriver *drv,
575 const char *filename, int64_t size_in_sectors,
576 const char *backing_file, int flags);
577 BlockDriverState *bdrv_new(const char *device_name);
578 void bdrv_delete(BlockDriverState *bs);
579 int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
580 int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
581 int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
582 BlockDriver *drv);
583 void bdrv_close(BlockDriverState *bs);
584 int bdrv_read(BlockDriverState *bs, int64_t sector_num,
585 uint8_t *buf, int nb_sectors);
586 int bdrv_write(BlockDriverState *bs, int64_t sector_num,
587 const uint8_t *buf, int nb_sectors);
588 int bdrv_pread(BlockDriverState *bs, int64_t offset,
589 void *buf, int count);
590 int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
591 const void *buf, int count);
592 int bdrv_truncate(BlockDriverState *bs, int64_t offset);
593 int64_t bdrv_getlength(BlockDriverState *bs);
594 void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
595 int bdrv_commit(BlockDriverState *bs);
596 void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
597 /* async block I/O */
598 typedef struct BlockDriverAIOCB BlockDriverAIOCB;
599 typedef void BlockDriverCompletionFunc(void *opaque, int ret);
600
601 BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num,
602 uint8_t *buf, int nb_sectors,
603 BlockDriverCompletionFunc *cb, void *opaque);
604 BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num,
605 const uint8_t *buf, int nb_sectors,
606 BlockDriverCompletionFunc *cb, void *opaque);
607 void bdrv_aio_cancel(BlockDriverAIOCB *acb);
608
609 void qemu_aio_init(void);
610 void qemu_aio_poll(void);
611 void qemu_aio_flush(void);
612 void qemu_aio_wait_start(void);
613 void qemu_aio_wait(void);
614 void qemu_aio_wait_end(void);
615
616 /* Ensure contents are flushed to disk. */
617 void bdrv_flush(BlockDriverState *bs);
618
619 #define BDRV_TYPE_HD 0
620 #define BDRV_TYPE_CDROM 1
621 #define BDRV_TYPE_FLOPPY 2
622 #define BIOS_ATA_TRANSLATION_AUTO 0
623 #define BIOS_ATA_TRANSLATION_NONE 1
624 #define BIOS_ATA_TRANSLATION_LBA 2
625 #define BIOS_ATA_TRANSLATION_LARGE 3
626 #define BIOS_ATA_TRANSLATION_RECHS 4
627
628 void bdrv_set_geometry_hint(BlockDriverState *bs,
629 int cyls, int heads, int secs);
630 void bdrv_set_type_hint(BlockDriverState *bs, int type);
631 void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
632 void bdrv_get_geometry_hint(BlockDriverState *bs,
633 int *pcyls, int *pheads, int *psecs);
634 int bdrv_get_type_hint(BlockDriverState *bs);
635 int bdrv_get_translation_hint(BlockDriverState *bs);
636 int bdrv_is_removable(BlockDriverState *bs);
637 int bdrv_is_read_only(BlockDriverState *bs);
638 int bdrv_is_inserted(BlockDriverState *bs);
639 int bdrv_media_changed(BlockDriverState *bs);
640 int bdrv_is_locked(BlockDriverState *bs);
641 void bdrv_set_locked(BlockDriverState *bs, int locked);
642 void bdrv_eject(BlockDriverState *bs, int eject_flag);
643 void bdrv_set_change_cb(BlockDriverState *bs,
644 void (*change_cb)(void *opaque), void *opaque);
645 void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
646 void bdrv_info(void);
647 BlockDriverState *bdrv_find(const char *name);
648 void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
649 int bdrv_is_encrypted(BlockDriverState *bs);
650 int bdrv_set_key(BlockDriverState *bs, const char *key);
651 void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
652 void *opaque);
653 const char *bdrv_get_device_name(BlockDriverState *bs);
654 int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
655 const uint8_t *buf, int nb_sectors);
656 int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
657
658 void bdrv_get_backing_filename(BlockDriverState *bs,
659 char *filename, int filename_size);
660 int bdrv_snapshot_create(BlockDriverState *bs,
661 QEMUSnapshotInfo *sn_info);
662 int bdrv_snapshot_goto(BlockDriverState *bs,
663 const char *snapshot_id);
664 int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id);
665 int bdrv_snapshot_list(BlockDriverState *bs,
666 QEMUSnapshotInfo **psn_info);
667 char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn);
668
669 char *get_human_readable_size(char *buf, int buf_size, int64_t size);
670 int path_is_absolute(const char *path);
671 void path_combine(char *dest, int dest_size,
672 const char *base_path,
673 const char *filename);
674
675 #ifndef QEMU_TOOL
676
677 typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
678 int boot_device,
679 DisplayState *ds, const char **fd_filename, int snapshot,
680 const char *kernel_filename, const char *kernel_cmdline,
681 const char *initrd_filename);
682
683 typedef struct QEMUMachine {
684 const char *name;
685 const char *desc;
686 QEMUMachineInitFunc *init;
687 struct QEMUMachine *next;
688 } QEMUMachine;
689
690 int qemu_register_machine(QEMUMachine *m);
691
692 typedef void SetIRQFunc(void *opaque, int irq_num, int level);
693 typedef void IRQRequestFunc(void *opaque, int level);
694
695 /* ISA bus */
696
697 extern target_phys_addr_t isa_mem_base;
698
699 typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
700 typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
701
702 int register_ioport_read(int start, int length, int size,
703 IOPortReadFunc *func, void *opaque);
704 int register_ioport_write(int start, int length, int size,
705 IOPortWriteFunc *func, void *opaque);
706 void isa_unassign_ioport(int start, int length);
707
708 void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
709
710 /* PCI bus */
711
712 extern target_phys_addr_t pci_mem_base;
713
714 typedef struct PCIBus PCIBus;
715 typedef struct PCIDevice PCIDevice;
716
717 typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
718 uint32_t address, uint32_t data, int len);
719 typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
720 uint32_t address, int len);
721 typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
722 uint32_t addr, uint32_t size, int type);
723
724 #define PCI_ADDRESS_SPACE_MEM 0x00
725 #define PCI_ADDRESS_SPACE_IO 0x01
726 #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
727
728 typedef struct PCIIORegion {
729 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
730 uint32_t size;
731 uint8_t type;
732 PCIMapIORegionFunc *map_func;
733 } PCIIORegion;
734
735 #define PCI_ROM_SLOT 6
736 #define PCI_NUM_REGIONS 7
737
738 #define PCI_DEVICES_MAX 64
739
740 #define PCI_VENDOR_ID 0x00 /* 16 bits */
741 #define PCI_DEVICE_ID 0x02 /* 16 bits */
742 #define PCI_COMMAND 0x04 /* 16 bits */
743 #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
744 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
745 #define PCI_CLASS_DEVICE 0x0a /* Device class */
746 #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
747 #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
748 #define PCI_MIN_GNT 0x3e /* 8 bits */
749 #define PCI_MAX_LAT 0x3f /* 8 bits */
750
751 struct PCIDevice {
752 /* PCI config space */
753 uint8_t config[256];
754
755 /* the following fields are read only */
756 PCIBus *bus;
757 int devfn;
758 char name[64];
759 PCIIORegion io_regions[PCI_NUM_REGIONS];
760
761 /* do not access the following fields */
762 PCIConfigReadFunc *config_read;
763 PCIConfigWriteFunc *config_write;
764 /* ??? This is a PC-specific hack, and should be removed. */
765 int irq_index;
766
767 /* Current IRQ levels. Used internally by the generic PCI code. */
768 int irq_state[4];
769 };
770
771 PCIDevice *pci_register_device(PCIBus *bus, const char *name,
772 int instance_size, int devfn,
773 PCIConfigReadFunc *config_read,
774 PCIConfigWriteFunc *config_write);
775
776 void pci_register_io_region(PCIDevice *pci_dev, int region_num,
777 uint32_t size, int type,
778 PCIMapIORegionFunc *map_func);
779
780 void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
781
782 uint32_t pci_default_read_config(PCIDevice *d,
783 uint32_t address, int len);
784 void pci_default_write_config(PCIDevice *d,
785 uint32_t address, uint32_t val, int len);
786 void pci_device_save(PCIDevice *s, QEMUFile *f);
787 int pci_device_load(PCIDevice *s, QEMUFile *f);
788
789 typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level);
790 typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
791 PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
792 void *pic, int devfn_min, int nirq);
793
794 void pci_nic_init(PCIBus *bus, NICInfo *nd);
795 void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
796 uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
797 int pci_bus_num(PCIBus *s);
798 void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d));
799
800 void pci_info(void);
801 PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
802 pci_map_irq_fn map_irq, const char *name);
803
804 /* prep_pci.c */
805 PCIBus *pci_prep_init(void);
806
807 /* grackle_pci.c */
808 PCIBus *pci_grackle_init(uint32_t base, void *pic);
809
810 /* unin_pci.c */
811 PCIBus *pci_pmac_init(void *pic);
812
813 /* apb_pci.c */
814 PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
815 void *pic);
816
817 PCIBus *pci_vpb_init(void *pic, int irq, int realview);
818
819 /* piix_pci.c */
820 PCIBus *i440fx_init(PCIDevice **pi440fx_state);
821 void i440fx_set_smm(PCIDevice *d, int val);
822 int piix3_init(PCIBus *bus);
823 void i440fx_init_memory_mappings(PCIDevice *d);
824
825 /* openpic.c */
826 typedef struct openpic_t openpic_t;
827 void openpic_set_irq(void *opaque, int n_IRQ, int level);
828 openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
829 CPUState **envp);
830
831 /* heathrow_pic.c */
832 typedef struct HeathrowPICS HeathrowPICS;
833 void heathrow_pic_set_irq(void *opaque, int num, int level);
834 HeathrowPICS *heathrow_pic_init(int *pmem_index);
835
836 #ifdef HAS_AUDIO
837 struct soundhw {
838 const char *name;
839 const char *descr;
840 int enabled;
841 int isa;
842 union {
843 int (*init_isa) (AudioState *s);
844 int (*init_pci) (PCIBus *bus, AudioState *s);
845 } init;
846 };
847
848 extern struct soundhw soundhw[];
849 #endif
850
851 /* vga.c */
852
853 #define VGA_RAM_SIZE (8192 * 1024)
854
855 struct DisplayState {
856 uint8_t *data;
857 int linesize;
858 int depth;
859 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
860 int width;
861 int height;
862 void *opaque;
863
864 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
865 void (*dpy_resize)(struct DisplayState *s, int w, int h);
866 void (*dpy_refresh)(struct DisplayState *s);
867 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
868 };
869
870 static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
871 {
872 s->dpy_update(s, x, y, w, h);
873 }
874
875 static inline void dpy_resize(DisplayState *s, int w, int h)
876 {
877 s->dpy_resize(s, w, h);
878 }
879
880 int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
881 unsigned long vga_ram_offset, int vga_ram_size);
882 int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
883 unsigned long vga_ram_offset, int vga_ram_size,
884 unsigned long vga_bios_offset, int vga_bios_size);
885
886 /* cirrus_vga.c */
887 void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
888 unsigned long vga_ram_offset, int vga_ram_size);
889 void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
890 unsigned long vga_ram_offset, int vga_ram_size);
891
892 /* sdl.c */
893 void sdl_display_init(DisplayState *ds, int full_screen);
894
895 /* cocoa.m */
896 void cocoa_display_init(DisplayState *ds, int full_screen);
897
898 /* vnc.c */
899 void vnc_display_init(DisplayState *ds, const char *display);
900
901 /* ide.c */
902 #define MAX_DISKS 4
903
904 extern BlockDriverState *bs_table[MAX_DISKS + 1];
905
906 void isa_ide_init(int iobase, int iobase2, int irq,
907 BlockDriverState *hd0, BlockDriverState *hd1);
908 void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
909 int secondary_ide_enabled);
910 void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
911 int pmac_ide_init (BlockDriverState **hd_table,
912 SetIRQFunc *set_irq, void *irq_opaque, int irq);
913
914 /* cdrom.c */
915 int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
916 int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
917
918 /* es1370.c */
919 int es1370_init (PCIBus *bus, AudioState *s);
920
921 /* sb16.c */
922 int SB16_init (AudioState *s);
923
924 /* adlib.c */
925 int Adlib_init (AudioState *s);
926
927 /* gus.c */
928 int GUS_init (AudioState *s);
929
930 /* dma.c */
931 typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
932 int DMA_get_channel_mode (int nchan);
933 int DMA_read_memory (int nchan, void *buf, int pos, int size);
934 int DMA_write_memory (int nchan, void *buf, int pos, int size);
935 void DMA_hold_DREQ (int nchan);
936 void DMA_release_DREQ (int nchan);
937 void DMA_schedule(int nchan);
938 void DMA_run (void);
939 void DMA_init (int high_page_enable);
940 void DMA_register_channel (int nchan,
941 DMA_transfer_handler transfer_handler,
942 void *opaque);
943 /* fdc.c */
944 #define MAX_FD 2
945 extern BlockDriverState *fd_table[MAX_FD];
946
947 typedef struct fdctrl_t fdctrl_t;
948
949 fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
950 uint32_t io_base,
951 BlockDriverState **fds);
952 int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
953
954 /* ne2000.c */
955
956 void isa_ne2000_init(int base, int irq, NICInfo *nd);
957 void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
958
959 /* rtl8139.c */
960
961 void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
962
963 /* pcnet.c */
964
965 void pci_pcnet_init(PCIBus *bus, NICInfo *nd);
966 void pcnet_h_reset(void *opaque);
967 void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque);
968
969
970 /* pckbd.c */
971
972 void kbd_init(void);
973
974 /* mc146818rtc.c */
975
976 typedef struct RTCState RTCState;
977
978 RTCState *rtc_init(int base, int irq);
979 void rtc_set_memory(RTCState *s, int addr, int val);
980 void rtc_set_date(RTCState *s, const struct tm *tm);
981
982 /* serial.c */
983
984 typedef struct SerialState SerialState;
985 SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
986 int base, int irq, CharDriverState *chr);
987 SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
988 target_ulong base, int it_shift,
989 int irq, CharDriverState *chr);
990
991 /* parallel.c */
992
993 typedef struct ParallelState ParallelState;
994 ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
995
996 /* i8259.c */
997
998 typedef struct PicState2 PicState2;
999 extern PicState2 *isa_pic;
1000 void pic_set_irq(int irq, int level);
1001 void pic_set_irq_new(void *opaque, int irq, int level);
1002 PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
1003 void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
1004 void *alt_irq_opaque);
1005 int pic_read_irq(PicState2 *s);
1006 void pic_update_irq(PicState2 *s);
1007 uint32_t pic_intack_read(PicState2 *s);
1008 void pic_info(void);
1009 void irq_info(void);
1010
1011 /* APIC */
1012 typedef struct IOAPICState IOAPICState;
1013
1014 int apic_init(CPUState *env);
1015 int apic_get_interrupt(CPUState *env);
1016 IOAPICState *ioapic_init(void);
1017 void ioapic_set_irq(void *opaque, int vector, int level);
1018
1019 /* i8254.c */
1020
1021 #define PIT_FREQ 1193182
1022
1023 typedef struct PITState PITState;
1024
1025 PITState *pit_init(int base, int irq);
1026 void pit_set_gate(PITState *pit, int channel, int val);
1027 int pit_get_gate(PITState *pit, int channel);
1028 int pit_get_initial_count(PITState *pit, int channel);
1029 int pit_get_mode(PITState *pit, int channel);
1030 int pit_get_out(PITState *pit, int channel, int64_t current_time);
1031
1032 /* pcspk.c */
1033 void pcspk_init(PITState *);
1034 int pcspk_audio_init(AudioState *);
1035
1036 /* acpi.c */
1037 extern int acpi_enabled;
1038 void piix4_pm_init(PCIBus *bus, int devfn);
1039 void acpi_bios_init(void);
1040
1041 /* pc.c */
1042 extern QEMUMachine pc_machine;
1043 extern QEMUMachine isapc_machine;
1044 extern int fd_bootchk;
1045
1046 void ioport_set_a20(int enable);
1047 int ioport_get_a20(void);
1048
1049 /* ppc.c */
1050 extern QEMUMachine prep_machine;
1051 extern QEMUMachine core99_machine;
1052 extern QEMUMachine heathrow_machine;
1053
1054 /* mips_r4k.c */
1055 extern QEMUMachine mips_machine;
1056
1057 /* mips_timer.c */
1058 extern void cpu_mips_clock_init(CPUState *);
1059 extern void cpu_mips_irqctrl_init (void);
1060
1061 /* shix.c */
1062 extern QEMUMachine shix_machine;
1063
1064 #ifdef TARGET_PPC
1065 ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
1066 #endif
1067 void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
1068
1069 extern CPUWriteMemoryFunc *PPC_io_write[];
1070 extern CPUReadMemoryFunc *PPC_io_read[];
1071 void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
1072
1073 /* sun4m.c */
1074 extern QEMUMachine sun4m_machine;
1075 void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
1076
1077 /* iommu.c */
1078 void *iommu_init(uint32_t addr);
1079 void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
1080 uint8_t *buf, int len, int is_write);
1081 static inline void sparc_iommu_memory_read(void *opaque,
1082 target_phys_addr_t addr,
1083 uint8_t *buf, int len)
1084 {
1085 sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
1086 }
1087
1088 static inline void sparc_iommu_memory_write(void *opaque,
1089 target_phys_addr_t addr,
1090 uint8_t *buf, int len)
1091 {
1092 sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
1093 }
1094
1095 /* tcx.c */
1096 void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
1097 unsigned long vram_offset, int vram_size, int width, int height);
1098
1099 /* slavio_intctl.c */
1100 void *slavio_intctl_init();
1101 void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
1102 void slavio_pic_info(void *opaque);
1103 void slavio_irq_info(void *opaque);
1104 void slavio_pic_set_irq(void *opaque, int irq, int level);
1105 void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
1106
1107 /* loader.c */
1108 int get_image_size(const char *filename);
1109 int load_image(const char *filename, uint8_t *addr);
1110 int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
1111 int load_aout(const char *filename, uint8_t *addr);
1112
1113 /* slavio_timer.c */
1114 void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
1115
1116 /* slavio_serial.c */
1117 SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
1118 void slavio_serial_ms_kbd_init(int base, int irq);
1119
1120 /* slavio_misc.c */
1121 void *slavio_misc_init(uint32_t base, int irq);
1122 void slavio_set_power_fail(void *opaque, int power_failing);
1123
1124 /* esp.c */
1125 void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1126 void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque);
1127 void esp_reset(void *opaque);
1128
1129 /* sparc32_dma.c */
1130 void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu,
1131 void *intctl);
1132 void ledma_set_irq(void *opaque, int isr);
1133 void ledma_memory_read(void *opaque, target_phys_addr_t addr,
1134 uint8_t *buf, int len, int do_bswap);
1135 void ledma_memory_write(void *opaque, target_phys_addr_t addr,
1136 uint8_t *buf, int len, int do_bswap);
1137 void espdma_raise_irq(void *opaque);
1138 void espdma_clear_irq(void *opaque);
1139 void espdma_memory_read(void *opaque, uint8_t *buf, int len);
1140 void espdma_memory_write(void *opaque, uint8_t *buf, int len);
1141 void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque,
1142 void *lance_opaque);
1143
1144 /* cs4231.c */
1145 void cs_init(target_phys_addr_t base, int irq, void *intctl);
1146
1147 /* sun4u.c */
1148 extern QEMUMachine sun4u_machine;
1149
1150 /* NVRAM helpers */
1151 #include "hw/m48t59.h"
1152
1153 void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
1154 uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
1155 void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
1156 uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
1157 void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
1158 uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
1159 void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
1160 const unsigned char *str, uint32_t max);
1161 int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
1162 void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
1163 uint32_t start, uint32_t count);
1164 int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
1165 const unsigned char *arch,
1166 uint32_t RAM_size, int boot_device,
1167 uint32_t kernel_image, uint32_t kernel_size,
1168 const char *cmdline,
1169 uint32_t initrd_image, uint32_t initrd_size,
1170 uint32_t NVRAM_image,
1171 int width, int height, int depth);
1172
1173 /* adb.c */
1174
1175 #define MAX_ADB_DEVICES 16
1176
1177 #define ADB_MAX_OUT_LEN 16
1178
1179 typedef struct ADBDevice ADBDevice;
1180
1181 /* buf = NULL means polling */
1182 typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1183 const uint8_t *buf, int len);
1184 typedef int ADBDeviceReset(ADBDevice *d);
1185
1186 struct ADBDevice {
1187 struct ADBBusState *bus;
1188 int devaddr;
1189 int handler;
1190 ADBDeviceRequest *devreq;
1191 ADBDeviceReset *devreset;
1192 void *opaque;
1193 };
1194
1195 typedef struct ADBBusState {
1196 ADBDevice devices[MAX_ADB_DEVICES];
1197 int nb_devices;
1198 int poll_index;
1199 } ADBBusState;
1200
1201 int adb_request(ADBBusState *s, uint8_t *buf_out,
1202 const uint8_t *buf, int len);
1203 int adb_poll(ADBBusState *s, uint8_t *buf_out);
1204
1205 ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
1206 ADBDeviceRequest *devreq,
1207 ADBDeviceReset *devreset,
1208 void *opaque);
1209 void adb_kbd_init(ADBBusState *bus);
1210 void adb_mouse_init(ADBBusState *bus);
1211
1212 /* cuda.c */
1213
1214 extern ADBBusState adb_bus;
1215 int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
1216
1217 #include "hw/usb.h"
1218
1219 /* usb ports of the VM */
1220
1221 void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1222 usb_attachfn attach);
1223
1224 #define VM_USB_HUB_SIZE 8
1225
1226 void do_usb_add(const char *devname);
1227 void do_usb_del(const char *devname);
1228 void usb_info(void);
1229
1230 /* scsi-disk.c */
1231 enum scsi_reason {
1232 SCSI_REASON_DONE, /* Command complete. */
1233 SCSI_REASON_DATA /* Transfer complete, more data required. */
1234 };
1235
1236 typedef struct SCSIDevice SCSIDevice;
1237 typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag,
1238 uint32_t arg);
1239
1240 SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
1241 int tcq,
1242 scsi_completionfn completion,
1243 void *opaque);
1244 void scsi_disk_destroy(SCSIDevice *s);
1245
1246 int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
1247 /* SCSI data transfers are asynchrnonous. However, unlike the block IO
1248 layer the completion routine may be called directly by
1249 scsi_{read,write}_data. */
1250 void scsi_read_data(SCSIDevice *s, uint32_t tag);
1251 int scsi_write_data(SCSIDevice *s, uint32_t tag);
1252 void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
1253 uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag);
1254
1255 /* lsi53c895a.c */
1256 void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1257 void *lsi_scsi_init(PCIBus *bus, int devfn);
1258
1259 /* integratorcp.c */
1260 extern QEMUMachine integratorcp926_machine;
1261 extern QEMUMachine integratorcp1026_machine;
1262
1263 /* versatilepb.c */
1264 extern QEMUMachine versatilepb_machine;
1265 extern QEMUMachine versatileab_machine;
1266
1267 /* realview.c */
1268 extern QEMUMachine realview_machine;
1269
1270 /* ps2.c */
1271 void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1272 void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1273 void ps2_write_mouse(void *, int val);
1274 void ps2_write_keyboard(void *, int val);
1275 uint32_t ps2_read_data(void *);
1276 void ps2_queue(void *, int b);
1277 void ps2_keyboard_set_translation(void *opaque, int mode);
1278
1279 /* smc91c111.c */
1280 void smc91c111_init(NICInfo *, uint32_t, void *, int);
1281
1282 /* pl110.c */
1283 void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
1284
1285 /* pl011.c */
1286 void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1287
1288 /* pl050.c */
1289 void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1290
1291 /* pl080.c */
1292 void *pl080_init(uint32_t base, void *pic, int irq, int nchannels);
1293
1294 /* pl190.c */
1295 void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1296
1297 /* arm-timer.c */
1298 void sp804_init(uint32_t base, void *pic, int irq);
1299 void icp_pit_init(uint32_t base, void *pic, int irq);
1300
1301 /* arm_sysctl.c */
1302 void arm_sysctl_init(uint32_t base, uint32_t sys_id);
1303
1304 /* arm_gic.c */
1305 void *arm_gic_init(uint32_t base, void *parent, int parent_irq);
1306
1307 /* arm_boot.c */
1308
1309 void arm_load_kernel(int ram_size, const char *kernel_filename,
1310 const char *kernel_cmdline, const char *initrd_filename,
1311 int board_id);
1312
1313 /* sh7750.c */
1314 struct SH7750State;
1315
1316 struct SH7750State *sh7750_init(CPUState * cpu);
1317
1318 typedef struct {
1319 /* The callback will be triggered if any of the designated lines change */
1320 uint16_t portamask_trigger;
1321 uint16_t portbmask_trigger;
1322 /* Return 0 if no action was taken */
1323 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1324 uint16_t * periph_pdtra,
1325 uint16_t * periph_portdira,
1326 uint16_t * periph_pdtrb,
1327 uint16_t * periph_portdirb);
1328 } sh7750_io_device;
1329
1330 int sh7750_register_io_device(struct SH7750State *s,
1331 sh7750_io_device * device);
1332 /* tc58128.c */
1333 int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1334
1335 /* NOR flash devices */
1336 typedef struct pflash_t pflash_t;
1337
1338 pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1339 BlockDriverState *bs,
1340 target_ulong sector_len, int nb_blocs, int width,
1341 uint16_t id0, uint16_t id1,
1342 uint16_t id2, uint16_t id3);
1343
1344 #endif /* defined(QEMU_TOOL) */
1345
1346 /* monitor.c */
1347 void monitor_init(CharDriverState *hd, int show_banner);
1348 void term_puts(const char *str);
1349 void term_vprintf(const char *fmt, va_list ap);
1350 void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
1351 void term_print_filename(const char *filename);
1352 void term_flush(void);
1353 void term_print_help(void);
1354 void monitor_readline(const char *prompt, int is_password,
1355 char *buf, int buf_size);
1356
1357 /* readline.c */
1358 typedef void ReadLineFunc(void *opaque, const char *str);
1359
1360 extern int completion_index;
1361 void add_completion(const char *str);
1362 void readline_handle_byte(int ch);
1363 void readline_find_completion(const char *cmdline);
1364 const char *readline_get_history(unsigned int index);
1365 void readline_start(const char *prompt, int is_password,
1366 ReadLineFunc *readline_func, void *opaque);
1367
1368 void kqemu_record_dump(void);
1369
1370 #endif /* VL_H */