# ARM processor package.\r
#\r
# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>\r
-# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.\r
+# Copyright (c) 2011 - 2015, ARM Limited. All rights reserved.\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
UncachedMemoryAllocationLib|Include/Library/UncachedMemoryAllocationLib.h\r
DefaultExceptionHandlerLib|Include/Library/DefaultExceptionHandlerLib.h\r
ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h\r
+ ArmGicArchLib|Include/Library/ArmGicArchLib.h\r
\r
[Guids.common]\r
gArmTokenSpaceGuid = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 0x6A, 0xFE, 0x30, 0x25, 0x96 } }\r
# Linux (instead of PSCI)\r
gArmTokenSpaceGuid.PcdArmLinuxSpinTable|FALSE|BOOLEAN|0x00000033\r
\r
+ # Define if the GICv3 controller should use the GICv2 legacy\r
+ gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x00000042\r
+\r
[PcdsFixedAtBuild.common]\r
gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE|BOOLEAN|0x00000006\r
\r
gArmTokenSpaceGuid.PcdVFPEnabled|0|UINT32|0x00000024\r
\r
gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000080000000|UINT64|0x00000002\r
- gArmTokenSpaceGuid.PcdArmCacheOperationThreshold|1024|UINT32|0x00000003\r
+ # This PCD will free the unallocated buffers if their size reach this threshold.\r
+ # We set the default value to 512MB.\r
+ gArmTokenSpaceGuid.PcdArmFreeUncachedMemorySizeThreshold|0x20000000|UINT64|0x00000003\r
gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT32|0x00000004\r
gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005\r
\r
#\r
# ARM Secure Firmware PCDs\r
#\r
- gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT32|0x00000015\r
+ gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT64|0x00000015\r
gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016\r
- gArmTokenSpaceGuid.PcdSecureFvBaseAddress|0x0|UINT32|0x0000002F\r
+ gArmTokenSpaceGuid.PcdSecureFvBaseAddress|0x0|UINT64|0x0000002F\r
gArmTokenSpaceGuid.PcdSecureFvSize|0x0|UINT32|0x00000030\r
\r
- #\r
- # ARM Normal (or Non Secure) Firmware PCDs\r
- #\r
- gArmTokenSpaceGuid.PcdFdBaseAddress|0|UINT32|0x0000002B\r
- gArmTokenSpaceGuid.PcdFdSize|0|UINT32|0x0000002C\r
- gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT32|0x0000002D\r
- gArmTokenSpaceGuid.PcdFvSize|0|UINT32|0x0000002E\r
-\r
#\r
# ARM Hypervisor Firmware PCDs\r
#\r
#\r
# BdsLib\r
#\r
- gArmTokenSpaceGuid.PcdArmMachineType|0|UINT32|0x0000001E\r
# The compressed Linux kernel is expected to be under 128MB from the beginning of the System Memory\r
gArmTokenSpaceGuid.PcdArmLinuxKernelMaxOffset|0x08000000|UINT32|0x0000001F\r
# Maximum file size for TFTP servers that do not support 'tsize' extension\r
gArmTokenSpaceGuid.PcdMaxTftpFileSize|0x01000000|UINT32|0x00000000\r
\r
+ #\r
+ # ARM Normal (or Non Secure) Firmware PCDs\r
+ #\r
+ gArmTokenSpaceGuid.PcdFdSize|0|UINT32|0x0000002C\r
+ gArmTokenSpaceGuid.PcdFvSize|0|UINT32|0x0000002E\r
+\r
+[PcdsFixedAtBuild.common, PcdsPatchableInModule.common]\r
+ gArmTokenSpaceGuid.PcdFdBaseAddress|0|UINT64|0x0000002B\r
+ gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT64|0x0000002D\r
\r
[PcdsFixedAtBuild.ARM]\r
#\r
\r
\r
#\r
-# These PCDs are also defined as 'PcdsDynamic' to be redefined when using UEFI in a\r
-# context of virtual machine.\r
+# These PCDs are also defined as 'PcdsDynamic' or 'PcdsPatchableInModule' to be\r
+# redefined when using UEFI in a context of virtual machine.\r
#\r
-[PcdsFixedAtBuild.common, PcdsDynamic.common]\r
+[PcdsFixedAtBuild.common, PcdsDynamic.common, PcdsPatchableInModule.common]\r
+\r
# System Memory (DRAM): These PCDs define the region of in-built system memory\r
# Some platforms can get DRAM extensions, these additional regions will be declared\r
# to UEFI by ArmPlatformLib\r
gArmTokenSpaceGuid.PcdSystemMemoryBase|0|UINT64|0x00000029\r
gArmTokenSpaceGuid.PcdSystemMemorySize|0|UINT64|0x0000002A\r
\r
+[PcdsFixedAtBuild.common, PcdsDynamic.common]\r
#\r
# ARM Architectural Timer\r
#\r
gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum|26|UINT32|0x00000040\r
gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|27|UINT32|0x00000041\r
\r
+ #\r
+ # ARM Generic Watchdog\r
+ #\r
+\r
+ gArmTokenSpaceGuid.PcdGenericWatchdogControlBase|0x2A440000|UINT32|0x00000007\r
+ gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase|0x2A450000|UINT32|0x00000008\r
+ gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|93|UINT32|0x00000009\r
+\r
#\r
# ARM Generic Interrupt Controller\r
#\r
gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C\r
+ # Base address for the GIC Redistributor region that contains the boot CPU\r
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0|UINT32|0x0000000E\r
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D\r
gArmTokenSpaceGuid.PcdGicSgiIntId|0|UINT32|0x00000025\r
-\r
- #\r
- # ARM PSCI function invocations can be done either through hypervisor\r
- # calls (HVC) or secure monitor calls (SMC).\r
- # PcdArmPsciMethod == 1 : use HVC\r
- # PcdArmPsciMethod == 2 : use SMC\r
- #\r
- gArmTokenSpaceGuid.PcdArmPsciMethod|0|UINT32|0x00000042\r