# ARM processor package.\r
#\r
# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>\r
-# Copyright (c) 2011 - 2015, ARM Limited. All rights reserved.\r
+# Copyright (c) 2011 - 2018, ARM Limited. All rights reserved.\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
ArmLib|Include/Library/ArmLib.h\r
ArmMmuLib|Include/Library/ArmMmuLib.h\r
SemihostLib|Include/Library/Semihosting.h\r
- UncachedMemoryAllocationLib|Include/Library/UncachedMemoryAllocationLib.h\r
DefaultExceptionHandlerLib|Include/Library/DefaultExceptionHandlerLib.h\r
ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h\r
ArmGicArchLib|Include/Library/ArmGicArchLib.h\r
+ ArmMtlLib|ArmPlatformPkg/Include/Library/ArmMtlLib.h\r
+ ArmSvcLib|Include/Library/ArmSvcLib.h\r
\r
[Guids.common]\r
gArmTokenSpaceGuid = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 0x6A, 0xFE, 0x30, 0x25, 0x96 } }\r
# Include/Guid/ArmMpCoreInfo.h\r
gArmMpCoreInfoGuid = { 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }\r
\r
+[Protocols.common]\r
+ ## Arm System Control and Management Interface(SCMI) Base protocol\r
+ ## ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h\r
+ gArmScmiBaseProtocolGuid = { 0xd7e5abe9, 0x33ab, 0x418e, { 0x9f, 0x91, 0x72, 0xda, 0xe2, 0xba, 0x8e, 0x2f } }\r
+\r
+ ## Arm System Control and Management Interface(SCMI) Clock management protocol\r
+ ## ArmPkg/Include/Protocol/ArmScmiClockProtocol.h\r
+ gArmScmiClockProtocolGuid = { 0x91ce67a8, 0xe0aa, 0x4012, { 0xb9, 0x9f, 0xb6, 0xfc, 0xf3, 0x4, 0x8e, 0xaa } }\r
+\r
+ ## Arm System Control and Management Interface(SCMI) Clock management protocol\r
+ ## ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h\r
+ gArmScmiPerformanceProtocolGuid = { 0x9b8ba84, 0x3dd3, 0x49a6, { 0xa0, 0x5a, 0x31, 0x34, 0xa5, 0xf0, 0x7b, 0xad } }\r
+\r
[Ppis]\r
## Include/Ppi/ArmMpCoreInfo.h\r
gArmMpCoreInfoPpiGuid = { 0x6847cc74, 0xe9ec, 0x4f8f, {0xa2, 0x9d, 0xab, 0x44, 0xe7, 0x54, 0xa8, 0xfc} }\r
\r
-[Protocols.common]\r
- gVirtualUncachedPagesProtocolGuid = { 0xAD651C7D, 0x3C22, 0x4DBF, { 0x92, 0xe8, 0x38, 0xa7, 0xcd, 0xae, 0x87, 0xb2 } }\r
-\r
[PcdsFeatureFlag.common]\r
gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE|BOOLEAN|0x00000001\r
\r
# Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.\r
gArmTokenSpaceGuid.PcdVFPEnabled|0|UINT32|0x00000024\r
\r
- gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000080000000|UINT64|0x00000002\r
- # This PCD will free the unallocated buffers if their size reach this threshold.\r
- # We set the default value to 512MB.\r
- gArmTokenSpaceGuid.PcdArmFreeUncachedMemorySizeThreshold|0x20000000|UINT64|0x00000003\r
gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT64|0x00000004\r
gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005\r
\r
#\r
gArmTokenSpaceGuid.PcdL2x0ControllerBase|0|UINT32|0x0000001B\r
\r
- #\r
- # BdsLib\r
- #\r
- # The compressed Linux kernel is expected to be under 128MB from the beginning of the System Memory\r
- gArmTokenSpaceGuid.PcdArmLinuxKernelMaxOffset|0x08000000|UINT32|0x0000001F\r
- # Maximum file size for TFTP servers that do not support 'tsize' extension\r
- gArmTokenSpaceGuid.PcdMaxTftpFileSize|0x01000000|UINT32|0x00000000\r
-\r
#\r
# ARM Normal (or Non Secure) Firmware PCDs\r
#\r
gArmTokenSpaceGuid.PcdFdSize|0|UINT32|0x0000002C\r
gArmTokenSpaceGuid.PcdFvSize|0|UINT32|0x0000002E\r
\r
+ #\r
+ # Value to add to a host address to obtain a device address, using\r
+ # unsigned 64-bit integer arithmetic on both ARM and AArch64. This\r
+ # means we can rely on truncation on overflow to specify negative\r
+ # offsets.\r
+ #\r
+ gArmTokenSpaceGuid.PcdArmDmaDeviceOffset|0x0|UINT64|0x0000044\r
+\r
[PcdsFixedAtBuild.common, PcdsPatchableInModule.common]\r
gArmTokenSpaceGuid.PcdFdBaseAddress|0|UINT64|0x0000002B\r
gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT64|0x0000002D\r
[PcdsFixedAtBuild.common, PcdsDynamic.common, PcdsPatchableInModule.common]\r
\r
# System Memory (DRAM): These PCDs define the region of in-built system memory\r
- # Some platforms can get DRAM extensions, these additional regions will be declared\r
- # to UEFI by ArmPlatformLib\r
+ # Some platforms can get DRAM extensions, these additional regions may be\r
+ # declared to UEFI using separate resource descriptor HOBs\r
gArmTokenSpaceGuid.PcdSystemMemoryBase|0|UINT64|0x00000029\r
gArmTokenSpaceGuid.PcdSystemMemorySize|0|UINT64|0x0000002A\r
\r
# ARM Generic Watchdog\r
#\r
\r
- gArmTokenSpaceGuid.PcdGenericWatchdogControlBase|0x2A440000|UINT32|0x00000007\r
- gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase|0x2A450000|UINT32|0x00000008\r
+ gArmTokenSpaceGuid.PcdGenericWatchdogControlBase|0x2A440000|UINT64|0x00000007\r
+ gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase|0x2A450000|UINT64|0x00000008\r
gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|93|UINT32|0x00000009\r
\r
#\r
# ARM Generic Interrupt Controller\r
#\r
- gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C\r
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT64|0x0000000C\r
# Base address for the GIC Redistributor region that contains the boot CPU\r
- gArmTokenSpaceGuid.PcdGicRedistributorsBase|0|UINT32|0x0000000E\r
- gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D\r
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0|UINT64|0x0000000E\r
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT64|0x0000000D\r
gArmTokenSpaceGuid.PcdGicSgiIntId|0|UINT32|0x00000025\r
\r
#\r