MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x000000FF);\r
\r
// Enable CPU interface in Secure world\r
- // Enable CPU inteface in Non-secure World\r
+ // Enable CPU interface in Non-secure World\r
// Signal Secure Interrupts to CPU using FIQ line *\r
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR,\r
ARM_GIC_ICCICR_ENABLE_SECURE |\r