-Porting UEFI to a ARM platform\r
-------------------------------\r
+Porting UEFI to a ARM platform :\r
+--------------------------------\r
1. Create the new platform directory under ArmPlatformPkg\r
\r
2. Create its DSC and FDF files into this new directory. These files can be copied from ArmVExpress-CTA9x4.dsc and ArmVExpress-CTA9x4.fdf; and adapted following the requirement of your platform. \r
\r
3. Set up the PCDs required by ArmPlatformPkg in your FDF or DSC files \r
\r
-PCD Description\r
-gArmTokenSpaceGuid.PcdSecureFdBaseAddress : Base address of your Secure Firmware \r
-gArmTokenSpaceGuid.PcdSecureFdSize : Size in byte of your Secure Firmware gEmbeddedTokenSpaceGuid.\r
-gArmTokenSpaceGuid.PcdNormalFdBaseAddress : Base Address of your Non-Secure Firmware gEmbeddedTokenSpaceGuid.\r
-gArmTokenSpaceGuid.PcdNormalFdSize : Size in bytes of your Non-Secure Firmware \r
-gArmTokenSpaceGuid.PcdL2x0ControllerBase : Base Address of your L2x0 controller \r
-gArmTokenSpaceGuid.PcdGicDistributorBase : Base address of the Distributor of your General Interrupt Controller gArmTokenSpaceGuid.\r
-PcdGicInterruptInterfaceBase : Base address of the Interface of your General Interrupt Controller gArmVExpressTokenSpaceGuid.\r
-PcdCPUCoresSecStackBase : Top of Secure Stack for Secure World gArmVExpressTokenSpaceGuid.\r
-PcdCPUCoreSecStackSize : Size of the stack for each of the 4 CPU cores gArmVExpressTokenSpaceGuid.\r
-PcdCPUCoresSecMonStackBase : Top of Stack for Monitor World gArmVExpressTokenSpaceGuid.\r
-PcdCPUCoreSecMonStackSize : Size of the stack for each of the 4 CPU cores gArmVExpressTokenSpaceGuid.\r
-PcdCPUCoresNonSecStackBase : Top of SEC Stack for Normal World gArmVExpressTokenSpaceGuid.\r
-PcdCPUCoresNonSecStackSize : Size of the stack for each of the 4 CPU Cores gArmVExpressTokenSpaceGuid.\r
-PcdPeiServicePtrAddr : Cached value of PeiServicesTable \r
-\r
4. Implement 'ArmPlatformLib' for your platform following the interface defined by ArmPlatformPkg\Include\Library\ArmPlatformLib.h.\r
\r
-Functions to implement:\r
-\r
-VOID ArmPlatformIsMemoryInitialized(VOID);\r
-VOID ArmPlatformInitializeBootMemory(VOID);\r
-VOID ArmPlatformInitializeSystemMemory(VOID);\r
-VOID ArmPlatformBootRemapping(VOID);\r
-UINTN ArmPlatformTrustzoneSupported(VOID);\r
-VOID ArmPlatformTrustzoneInit(VOID);\r
-VOID ArmPlatformGetPeiMemory (\r
- OUT UINTN* PeiMemoryBase,\r
- OUT UINTN* PeiMemorySize);\r
-VOID ArmPlatformGetVirtualMemoryMap (\r
- OUT ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap);\r
-VOID ArmPlatformGetEfiMemoryMap (\r
- OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap)\r
+\r
+PCDs Description :\r
+-------------------\r
+\r
+# Firmware Device / Volume\r
+gArmTokenSpaceGuid.PcdSecureFdBaseAddress : Base address of your Secure Firmware Device \r
+gArmTokenSpaceGuid.PcdSecureFdSize : Size in byte of your Secure Firmware Device.\r
+gArmTokenSpaceGuid.PcdFdBaseAddress : Base Address of your Non-Secure/Normal World Firmware Device.\r
+gArmTokenSpaceGuid.PcdFdSize : Size in bytes of your Non-Secure/Normal World Firmware Device \r
+\r
+# Stacks\r
+gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase : Base of Secure Stack for Secure World\r
+gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize : Size of the stack for the Primary Core in Secure World\r
+gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize : Size of the stack for the Secondary Cores in Secure World\r
+gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase : Base of Stack for Monitor World\r
+gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize : Size of the stack for each cores\r
+gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase : Base of SEC Stack for Normal World\r
+gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize : Size of the stack for the Primary Core\r
+gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize : Size of the stack for the Secondary Core\r
+\r
+# CPU / Architectural controllers\r
+gArmTokenSpaceGuid.PcdGicDistributorBase : Base address of the Distributor of your General Interrupt Controller\r
+gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase : Base address of the Interface of your General Interrupt Controller\r
+\r
+# Memory Regions\r
+gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize : Size of the region reserve for PI & UEFI\r
+gArmTokenSpaceGuid.PcdSystemMemoryBase : Base Address of the System Memory (DRAM)\r
+gArmTokenSpaceGuid.PcdSystemMemorySize : Size of the System Memory (DRAM)\r
+\r
+# Features\r
+gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec : TRUE if System Memory initialized by the SEC phase\r
+gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores : TRUE if the PrePi or PrePeiCore modules have to send an SGI to resume the excution of the secondary cores \r
+\r
+# Boot Manager\r
+gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription : Description of the Default Boot Entry\r
+gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath : DevicePath of the Default Boot Entry\r
+gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument : Argument for the Default Boot Entry\r
+gArmPlatformTokenSpaceGuid.PcdDefaultBootType : Define the binary type of the Default Boot Entry (0=EFI application, 1=Linux kernel with ATAG support, 2=Linux Kernel with FDT support) \r
+gArmPlatformTokenSpaceGuid.PcdPlatformBootTimeOut : Timeout before booting on the Device Boot entry (by default the auto boot is skipped)\r
+gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths : List of Device Path use for the Console Input\r
+gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths : List of Device Path use for the Console Output\r
+\r
+\r
+FAQ :\r
+-----\r
+# When to use PrePi or PrePeiCore ?\r
+- PrePi: when the memory has already been initialized by the first stage boot loader\r
+ Boot sequence: PlatformFirmware/PrePi/Dxe/Bds\r
+ Example: Beagle Board\r
+\r
+- PrePeiCore: when the firmware is started from XIP memory and in Secure world. The PeiCore shadows the firmware itself in System Memory (DRAM)\r
+ Boot sequence: Sec/PrePiCore/PeiCore/Dxe/Bds\r
+ Example: ARM Versatile Express\r
+\r
+See:\r
+- ArmPlatformPkg/Documentation/ARM-EDK2-Overview.png\r
+- ArmPlatformPkg/Documentation/ArmPlatformLib-Full-Boot.png\r
+- ArmPlatformPkg/Documentation/ArmPlatformLib-2nd-Stage.png\r
+\r
+# What is the PcdStandalone\r
+gArmPlatformTokenSpaceGuid.PcdStandalone=FALSE is used on ARM Development Platforms during the development stage.\r
+To avoid to reflash the NOR Flash after each build, the SEC (in NOR Flash) intializes thd DRAM and wait until the Normal World firmware is copied into the DRAM.\r
+Copying the firmware in DRAM is much faster than reflashing the NOR Flash. It is also more convenient to debug the firmware form DRAM than NOR Flash (eg: use of software breakpoint)\r
+ \r