//\r
-// Copyright (c) 2011, ARM Limited. All rights reserved.\r
+// Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
\r
GCC_ASM_IMPORT(CEntryPoint)\r
GCC_ASM_IMPORT(ArmReadMpidr)\r
-GCC_ASM_IMPORT(ArmIsMPCore)\r
+GCC_ASM_IMPORT(ArmPlatformStackSet)\r
GCC_ASM_EXPORT(_ModuleEntryPoint)\r
\r
StartupAddr: .word CEntryPoint\r
// Get ID of this CPU in Multicore system\r
bl ASM_PFX(ArmReadMpidr)\r
LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r
- and r5, r0, r1\r
+ and r6, r0, r1\r
\r
_SetSVCMode:\r
- // Enter SVC mode\r
+ // Enter SVC mode, Disable FIQ and IRQ\r
+ //TODO: remove hardcoded values\r
mov r1, #0x13|0x80|0x40\r
msr CPSR_c, r1\r
\r
// Compute Top of System Memory\r
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)\r
LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)\r
+ sub r2, r2, #1\r
add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize\r
\r
// Calculate Top of the Firmware Device\r
LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)\r
LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)\r
- add r3, r3, r2 // r4 = FdTop = PcdFdBaseAddress + PcdFdSize\r
+ sub r3, r3, #1\r
+ add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r
\r
// UEFI Memory Size (stacks are allocated in this region)\r
LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r
_SetupStack:\r
// r1 contains the top of the stack (and the UEFI Memory)\r
\r
+ // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r
+ // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r
+ // top of the memory space)\r
+ adds r7, r1, #1\r
+ bcs _SetupOverflowStack\r
+\r
+_SetupAlignedStack:\r
+ mov r1, r7\r
+ b _GetBaseUefiMemory\r
+\r
+_SetupOverflowStack:\r
+ // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r
+ // aligned (4KB)\r
+ LoadConstantToReg (EFI_PAGE_MASK, r7)\r
+ and r7, r7, r1\r
+ sub r1, r1, r7\r
+\r
+_GetBaseUefiMemory:\r
// Calculate the Base of the UEFI Memory\r
- sub r6, r1, r4\r
+ sub r7, r1, r4\r
\r
_GetStackBase:\r
- // Compute Base of Normal stacks for CPU Cores\r
- // Is it MpCore system\r
- bl ArmIsMPCore\r
- cmp r0, #0\r
- // Case it is not an MP Core system. Just setup the primary core\r
- beq _SetupUnicoreStack\r
-\r
-_GetStackBaseMpCore:\r
+ // r1 = The top of the Mpcore Stacks\r
// Stack for the primary core = PrimaryCoreStack\r
LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
- sub r7, r1, r2\r
- // Stack for the secondary core = Number of Cluster * (4 Core per cluster) * SecondaryStackSize\r
- LoadConstantToReg (FixedPcdGet32(PcdClusterCount), r2)\r
- lsl r2, r2, #2\r
+ sub r8, r1, r2\r
+\r
+ // Stack for the secondary core = Number of Cores - 1\r
+ LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)\r
+ sub r0, r0, #1\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r
+ mul r1, r1, r0\r
+ sub r8, r8, r1\r
+\r
+ // r8 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
+ mov r0, r8\r
+ mov r1, r6\r
+ //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r
- mul r2, r2, r3\r
- sub r7, r7, r2\r
-\r
- // The top of the Mpcore Stacks is in r1\r
- // The base of the MpCore Stacks is in r7\r
+ bl ASM_PFX(ArmPlatformStackSet)\r
\r
// Is it the Primary Core ?\r
LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)\r
- cmp r0, r4\r
- beq _SetupPrimaryCoreStack\r
-\r
-_SetupSecondaryCoreStack:\r
- // Base of the stack for the secondary cores is in r7\r
-\r
- // Get the position of the cores (ClusterId * 4) + CoreId\r
- GetCorePositionInStack(r0, r5, r4)\r
- // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
- add r0, r0, #1\r
- // Get the offset for the Secondary Stack\r
- mul r0, r0, r3\r
- add sp, r7, r0\r
-\r
+ cmp r6, r4\r
bne _PrepareArguments\r
\r
-_SetupPrimaryCoreStack:\r
- // The top of the Mpcore Stacks is in r1\r
- LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r
+_ReserveGlobalVariable:\r
+ LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r0)\r
+ // InitializePrimaryStack($GlobalVariableSize, $Tmp1)\r
+ InitializePrimaryStack(r0, r1)\r
\r
- // The reserved space for global variable must be 8-bytes aligned for pushing\r
- // 64-bit variable on the stack\r
- SetPrimaryStack (r1, r2, r3)\r
-\r
-_SetGlobals:\r
- // Set all the PrePi global variables to 0\r
+_PrepareArguments:\r
+ mov r0, r6\r
+ mov r1, r7\r
+ mov r2, r8\r
mov r3, sp\r
- mov r2, #0x0\r
-_InitGlobals:\r
- str r2, [r3], #4\r
- cmp r3, r1\r
- blt _InitGlobals\r
\r
-\r
-_PrepareArguments:\r
// Move sec startup address into a data register\r
// Ensure we're jumping to FV version of the code (not boot remapped alias)\r
- ldr r2, StartupAddr\r
+ ldr r4, StartupAddr\r
\r
// Jump to PrePiCore C code\r
// r0 = MpId\r
// r1 = UefiMemoryBase\r
- blx r2\r
+ // r2 = StacksBase\r
+ // r3 = GlobalVariableBase\r
+ blx r4\r
\r
_NeverReturn:\r
b _NeverReturn\r
\r
-_SetupUnicoreStack:\r
- // The top of the Unicore Stack is in r1\r
- LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r3)\r
-\r
- // Calculate the bottom of the primary stack (StackBase)\r
- sub r7, r1, r3\r
-\r
- // The reserved space for global variable must be 8-bytes aligned for pushing\r
- // 64-bit variable on the stack\r
- SetPrimaryStack (r1, r2, r3)\r
-\r
- b _SetGlobals\r
-\r