## @file\r
-#\r
# Provides drivers and definitions to support fsp in EDKII bios.\r
#\r
-# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials are licensed and made available under\r
# the terms and conditions of the BSD License that accompanies this distribution.\r
# The full text of the license may be found at\r
Include\r
\r
[LibraryClasses]\r
+ ## @libraryclass Provide FSP API related function.\r
+ FspApiLib|Include/Library/FspApiLib.h\r
+\r
+ ## @libraryclass Provide FSP hob process related function.\r
+ FspHobProcessLib|Include/Library/FspHobProcessLib.h\r
+\r
+ ## @libraryclass Provide FSP platform information related function.\r
+ FspPlatformInfoLib|Include/Library/FspPlatformInfoLib.h\r
+\r
+ ## @libraryclass Provide FSP wrapper platform sec related function.\r
+ FspPlatformSecLib|Include/Library/FspPlatformSecLib.h\r
\r
[Guids]\r
#\r
## Provides the size of the BIOS Flash Device.\r
gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00200000|UINT32|0x10000002\r
\r
- ## Indicates the base address of the FSP binary.\r
+ ## Indicates the base address of the factory FSP binary.\r
gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFF80000|UINT32|0x10000003\r
- ## Provides the size of the FSP binary.\r
+ ## Indicates the base address of the updatable FSP binary to support Dual FSP.\r
+ # There could be two FSP images at different locations in a flash - \r
+ # one factory version (default) and updatable version (updatable).\r
+ # TempRamInit, FspMemoryInit and TempRamExit are always executed from factory version.\r
+ # FspSiliconInit and NotifyPhase can be executed from updatable version if it is available,\r
+ # FspSiliconInit and NotifyPhase are executed from factory version if there is no updateable version,\r
+ # PcdFlashFvFspBase is base address of factory FSP, and PcdFlashFvSecondFspBase\r
+ # is base address of updatable FSP. If PcdFlashFvSecondFspBase is 0, that means\r
+ # there is no updatable FSP.\r
+ gFspWrapperTokenSpaceGuid.PcdFlashFvSecondFspBase|0x00000000|UINT32|0x10000008\r
+ ## Provides the size of the factory FSP binary.\r
gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize|0x00048000|UINT32|0x10000004\r
+ ## Provides the size of the updatable FSP binary to support Dual FSP.\r
+ gFspWrapperTokenSpaceGuid.PcdFlashFvSecondFspSize|0x00000000|UINT32|0x10000009\r
\r
## Indicates the base address of the first Microcode Patch in the Microcode Region\r
gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x10000005\r
gFspWrapperTokenSpaceGuid.PcdPeiMinMemSize|0x1800000|UINT32|0x40000004\r
## Indicate the PEI memory size platform want to report\r
gFspWrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005\r
+\r
+ ## PcdFspApiVersion is to determine wrapper calling mechanism\r
+ # - FSP_API_REVISION_1 1\r
+ # - FSP_API_REVISION_2 2\r
+ gFspWrapperTokenSpaceGuid.PcdFspApiVersion|0x02|UINT8|0x00001000\r