/// and the aliases of the VGA I/O ranges. By using this selection, the\r
/// platform indicates that it will support VGA devices that require VGA\r
/// ranges, including those that require VGA aliases. The platform further\r
-/// wants to support non-VGA devices that ask for the ISA range (0x100 -
+/// wants to support non-VGA devices that ask for the ISA range (0x100 -\r
/// 3FF), but not if it also asks for the ISA aliases. The PCI bus driver will\r
-/// not allocate I/O addresses out of the legacy ISA I/O range (0x100 -
+/// not allocate I/O addresses out of the legacy ISA I/O range (0x100 -\r
/// 0x3FF) range or the aliases of the VGA I/O range. If a PCI device\r
/// driver asks for the ISA I/O ranges, including aliases, the request will be\r
/// turned down. The first device that requests the legacy VGA range will\r
@param[in] This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.\r
@param[in] HostBridge The handle of the host bridge controller.\r
@param[in] Phase The phase of the PCI bus enumeration.\r
- @param[in] ChipsetPhase Defines the execution phase of the PCI chipset driver.\r
+ @param[in] ExecPhase Defines the execution phase of the PCI chipset driver.\r
\r
@retval EFI_SUCCESS The function completed successfully.\r
\r
IN EFI_PCI_PLATFORM_PROTOCOL *This,\r
IN EFI_HANDLE HostBridge,\r
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,\r
- IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase\r
+ IN EFI_PCI_EXECUTION_PHASE ExecPhase\r
);\r
\r
/**\r
@param[in] RootBridge The associated PCI root bridge handle.\r
@param[in] PciAddress The address of the PCI device on the PCI bus.\r
@param[in] Phase The phase of the PCI controller enumeration.\r
- @param[in] ChipsetPhase Defines the execution phase of the PCI chipset driver.\r
+ @param[in] ExecPhase Defines the execution phase of the PCI chipset driver.\r
\r
@retval EFI_SUCCESS The function completed successfully.\r
\r
IN EFI_HANDLE RootBridge,\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r
IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase,\r
- IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase\r
+ IN EFI_PCI_EXECUTION_PHASE ExecPhase\r
);\r
\r
/**\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_PLATFORM_GET_PLATFORM_POLICY)(\r
- IN EFI_PCI_PLATFORM_PROTOCOL *This,\r
- OUT EFI_PCI_PLATFORM_POLICY *PciPolicy\r
+ IN CONST EFI_PCI_PLATFORM_PROTOCOL *This,\r
+ OUT EFI_PCI_PLATFORM_POLICY *PciPolicy\r
);\r
\r
/**\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_PLATFORM_GET_PCI_ROM)(\r
- IN EFI_PCI_PLATFORM_PROTOCOL *This,\r
- IN EFI_HANDLE PciHandle,\r
- OUT VOID **RomImage,\r
- OUT UINTN *RomSize\r
+ IN CONST EFI_PCI_PLATFORM_PROTOCOL *This,\r
+ IN EFI_HANDLE PciHandle,\r
+ OUT VOID **RomImage,\r
+ OUT UINTN *RomSize\r
);\r
\r
///\r
///\r
EFI_PCI_PLATFORM_GET_PLATFORM_POLICY GetPlatformPolicy;\r
///\r
- /// Gets the PCI device\92s option ROM from a platform-specific location.\r
+ /// Gets the PCI device's option ROM from a platform-specific location.\r
///\r
EFI_PCI_PLATFORM_GET_PCI_ROM GetPciRom;\r
};\r