#/** @file\r
-# Component description file for Base Library\r
+# Base Library implementation.\r
#\r
-# Base Library implementation.\r
-# Copyright (c) 2007, Intel Corporation.\r
+# Copyright (c) 2007 - 2009, Intel Corporation.<BR>\r
+# Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>\r
#\r
# All rights reserved. This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
MODULE_TYPE = BASE\r
VERSION_STRING = 1.0\r
LIBRARY_CLASS = BaseLib \r
- EDK_RELEASE_VERSION = 0x00020000\r
- EFI_SPECIFICATION_VERSION = 0x00020000\r
-\r
\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM\r
#\r
\r
[Sources.common]\r
Ia32/LRotU64.c | MSFT \r
Ia32/LongJump.c | MSFT \r
Ia32/Invd.c | MSFT \r
- Ia32/InterlockedCompareExchange64.c | MSFT \r
- Ia32/InterlockedCompareExchange32.c | MSFT \r
- Ia32/InterlockedDecrement.c | MSFT \r
- Ia32/InterlockedIncrement.c | MSFT \r
Ia32/FxRestore.c | MSFT \r
Ia32/FxSave.c | MSFT \r
Ia32/FlushCacheLine.c | MSFT \r
Ia32/EnablePaging32.c | MSFT \r
Ia32/EnableInterrupts.c | MSFT \r
Ia32/EnableDisableInterrupts.c | MSFT \r
- Ia32/DivU64x64Remainder.c | MSFT \r
+ Ia32/DivU64x64Remainder.asm | MSFT \r
Ia32/DivU64x32Remainder.c | MSFT \r
Ia32/DivU64x32.c | MSFT \r
Ia32/DisablePaging32.c | MSFT \r
Ia32/CpuId.c | MSFT \r
Ia32/CpuBreakpoint.c | MSFT \r
Ia32/ARShiftU64.c | MSFT \r
- SynchronizationMsc.c | MSFT\r
+ Ia32/Thunk16.asm | MSFT\r
+ Ia32/EnablePaging64.asm | MSFT\r
+ Ia32/EnableCache.c | MSFT\r
+ Ia32/DisableCache.c | MSFT\r
\r
Ia32/Wbinvd.asm | INTEL \r
Ia32/WriteMm7.asm | INTEL \r
Ia32/LRotU64.asm | INTEL \r
Ia32/LongJump.asm | INTEL \r
Ia32/Invd.asm | INTEL \r
- Ia32/InterlockedCompareExchange64.asm | INTEL \r
- Ia32/InterlockedCompareExchange32.asm | INTEL \r
- Ia32/InterlockedDecrement.asm | INTEL \r
- Ia32/InterlockedIncrement.asm | INTEL \r
Ia32/FxRestore.asm | INTEL \r
Ia32/FxSave.asm | INTEL \r
Ia32/FlushCacheLine.asm | INTEL \r
Ia32/CpuId.asm | INTEL \r
Ia32/CpuBreakpoint.asm | INTEL \r
Ia32/ARShiftU64.asm | INTEL \r
- Synchronization.c | INTEL\r
-\r
- Ia32/Thunk16.asm\r
- Ia32/EnablePaging64.asm\r
+ Ia32/Thunk16.asm | INTEL\r
+ Ia32/EnablePaging64.asm | INTEL\r
+ Ia32/EnableCache.asm | INTEL\r
+ Ia32/DisableCache.asm | INTEL\r
\r
Ia32/Thunk16.S | GCC \r
Ia32/CpuBreakpoint.S | GCC \r
Ia32/EnableDisableInterrupts.S | GCC \r
Ia32/DisableInterrupts.S | GCC \r
Ia32/EnableInterrupts.S | GCC \r
- Ia32/InterlockedCompareExchange64.S | GCC \r
- Ia32/InterlockedCompareExchange32.S | GCC \r
- Ia32/InterlockedDecrement.S | GCC \r
- Ia32/InterlockedIncrement.S | GCC \r
Ia32/FlushCacheLine.S | GCC \r
Ia32/Invd.S | GCC \r
Ia32/Wbinvd.S | GCC \r
Ia32/ARShiftU64.S | GCC \r
Ia32/RShiftU64.S | GCC \r
Ia32/LShiftU64.S | GCC \r
- SynchronizationGcc.c | GCC\r
+ Ia32/EnableCache.S | GCC\r
+ Ia32/DisableCache.S | GCC\r
\r
Ia32/DivS64x64Remainder.c\r
Ia32/InternalSwitchStack.c\r
Ia32/Non-existing.c\r
Unaligned.c\r
- x86WriteIdtr.c\r
- x86WriteGdtr.c\r
- x86Thunk.c\r
- x86ReadIdtr.c\r
- x86ReadGdtr.c\r
- x86Msr.c\r
- x86MemoryFence.c\r
- x86GetInterruptState.c\r
- x86FxSave.c\r
- x86FxRestore.c\r
- x86EnablePaging64.c\r
- x86EnablePaging32.c\r
- x86DisablePaging64.c\r
- x86DisablePaging32.c\r
+ X86WriteIdtr.c\r
+ X86WriteGdtr.c\r
+ X86Thunk.c\r
+ X86ReadIdtr.c\r
+ X86ReadGdtr.c\r
+ X86Msr.c\r
+ X86MemoryFence.c\r
+ X86GetInterruptState.c\r
+ X86FxSave.c\r
+ X86FxRestore.c\r
+ X86EnablePaging64.c\r
+ X86EnablePaging32.c\r
+ X86DisablePaging64.c\r
+ X86DisablePaging32.c\r
\r
[Sources.X64]\r
X64/Thunk16.asm\r
X64/Invd.asm\r
X64/Wbinvd.asm\r
X64/DisablePaging64.asm\r
- X64/EnablePaging64.asm\r
X64/Mwait.asm\r
X64/Monitor.asm\r
X64/ReadPmc.asm\r
X64/LongJump.asm\r
X64/SetJump.asm\r
X64/SwitchStack.asm\r
- X64/InterlockedCompareExchange64.asm \r
- X64/InterlockedCompareExchange32.asm \r
+ X64/EnableCache.asm\r
+ X64/DisableCache.asm\r
\r
- X64/InterlockedDecrement.c | MSFT \r
- X64/InterlockedIncrement.c | MSFT \r
X64/CpuBreakpoint.c | MSFT \r
X64/WriteMsr64.c | MSFT \r
X64/ReadMsr64.c | MSFT \r
- SynchronizationMsc.c | MSFT \r
\r
- X64/InterlockedDecrement.asm | INTEL \r
- X64/InterlockedIncrement.asm | INTEL \r
X64/CpuBreakpoint.asm | INTEL \r
X64/WriteMsr64.asm | INTEL \r
X64/ReadMsr64.asm | INTEL \r
- Synchronization.c | INTEL \r
\r
X64/Non-existing.c\r
Math64.c\r
Unaligned.c\r
- x86WriteIdtr.c\r
- x86WriteGdtr.c\r
- x86Thunk.c\r
- x86ReadIdtr.c\r
- x86ReadGdtr.c\r
- x86Msr.c\r
- x86MemoryFence.c\r
- x86GetInterruptState.c\r
- x86FxSave.c\r
- x86FxRestore.c\r
- x86EnablePaging64.c\r
- x86EnablePaging32.c\r
- x86DisablePaging64.c\r
- x86DisablePaging32.c\r
+ X86WriteIdtr.c\r
+ X86WriteGdtr.c\r
+ X86Thunk.c\r
+ X86ReadIdtr.c\r
+ X86ReadGdtr.c\r
+ X86Msr.c\r
+ X86MemoryFence.c\r
+ X86GetInterruptState.c\r
+ X86FxSave.c\r
+ X86FxRestore.c\r
+ X86EnablePaging64.c\r
+ X86EnablePaging32.c\r
+ X86DisablePaging64.c\r
+ X86DisablePaging32.c\r
X64/WriteMsr64.S | GCC \r
X64/WriteMm7.S | GCC \r
X64/WriteMm6.S | GCC \r
X64/Monitor.S | GCC \r
X64/LongJump.S | GCC \r
X64/Invd.S | GCC \r
- X64/InterlockedIncrement.S | GCC \r
- X64/InterlockedDecrement.S | GCC \r
- X64/InterlockedCompareExchange64.S | GCC \r
- X64/InterlockedCompareExchange32.S | GCC \r
X64/FxSave.S | GCC \r
X64/FxRestore.S | GCC \r
X64/FlushCacheLine.S | GCC \r
- X64/EnablePaging64.S | GCC \r
X64/EnableInterrupts.S | GCC \r
X64/EnableDisableInterrupts.S | GCC \r
X64/DisablePaging64.S | GCC \r
X64/CpuId.S | GCC \r
X64/CpuIdEx.S | GCC \r
X64/CpuBreakpoint.S | GCC \r
- SynchronizationGcc.c | GCC \r
+ X64/EnableCache.S | GCC\r
+ X64/DisableCache.S | GCC\r
ChkStkGcc.c | GCC \r
\r
[Sources.IPF]\r
Ipf/AccessPsr.s\r
Ipf/AccessPmr.s\r
Ipf/AccessKr.s\r
+ Ipf/AccessKr7.s\r
Ipf/AccessGcr.s\r
Ipf/AccessEicr.s\r
Ipf/AccessDbr.s\r
- Ipf/FlushCacheRange.s\r
+ Ipf/AccessMsr.s | INTEL\r
+ Ipf/AccessMsr.s | GCC\r
+ Ipf/AccessMsrDb.s | MSFT\r
+ Ipf/InternalFlushCacheRange.s\r
+ Ipf/FlushCacheRange.c\r
Ipf/InternalSwitchStack.c\r
Ipf/GetInterruptState.s\r
Ipf/CpuPause.s\r
- Ipf/Synchronization.c\r
- Ipf/InterlockedCompareExchange64.s\r
- Ipf/InterlockedCompareExchange32.s\r
Ipf/CpuBreakpoint.c | INTEL\r
Ipf/CpuBreakpointMsc.c | MSFT\r
+ Ipf/AsmCpuMisc.s | GCC\r
Ipf/Unaligned.c\r
Ipf/SwitchStack.s\r
- Ipf/longjmp.s\r
- Ipf/setjmp.s\r
- Ipf/PalCallStatic.s\r
- Ipf/ia_64gen.h\r
- Ipf/asm.h\r
+ Ipf/LongJmp.s\r
+ Ipf/SetJmp.s\r
+ Ipf/ReadCr.s\r
+ Ipf/ReadAr.s\r
+ Ipf/Ia64gen.h\r
+ Ipf/Asm.h\r
Math64.c\r
- Synchronization.c | INTEL \r
- SynchronizationMsc.c | MSFT \r
- SynchronizationGcc.c | GCC \r
\r
[Sources.EBC]\r
- Synchronization.c\r
- Ebc/Synchronization.c\r
Ebc/CpuBreakpoint.c\r
Ebc/SetJumpLongJump.c\r
Ebc/SwitchStack.c\r
Unaligned.c\r
Math64.c\r
\r
+[Sources.ARM]\r
+ Arm/InternalSwitchStack.c\r
+ Arm/Unaligned.c\r
+ Math64.c \r
+ \r
+ Arm/SwitchStack.asm | RVCT\r
+ Arm/SetJumpLongJump.asm | RVCT\r
+ Arm/DisableInterrupts.asm | RVCT\r
+ Arm/EnableInterrupts.asm | RVCT\r
+ Arm/GetInterruptsState.asm | RVCT\r
+ Arm/CpuPause.asm | RVCT\r
+ Arm/CpuBreakpoint.asm\r
+ \r
+ Arm/GccInline.c | GCC\r
+ Arm/EnableInterrupts.S | GCC\r
+ Arm/DisableInterrupts.S | GCC\r
+ Arm/GetInterruptsState.S | GCC\r
+ Arm/SetJumpLongJump.S | GCC\r
+ Arm/CpuBreakpoint.S | GCC\r
+\r
[Packages]\r
MdePkg/MdePkg.dec\r
\r
-\r
[LibraryClasses]\r
PcdLib\r
- TimerLib\r
DebugLib\r
BaseMemoryLib\r
\r
-\r
-[Pcd.common]\r
- gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout\r
+[Pcd]\r
gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength\r
gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength\r
gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength\r
-\r
+ gEfiMdePkgTokenSpaceGuid.PcdVerifyNodeInList\r