+\r
+#include "BaseLibInternals.h"\r
+\r
;------------------------------------------------------------------------------\r
;\r
-; Copyright (c) 2006, Intel Corporation\r
+; Copyright (c) 2006 - 2008, Intel Corporation\r
; All rights reserved. This program and the accompanying materials\r
; are licensed and made available under the terms and conditions of the BSD License\r
; which accompanies this distribution. The full text of the license may be found at\r
; by user code. It will be shadowed to somewhere in memory below 1MB.\r
;------------------------------------------------------------------------------\r
_BackFromUserCode PROC\r
+ ;\r
+ ; The order of saved registers on the stack matches the order they appears\r
+ ; in IA32_REGS structure. This facilitates wrapper function to extract them\r
+ ; into that structure.\r
+ ;\r
+ ; Some instructions for manipulation of segment registers have to be written\r
+ ; in opcode since 64-bit MASM prevents accesses to those registers.\r
+ ;\r
DB 16h ; push ss\r
DB 0eh ; push cs\r
DB 66h\r
@2:\r
mov eax, ss\r
lea bp, [esp + sizeof (IA32_REGS)]\r
+ ;\r
+ ; rsi in the following 2 instructions is indeed bp in 16-bit code\r
+ ;\r
mov word ptr (IA32_REGS ptr [rsi - sizeof (IA32_REGS)])._ESP, bp\r
+ DB 66h\r
mov ebx, (IA32_REGS ptr [rsi - sizeof (IA32_REGS)])._EIP\r
shl ax, 4 ; shl eax, 4\r
add bp, ax ; add ebp, eax\r
+ mov ax, cs\r
+ shl ax, 4\r
+ lea ax, [eax + ebx + (@64BitCode - @Base)]\r
+ DB 66h, 2eh, 89h, 87h ; mov cs:[bx + (@64Eip - @Base)], eax\r
+ DW @64Eip - @Base\r
DB 66h, 0b8h ; mov eax, imm32\r
SavedCr4 DD ?\r
mov cr4, rax\r
- DB 66h, 2eh\r
+ ;\r
+ ; rdi in the instruction below is indeed bx in 16-bit code\r
+ ;\r
+ DB 66h, 2eh ; 2eh is "cs:" segment override\r
lgdt fword ptr [rdi + (SavedGdt - @Base)]\r
DB 66h\r
mov ecx, 0c0000080h\r
DB 66h, 0b8h ; mov eax, imm32\r
SavedCr0 DD ?\r
mov cr0, rax\r
- DB 0b8h ; mov ax, imm16\r
-SavedSs DW ?\r
- mov ss, eax\r
- DB 66h, 0bch ; mov esp, imm32\r
-SavedEsp DD ?\r
- DB 66h\r
- retf ; return to protected mode\r
+ DB 66h, 0eah ; jmp far cs:@64Bit\r
+@64Eip DD ?\r
+SavedCs DW ?\r
+@64BitCode:\r
+ db 090h \r
+ db 067h, 0bch ; mov esp, imm32\r
+SavedSp DD ? ; restore stack\r
+ nop\r
+ ret\r
_BackFromUserCode ENDP\r
\r
_EntryPoint DD _ToUserCode - m16Start\r
wrmsr\r
mov cr4, rbp\r
mov ss, esi ; set up 16-bit stack segment\r
- xchg sp, bx ; set up 16-bit stack pointer\r
- DB 66h\r
+ mov sp, bx ; set up 16-bit stack pointer\r
+ DB 66h ; make the following call 32-bit\r
call @Base ; push eip\r
@Base:\r
pop bp ; ebp <- address of @Base\r
push [esp + sizeof (IA32_REGS) + 2]\r
- lea eax, [rsi + (@RealMode - @Base)]\r
+ lea eax, [rsi + (@RealMode - @Base)] ; rsi is "bp" in 16-bit code\r
push rax\r
- retf\r
+ retf ; execution begins at next instruction\r
@RealMode:\r
- DB 6ah, DATA32\r
- DB 2eh ; cs:\r
- pop [rsi + (SavedSs - @Base)]\r
- DB 2eh ; cs:\r
- mov [rsi + (SavedEsp - @Base)], bx\r
DB 66h, 2eh ; CS and operand size override\r
lidt fword ptr [rsi + (_16Idtr - @Base)]\r
DB 66h, 61h ; popad\r
pop gs\r
popf ; popfd\r
lea sp, [esp + 4] ; skip high order 32 bits of EFlags\r
- DB 66h\r
+ DB 66h ; make the following retf 32-bit\r
retf ; transfer control to user code\r
_ToUserCode ENDP\r
\r
; );\r
;------------------------------------------------------------------------------\r
InternalAsmThunk16 PROC USES rbp rbx rsi rdi\r
- mov r10d, ds\r
- mov r11d, es\r
- mov r9d, ss\r
+ mov rbx, ds\r
+ push rbx ; Save ds segment register on the stack\r
+ mov rbx, es\r
+ push rbx ; Save es segment register on the stack\r
+ mov rbx, ss\r
+ push rbx ; Save ss segment register on the stack\r
+ \r
push fs\r
push gs\r
mov rsi, rcx\r
lea ecx, [rdx + (SavedCr4 - m16Start)]\r
mov eax, edx ; eax <- transition code address\r
and edx, 0fh\r
- shl eax, 12\r
- lea edx, [rdx + (_BackFromUserCode - m16Start)]\r
- mov ax, dx\r
+ shl eax, 12 ; segment address in high order 16 bits\r
+ lea ax, [rdx + (_BackFromUserCode - m16Start)] ; offset address\r
stosd ; [edi] <- return address of user code\r
- sgdt fword ptr [rcx + (SavedGdt - SavedCr4)]\r
- sidt fword ptr [rsp + 38h] ; save IDT stack in argument space\r
+ \r
+ sgdt fword ptr [rsp + 60h] ; save GDT stack in argument space\r
+ movzx r10, word ptr [rsp + 60h] ; r10 <- GDT limit \r
+ lea r11, [rcx + (InternalAsmThunk16 - SavedCr4) + 0xf]\r
+ and r11, 0xfffffff0 ; r11 <- 16-byte aligned shadowed GDT table in real mode buffer\r
+ \r
+ mov word ptr [rcx + (SavedGdt - SavedCr4)], r10w ; save the limit of shadowed GDT table\r
+ mov qword ptr [rcx + (SavedGdt - SavedCr4) + 2], r11 ; save the base address of shadowed GDT table\r
+ \r
+ mov rsi, qword ptr [rsp + 62h] ; rsi <- the original GDT base address\r
+ xchg rcx, r10 ; save rcx to r10 and initialize rcx to be the limit of GDT table\r
+ inc rcx ; rcx <- the size of memory to copy\r
+ xchg rdi, r11 ; save rdi to r11 and initialize rdi to the base address of shadowed GDT table\r
+ rep movsb ; perform memory copy to shadow GDT table\r
+ mov rcx, r10 ; restore the orignal rcx before memory copy\r
+ mov rdi, r11 ; restore the original rdi before memory copy\r
+ \r
+ sidt fword ptr [rsp + 50h] ; save IDT stack in argument space\r
mov rax, cr0\r
mov [rcx + (SavedCr0 - SavedCr4)], eax\r
and eax, 7ffffffeh ; clear PE, PG bits\r
mov ss, edx\r
pushfq\r
lea edx, [rdx + DATA16 - DATA32]\r
- call fword ptr [rcx + (_EntryPoint - SavedCr4)]\r
+ lea r8, @RetFromRealMode\r
+ push r8\r
+ mov r8d, cs\r
+ mov [rcx + (SavedCs - SavedCr4)], r8w\r
+ mov [rcx + (SavedSp - SavedCr4)], esp\r
+ jmp fword ptr [rcx + (_EntryPoint - SavedCr4)]\r
+@RetFromRealMode:\r
popfq\r
- lidt fword ptr [rsp + 38h] ; restore protected mode IDTR\r
+ lgdt fword ptr [rsp + 60h] ; restore protected mode GDTR\r
+ lidt fword ptr [rsp + 50h] ; restore protected mode IDTR\r
lea eax, [rbp - sizeof (IA32_REGS)]\r
pop gs\r
pop fs\r
- mov ss, r9d\r
- mov es, r11d\r
- mov ds, r10d\r
+ pop rbx\r
+ mov ss, rbx\r
+ pop rbx\r
+ mov es, rbx\r
+ pop rbx\r
+ mov ds, rbx\r
ret\r
InternalAsmThunk16 ENDP\r
\r