-#/** @file\r
+## @file\r
# Open Virtual Machine Firmware: FDF\r
#\r
-# Copyright (c) 2006 - 2009, Intel Corporation\r
+# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
#\r
-# All rights reserved. This program and the accompanying materials\r
+# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
# http://opensource.org/licenses/bsd-license.php\r
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
#\r
-#**/\r
+##\r
\r
################################################################################\r
-#\r
-# FD Section\r
-# The [FD] Section is made up of the definition statements and a\r
-# description of what goes into the Flash Device Image. Each FD section\r
-# defines one flash "device" image. A flash device image may be one of\r
-# the following: Removable media bootable image (like a boot floppy\r
-# image,) an Option ROM image (that would be "flashed" into an add-in\r
-# card,) a System "Flash" image (that would be burned into a system's\r
-# flash) or an Update ("Capsule") image that will be used to update and\r
-# existing system flash.\r
-#\r
+[FD.SEC]\r
+BaseAddress = 0xFFFEE000\r
+Size = 0x00012000\r
+ErasePolarity = 1\r
+BlockSize = 0x1000\r
+NumBlocks = 0x12\r
+\r
+0x0|0x12000\r
+FV = SECFV\r
+\r
################################################################################\r
-[FD.OVMF]\r
-BaseAddress = 0xFFE00000 # The base address of the FLASH Device.\r
-Size = 0x00200000 # The size in bytes of the FLASH Device\r
+\r
+[FD.MEMFD]\r
+BaseAddress = 0x800000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvBase\r
+Size = 0x400000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvSize\r
ErasePolarity = 1\r
BlockSize = 0x10000\r
-NumBlocks = 0x20\r
+NumBlocks = 0x40\r
\r
-################################################################################\r
-#\r
-# Following are lists of FD Region layout which correspond to the locations of different\r
-# images within the flash device.\r
-#\r
-# Regions must be defined in ascending order and may not overlap.\r
-#\r
-# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
-# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
-# "0x" characters. Like:\r
-# Offset|Size\r
-# PcdOffsetCName|PcdSizeCName\r
-# RegionType <FV, DATA, or FILE>\r
-#\r
-################################################################################\r
-0x0|0x200000\r
-gEfiUnixPkgTokenSpaceGuid.PcdUnixFlashFvRecoveryBase|gEfiUnixPkgTokenSpaceGuid.PcdUnixFlashFvRecoverySize\r
+0x0|0x400000\r
FV = MAINFV\r
\r
################################################################################\r
+\r
+[FV.SECFV]\r
+BlockSize = 0x1000\r
+FvAlignment = 16\r
+ERASE_POLARITY = 1\r
+MEMORY_MAPPED = TRUE\r
+STICKY_WRITE = TRUE\r
+LOCK_CAP = TRUE\r
+LOCK_STATUS = TRUE\r
+WRITE_DISABLED_CAP = TRUE\r
+WRITE_ENABLED_CAP = TRUE\r
+WRITE_STATUS = TRUE\r
+WRITE_LOCK_CAP = TRUE\r
+WRITE_LOCK_STATUS = TRUE\r
+READ_DISABLED_CAP = TRUE\r
+READ_ENABLED_CAP = TRUE\r
+READ_STATUS = TRUE\r
+READ_LOCK_CAP = TRUE\r
+READ_LOCK_STATUS = TRUE\r
+\r
#\r
-# FV Section\r
+# SEC Phase modules\r
#\r
-# [FV] section is used to define what components or modules are placed within a flash\r
-# device file. This section also defines order the components and modules are positioned\r
-# within the image. The [FV] section consists of define statements, set statements and\r
-# module statements.\r
+# The code in this FV handles the initial firmware startup, and\r
+# decompresses the MAINFV which handles the majority of the boot sequence.\r
#\r
+INF OvmfPkg/Sec/SecMain.inf\r
+\r
+FILE RAW = 1BA0062E-C779-4582-8566-336AE8F78F09 {\r
+ SECTION RAW = UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw\r
+ }\r
+\r
################################################################################\r
-[FV.DXEFV]\r
-BlockSize = 0x1000\r
-FvAlignment = 16 #FV alignment and FV attributes setting.\r
+[FV.MAINFV]\r
+BlockSize = 0x10000\r
+FvAlignment = 16\r
ERASE_POLARITY = 1\r
MEMORY_MAPPED = TRUE\r
STICKY_WRITE = TRUE\r
READ_LOCK_STATUS = TRUE\r
\r
#\r
-# Files to be placed in DXEFV\r
+# Files to be placed in MAIN FV\r
#\r
# This firmware volume will have files placed in it uncompressed,\r
# and then then entire firmware volume will be compressed in a\r
# overall compression.\r
#\r
\r
+APRIORI PEI {\r
+ INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
+}\r
+\r
+#\r
+# PEI Phase modules\r
+#\r
+INF MdeModulePkg/Core/Pei/PeiMain.inf\r
+INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
+INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
+INF OvmfPkg/PlatformPei/PlatformPei.inf\r
+INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
+\r
+FILE FV_IMAGE = A4EF5A93-3F1B-4232-A1C4-F0910E6D1D9C {\r
+ SECTION COMPRESS PI_NONE {\r
+ SECTION FV_IMAGE = DXEFV\r
+ }\r
+}\r
+\r
+################################################################################\r
+\r
+[FV.DXEFV]\r
+BlockSize = 0x10000\r
+FvAlignment = 16\r
+ERASE_POLARITY = 1\r
+MEMORY_MAPPED = TRUE\r
+STICKY_WRITE = TRUE\r
+LOCK_CAP = TRUE\r
+LOCK_STATUS = TRUE\r
+WRITE_DISABLED_CAP = TRUE\r
+WRITE_ENABLED_CAP = TRUE\r
+WRITE_STATUS = TRUE\r
+WRITE_LOCK_CAP = TRUE\r
+WRITE_LOCK_STATUS = TRUE\r
+READ_DISABLED_CAP = TRUE\r
+READ_ENABLED_CAP = TRUE\r
+READ_STATUS = TRUE\r
+READ_LOCK_CAP = TRUE\r
+READ_LOCK_STATUS = TRUE\r
+\r
APRIORI DXE {\r
INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
- INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf\r
}\r
\r
#\r
\r
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
-INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf\r
-INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
+INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf\r
INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf\r
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
INF MdeModulePkg/Universal/Metronome/Metronome.inf\r
INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
\r
+INF OvmfPkg/BlockMmioToBlockIoDxe/BlockIo.inf\r
INF OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf\r
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
\r
################################################################################\r
\r
-[FV.MAINFV]\r
+[FV.OVMF]\r
+BlockSize = 0x10000\r
FvAlignment = 16\r
ERASE_POLARITY = 1\r
MEMORY_MAPPED = TRUE\r
READ_LOCK_STATUS = TRUE\r
\r
#\r
-# Files to be placed in MAINFV\r
-#\r
-# This firmware volume will have all the files placed in it which\r
-# must not be compressed at the initial boot phase. The only\r
-# exception to this is the compressed 'DXEFV'.\r
-#\r
-\r
-APRIORI PEI {\r
- INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
-}\r
-\r
-#\r
-# SEC Phase modules\r
-#\r
-INF OvmfPkg/Sec/SecMain.inf\r
-\r
-#\r
-# PEI Phase modules\r
-#\r
-INF MdeModulePkg/Core/Pei/PeiMain.inf\r
-INF RuleOverride=NORELOC MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
-INF RuleOverride=NORELOC IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
-INF RuleOverride=NORELOC OvmfPkg/PlatformPei/PlatformPei.inf\r
-INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
-\r
-#\r
-# This file contains the compressed 'DXEFV', which is compressed\r
+# This file contains the compressed MAINFV, which is compressed\r
# in a single compression operation in order to achieve better\r
# overall compression.\r
#\r
FILE FV_IMAGE = 20bc8ac9-94d1-4208-ab28-5d673fd73486 {\r
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress\r
- SECTION FV_IMAGE = DXEFV\r
+ SECTION FV_IMAGE = MAINFV\r
}\r
}\r
\r
-FILE RAW = 1BA0062E-C779-4582-8566-336AE8F78F09 {\r
- SECTION RAW = OvmfPkg/ResetVector/Bin/ResetVector.ia32.raw\r
- }\r
-\r
-\r
-################################################################################\r
#\r
-# Rules are use with the [FV] section's module INF type to define\r
-# how an FFS file is created for a given INF file. The following Rule are the default\r
-# rules for the different module type. User can add the customized rules to define the\r
-# content of the FFS file.\r
+# This file contains the uncompressed SECFV, which contains the initial\r
+# boot code. The code in this FV decompresses the MAINFV.\r
#\r
+# It uses the Volume Top File (VTF) GUID so it will be placed at the\r
+# end of the FV.\r
+#\r
+FILE FREEFORM = 1BA0062E-C779-4582-8566-336AE8F78F09 {\r
+ SECTION Align=16 FV_IMAGE = SECFV\r
+}\r
+\r
################################################################################\r
\r
[Rule.Common.PEI_CORE]\r
FILE PEI_CORE = $(NAMED_GUID) {\r
- PE32 PE32 Align=32 |.efi\r
+ PE32 PE32 Align=32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
UI STRING ="$(MODULE_NAME)" Optional\r
VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
}\r
\r
[Rule.Common.SEC]\r
FILE SEC = $(NAMED_GUID) {\r
- PE32 PE32 |.efi\r
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
UI STRING ="$(MODULE_NAME)" Optional\r
VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
}\r
\r
[Rule.Common.PEIM.NORELOC]\r
FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED {\r
- PEI_DEPEX PEI_DEPEX Optional |.depex\r
- TE TE |.efi\r
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
+ TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
UI STRING="$(MODULE_NAME)" Optional\r
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
}\r
\r
[Rule.Common.PEIM]\r
FILE PEIM = $(NAMED_GUID) {\r
- PEI_DEPEX PEI_DEPEX Optional |.depex\r
- PE32 PE32 Align=32 |.efi\r
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
+ PE32 PE32 Align=32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
UI STRING="$(MODULE_NAME)" Optional\r
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
}\r
\r
[Rule.Common.PEIM.TIANOCOMPRESSED]\r
FILE PEIM = $(NAMED_GUID) {\r
- PEI_DEPEX PEI_DEPEX Optional |.depex\r
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
- PE32 PE32 |.efi\r
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
UI STRING="$(MODULE_NAME)" Optional\r
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
}\r
\r
[Rule.Common.DXE_CORE]\r
FILE DXE_CORE = $(NAMED_GUID) {\r
- PE32 PE32 |.efi\r
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
UI STRING="$(MODULE_NAME)" Optional\r
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
}\r
\r
[Rule.Common.UEFI_DRIVER]\r
FILE DRIVER = $(NAMED_GUID) {\r
- DXE_DEPEX DXE_DEPEX Optional |.depex\r
- PE32 PE32 |.efi\r
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
UI STRING="$(MODULE_NAME)" Optional\r
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
}\r
\r
[Rule.Common.DXE_DRIVER]\r
FILE DRIVER = $(NAMED_GUID) {\r
- DXE_DEPEX DXE_DEPEX Optional |.depex\r
- PE32 PE32 |.efi\r
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
UI STRING="$(MODULE_NAME)" Optional\r
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
}\r
\r
[Rule.Common.DXE_RUNTIME_DRIVER]\r
FILE DRIVER = $(NAMED_GUID) {\r
- DXE_DEPEX DXE_DEPEX Optional |.depex\r
- PE32 PE32 |.efi\r
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
UI STRING="$(MODULE_NAME)" Optional\r
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
}\r
\r
[Rule.Common.UEFI_APPLICATION]\r
FILE APPLICATION = $(NAMED_GUID) {\r
- PE32 PE32 |.efi\r
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
UI STRING="$(MODULE_NAME)" Optional\r
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
}\r