-/**@file\r
+/** @file\r
This contains the installation function for the driver.\r
- \r
-Copyright (c) 2005 - 2009, Intel Corporation \r
-All rights reserved. This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution. The full text of the license may be found at \r
-http://opensource.org/licenses/bsd-license.php \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
//\r
// Global for the Legacy 8259 Protocol that is produced by this driver\r
//\r
-EFI_LEGACY_8259_PROTOCOL m8259 = {\r
+EFI_LEGACY_8259_PROTOCOL mInterrupt8259 = {\r
Interrupt8259SetVectorBase,\r
Interrupt8259GetMask,\r
Interrupt8259SetMask,\r
UINT8 mSlaveBase = 0xff;\r
EFI_8259_MODE mMode = Efi8259ProtectedMode;\r
UINT16 mProtectedModeMask = 0xffff;\r
-UINT16 mLegacyModeMask = 0x06b8;\r
+UINT16 mLegacyModeMask;\r
UINT16 mProtectedModeEdgeLevel = 0x0000;\r
-UINT16 mLegacyModeEdgeLevel = 0x0000;\r
+UINT16 mLegacyModeEdgeLevel;\r
\r
//\r
// Worker Functions\r
IN UINT8 SlaveBase\r
)\r
{\r
- UINT8 Mask;\r
+ UINT8 Mask;\r
+ EFI_TPL OriginalTpl;\r
\r
+ OriginalTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);\r
//\r
// Set vector base for slave PIC\r
//\r
\r
//\r
// Preserve interrtup mask register before initialization sequence\r
- // because it will be cleared during intialization\r
+ // because it will be cleared during initialization\r
//\r
Mask = IoRead8 (LEGACY_8259_MASK_REGISTER_SLAVE);\r
\r
\r
//\r
// Preserve interrtup mask register before initialization sequence\r
- // because it will be cleared during intialization\r
+ // because it will be cleared during initialization\r
//\r
Mask = IoRead8 (LEGACY_8259_MASK_REGISTER_MASTER);\r
\r
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, Mask);\r
}\r
\r
- IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, 0x20);\r
- IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, 0x20);\r
+ IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, LEGACY_8259_EOI);\r
+ IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, LEGACY_8259_EOI);\r
+\r
+ gBS->RestoreTPL (OriginalTpl);\r
\r
return EFI_SUCCESS;\r
}\r
//\r
// Write new legacy mode mask/trigger level\r
//\r
- Interrupt8259SetVectorBase (This, LEGACY_MODE_BASE_VECTOR_MASTER, LEGACY_MODE_BASE_VECTOR_SLAVE);\r
-\r
- //\r
- // Enable Interrupts\r
- //\r
Interrupt8259WriteMask (mLegacyModeMask, mLegacyModeEdgeLevel);\r
\r
return EFI_SUCCESS;\r
//\r
// Write new protected mode mask/trigger level\r
//\r
- Interrupt8259SetVectorBase (This, PROTECTED_MODE_BASE_VECTOR_MASTER, PROTECTED_MODE_BASE_VECTOR_SLAVE);\r
-\r
- //\r
- // Enable Interrupts\r
- //\r
Interrupt8259WriteMask (mProtectedModeMask, mProtectedModeEdgeLevel);\r
\r
return EFI_SUCCESS;\r
OUT UINT8 *Vector\r
)\r
{\r
- if (Irq < Efi8259Irq0 || Irq > Efi8259Irq15) {\r
+ if ((UINT32)Irq > Efi8259Irq15) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
IN BOOLEAN LevelTriggered\r
)\r
{\r
- if (Irq < Efi8259Irq0 || Irq > Efi8259Irq15) {\r
+ if ((UINT32)Irq > Efi8259Irq15) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
IN EFI_8259_IRQ Irq\r
)\r
{\r
- if (Irq < Efi8259Irq0 || Irq > Efi8259Irq15) {\r
+ if ((UINT32)Irq > Efi8259Irq15) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
OUT UINT8 *Vector\r
)\r
{\r
- return EFI_UNSUPPORTED;\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
+ UINT8 InterruptLine;\r
+ EFI_STATUS Status;\r
+\r
+ Status = gBS->HandleProtocol (\r
+ PciHandle,\r
+ &gEfiPciIoProtocolGuid,\r
+ (VOID **) &PciIo\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ PciIo->Pci.Read (\r
+ PciIo,\r
+ EfiPciIoWidthUint8,\r
+ PCI_INT_LINE_OFFSET,\r
+ 1,\r
+ &InterruptLine\r
+ );\r
+ //\r
+ // Interrupt line is same location for standard PCI cards, standard\r
+ // bridge and CardBus bridge.\r
+ //\r
+ *Vector = InterruptLine;\r
+\r
+ return EFI_SUCCESS;\r
}\r
\r
/**\r
IN EFI_8259_IRQ Irq\r
)\r
{\r
- if (Irq < Efi8259Irq0 || Irq > Efi8259Irq15) {\r
+ if ((UINT32)Irq > Efi8259Irq15) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
EFI_STATUS Status;\r
EFI_8259_IRQ Irq;\r
\r
+ //\r
+ // Initialze mask values from PCDs\r
+ //\r
+ mLegacyModeMask = PcdGet16 (Pcd8259LegacyModeMask);\r
+ mLegacyModeEdgeLevel = PcdGet16 (Pcd8259LegacyModeEdgeLevel);\r
+\r
//\r
// Clear all pending interrupt\r
//\r
for (Irq = Efi8259Irq0; Irq <= Efi8259Irq15; Irq++) {\r
- Interrupt8259EndOfInterrupt (&m8259, Irq);\r
+ Interrupt8259EndOfInterrupt (&mInterrupt8259, Irq);\r
}\r
\r
//\r
// Set the 8259 Master base to 0x68 and the 8259 Slave base to 0x70\r
//\r
- Status = Interrupt8259SetVectorBase (&m8259, PROTECTED_MODE_BASE_VECTOR_MASTER, PROTECTED_MODE_BASE_VECTOR_SLAVE);\r
+ Status = Interrupt8259SetVectorBase (&mInterrupt8259, PROTECTED_MODE_BASE_VECTOR_MASTER, PROTECTED_MODE_BASE_VECTOR_SLAVE);\r
\r
//\r
// Set all 8259 interrupts to edge triggered and disabled\r
&m8259Handle,\r
&gEfiLegacy8259ProtocolGuid,\r
EFI_NATIVE_INTERFACE,\r
- &m8259\r
+ &mInterrupt8259\r
);\r
return Status;\r
}\r
-\r