/** @file\r
PCI Root Bridge Io Protocol implementation\r
\r
-Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials are\r
licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
**/ \r
\r
#include "PciHostBridge.h"\r
+#include "IoFifo.h"\r
\r
typedef struct {\r
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR SpaceDesp[TypeMax];\r
\r
PrivateData->RootBridgeAttrib = Attri;\r
\r
- PrivateData->Attributes = 0;\r
- PrivateData->Supports = 0;\r
+ PrivateData->Supports = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO | EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO | \\r
+ EFI_PCI_ATTRIBUTE_ISA_IO_16 | EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO | \\r
+ EFI_PCI_ATTRIBUTE_VGA_MEMORY | \\r
+ EFI_PCI_ATTRIBUTE_VGA_IO_16 | EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;\r
+ PrivateData->Attributes = PrivateData->Supports;\r
\r
Protocol->ParentHandle = HostBridgeHandle;\r
\r
//\r
// Check to see if Width is in the valid range\r
//\r
- if (Width < EfiPciWidthUint8 || Width >= EfiPciWidthMaximum) {\r
+ if ((UINT32)Width >= EfiPciWidthMaximum) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
InStride = mInStride[Width];\r
OutStride = mOutStride[Width];\r
OperationWidth = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (Width & 0x03);\r
+\r
+#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r
+ if (InStride == 0) {\r
+ if (Write) {\r
+ switch (OperationWidth) {\r
+ case EfiPciWidthUint8:\r
+ IoWriteFifo8 ((UINTN) Address, Count, Buffer);\r
+ return EFI_SUCCESS;\r
+ case EfiPciWidthUint16:\r
+ IoWriteFifo16 ((UINTN) Address, Count, Buffer);\r
+ return EFI_SUCCESS;\r
+ case EfiPciWidthUint32:\r
+ IoWriteFifo32 ((UINTN) Address, Count, Buffer);\r
+ return EFI_SUCCESS;\r
+ default:\r
+ //\r
+ // The RootBridgeIoCheckParameter call above will ensure that this\r
+ // path is not taken.\r
+ //\r
+ ASSERT (FALSE);\r
+ break;\r
+ }\r
+ } else {\r
+ switch (OperationWidth) {\r
+ case EfiPciWidthUint8:\r
+ IoReadFifo8 ((UINTN) Address, Count, Buffer);\r
+ return EFI_SUCCESS;\r
+ case EfiPciWidthUint16:\r
+ IoReadFifo16 ((UINTN) Address, Count, Buffer);\r
+ return EFI_SUCCESS;\r
+ case EfiPciWidthUint32:\r
+ IoReadFifo32 ((UINTN) Address, Count, Buffer);\r
+ return EFI_SUCCESS;\r
+ default:\r
+ //\r
+ // The RootBridgeIoCheckParameter call above will ensure that this\r
+ // path is not taken.\r
+ //\r
+ ASSERT (FALSE);\r
+ break;\r
+ }\r
+ }\r
+ }\r
+#endif\r
+\r
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {\r
if (Write) {\r
switch (OperationWidth) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- if (Width < 0 || Width > EfiPciWidthUint64) {\r
+ if ((UINT32)Width > EfiPciWidthUint64) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- if (Width < 0 || Width > EfiPciWidthUint64) {\r
+ if ((UINT32)Width > EfiPciWidthUint64) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
UINTN Index;\r
UINT64 Result;\r
\r
- if (Width < 0 || Width > EfiPciWidthUint64) {\r
+ if ((UINT32)Width > EfiPciWidthUint64) {\r
return EFI_INVALID_PARAMETER;\r
} \r
\r
//\r
// Make sure that Operation is valid\r
//\r
- if (Operation < 0 || Operation >= EfiPciOperationMaximum) {\r
+ if ((UINT32)Operation >= EfiPciOperationMaximum) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r