mace_pci_read_config(struct pci_bus *bus, unsigned int devfn,
int reg, int size, u32 *val)
{
+ u32 control = mace->pci.control;
+
+ /* disable master aborts interrupts during config read */
+ mace->pci.control = control & ~MACEPCI_CONTROL_MAR_INT;
mace->pci.config_addr = mkaddr(bus, devfn, reg);
switch (size) {
case 1:
*val = mace->pci.config_data.l;
break;
}
+ /* ack possible master abort */
+ mace->pci.error &= ~MACEPCI_ERROR_MASTER_ABORT;
+ mace->pci.control = control;
DPRINTK("read%d: reg=%08x,val=%02x\n", size * 8, reg, *val);