arm: Enforce should-be-1 bits in MRS decoding

[mirror_qemu.git] / default-configs / sparc-softmmu.mak

diff --git a/default-configs/sparc-softmmu.mak b/default-configs/sparc-softmmu.mak
index 25bcbe38bc781b50485dfd6210f1f5ef321b600b..004b0f4e77dac6b4784396a2af1510218dbeae08 100644 (file)
--- a/default-configs/sparc-softmmu.mak
+++ b/default-configs/sparc-softmmu.mak
@@ -1,5 +1,6 @@
 # Default configuration for sparc-softmmu
 
+CONFIG_ISA_BUS=y
 CONFIG_ECC=y
 CONFIG_ESP=y
 CONFIG_ESCC=y
@@ -10,4 +11,10 @@ CONFIG_EMPTY_SLOT=y
 CONFIG_PCNET_COMMON=y
 CONFIG_LANCE=y
 CONFIG_TCX=y
+CONFIG_CG3=y
+CONFIG_SLAVIO=y
 CONFIG_CS4231=y
+CONFIG_GRLIB=y
+CONFIG_STP2000=y
+CONFIG_ECCMEMCTL=y
+CONFIG_SUN4M=y