sysbus: apic: ioapic: convert to QEMU Object Model

[qemu.git] / hw / a9mpcore.c

diff --git a/hw/a9mpcore.c b/hw/a9mpcore.c
index 521b8cc784e4f11a83ba71311b8836691f0229b3..b42c475077055fba675f107e2a662fb91b6436d1 100644 (file)
--- a/hw/a9mpcore.c
+++ b/hw/a9mpcore.c
@@ -208,13 +208,20 @@ static const VMStateDescription vmstate_a9mp_priv = {
     }
 };
 
-static SysBusDeviceInfo a9mp_priv_info = {
-    .init = a9mp_priv_init,
-    .qdev.name  = "a9mpcore_priv",
-    .qdev.size  = sizeof(a9mp_priv_state),
-    .qdev.vmsd = &vmstate_a9mp_priv,
-    .qdev.reset = a9mp_priv_reset,
-    .qdev.props = (Property[]) {
+static void a9mp_priv_class_init(ObjectClass *klass, void *data)
+{
+    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+    k->init = a9mp_priv_init;
+}
+
+static DeviceInfo a9mp_priv_info = {
+    .name = "a9mpcore_priv",
+    .size  = sizeof(a9mp_priv_state),
+    .vmsd = &vmstate_a9mp_priv,
+    .reset = a9mp_priv_reset,
+    .class_init = a9mp_priv_class_init,
+    .props = (Property[]) {
         DEFINE_PROP_UINT32("num-cpu", a9mp_priv_state, num_cpu, 1),
         /* The Cortex-A9MP may have anything from 0 to 224 external interrupt
          * IRQ lines (with another 32 internal). We default to 64+32, which