New -cpu options: choose CPU model for emulated target.

[mirror_qemu.git] / hw / mips_r4k.c

diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c
index 1f779b2ff69987e4ba94ae95ce1122d36756b79d..91d8021ddaf9c7d830fcefad1b95b66127af5881 100644 (file)
--- a/hw/mips_r4k.c
+++ b/hw/mips_r4k.c
@@ -9,11 +9,14 @@
 */
 #include "vl.h"
 
+#ifdef TARGET_WORDS_BIGENDIAN
 #define BIOS_FILENAME "mips_bios.bin"
-//#define BIOS_FILENAME "system.bin"
-#define KERNEL_LOAD_ADDR (int32_t)0x80010000
+#else
+#define BIOS_FILENAME "mipsel_bios.bin"
+#endif
+
 #ifdef MIPS_HAS_MIPS64
-#define INITRD_LOAD_ADDR (int64_t)0x80800000
+#define INITRD_LOAD_ADDR (int64_t)(int32_t)0x80800000
 #else
 #define INITRD_LOAD_ADDR (int32_t)0x80800000
 #endif
@@ -24,6 +27,9 @@ static const int ide_iobase[2] = { 0x1f0, 0x170 };
 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 static const int ide_irq[2] = { 14, 15 };
 
+static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
+static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
+
 extern FILE *logfile;
 
 static PITState *pit; /* PIT i8254 */
@@ -32,14 +38,7 @@ static PITState *pit; /* PIT i8254 */
 /*The PIC is attached to the MIPS CPU INT0 pin */
 static void pic_irq_request(void *opaque, int level)
 {
-    CPUState *env = first_cpu;
-    if (level) {
-        env->CP0_Cause |= 0x00000400;
-        cpu_interrupt(env, CPU_INTERRUPT_HARD);
-    } else {
-       env->CP0_Cause &= ~0x00000400;
-        cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
-    }
+    cpu_mips_irq_request(opaque, 2, level);
 }
 
 static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,
@@ -83,14 +82,9 @@ void load_kernel (CPUState *env, int ram_size, const char *kernel_filename,
             entry = (int32_t)entry;
         env->PC = entry;
     } else {
-        kernel_size = load_image(kernel_filename,
-                                 phys_ram_base + KERNEL_LOAD_ADDR + VIRT_TO_PHYS_ADDEND);
-        if (kernel_size < 0) {
-            fprintf(stderr, "qemu: could not load kernel '%s'\n",
-                    kernel_filename);
-            exit(1);
-        }
-        env->PC = KERNEL_LOAD_ADDR;
+        fprintf(stderr, "qemu: could not load kernel '%s'\n",
+                kernel_filename);
+        exit(1);
     }
 
     /* load initrd */
@@ -109,7 +103,7 @@ void load_kernel (CPUState *env, int ram_size, const char *kernel_filename,
     if (initrd_size > 0) {
         int ret;
         ret = sprintf(phys_ram_base + (16 << 20) - 256,
-                      "rd_start=0x" TLSZ " rd_size=%li ",
+                      "rd_start=0x" TARGET_FMT_lx " rd_size=%li ",
                       INITRD_LOAD_ADDR,
                       initrd_size);
         strcpy (phys_ram_base + (16 << 20) - 256 + ret, kernel_cmdline);
@@ -118,8 +112,8 @@ void load_kernel (CPUState *env, int ram_size, const char *kernel_filename,
         strcpy (phys_ram_base + (16 << 20) - 256, kernel_cmdline);
     }
 
-    *(int *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);
-    *(int *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);
+    *(int32_t *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);
+    *(int32_t *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);
 }
 
 static void main_cpu_reset(void *opaque)
@@ -132,14 +126,15 @@ static void main_cpu_reset(void *opaque)
                      env->kernel_cmdline, env->initrd_filename);
 }
 
+static
 void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
                     DisplayState *ds, const char **fd_filename, int snapshot,
                     const char *kernel_filename, const char *kernel_cmdline,
-                    const char *initrd_filename)
+                    const char *initrd_filename, const char *cpu_model)
 {
     char buf[1024];
     unsigned long bios_offset;
-    int ret;
+    int bios_size;
     CPUState *env;
     static RTCState *rtc_state;
     int i;
@@ -163,9 +158,9 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
        run. */
     bios_offset = ram_size + vga_ram_size;
     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
-    ret = load_image(buf, phys_ram_base + bios_offset);
-    if (ret == BIOS_SIZE) {
-       cpu_register_physical_memory((uint32_t)(0x1fc00000),
+    bios_size = load_image(buf, phys_ram_base + bios_offset);
+    if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
+       cpu_register_physical_memory(0x1fc00000,
                                     BIOS_SIZE, bios_offset | IO_MEM_ROM);
     } else {
        /* not fatal */
@@ -195,7 +190,13 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
     isa_pic = pic_init(pic_irq_request, env);
     pit = pit_init(0x40, 0);
 
-    serial_init(&pic_set_irq_new, isa_pic, 0x3f8, 4, serial_hds[0]);
+    for(i = 0; i < MAX_SERIAL_PORTS; i++) {
+        if (serial_hds[i]) {
+            serial_init(&pic_set_irq_new, isa_pic,
+                        serial_io[i], serial_irq[i], serial_hds[i]);
+        }
+    }
+
     isa_vga_init(ds, phys_ram_base + ram_size, ram_size, 
                  vga_ram_size);
 
@@ -212,6 +213,9 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
     for(i = 0; i < 2; i++)
         isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
                      bs_table[2 * i], bs_table[2 * i + 1]);
+
+    kbd_init();
+    ds1225y_init(0x9000, "nvram");
 }
 
 QEMUMachine mips_machine = {