else
return env->CP0_Count +
(uint32_t)muldiv64(qemu_get_clock(vm_clock),
- TIMER_FREQ, ticks_per_sec);
+ TIMER_FREQ, get_ticks_per_sec());
}
static void cpu_mips_timer_update(CPUState *env)
now = qemu_get_clock(vm_clock);
wait = env->CP0_Compare - env->CP0_Count -
- (uint32_t)muldiv64(now, TIMER_FREQ, ticks_per_sec);
- next = now + muldiv64(wait, ticks_per_sec, TIMER_FREQ);
+ (uint32_t)muldiv64(now, TIMER_FREQ, get_ticks_per_sec());
+ next = now + muldiv64(wait, get_ticks_per_sec(), TIMER_FREQ);
qemu_mod_timer(env->timer, next);
}
/* Store new count register */
env->CP0_Count =
count - (uint32_t)muldiv64(qemu_get_clock(vm_clock),
- TIMER_FREQ, ticks_per_sec);
+ TIMER_FREQ, get_ticks_per_sec());
/* Update timer timer */
cpu_mips_timer_update(env);
}
{
/* Store the current value */
env->CP0_Count += (uint32_t)muldiv64(qemu_get_clock(vm_clock),
- TIMER_FREQ, ticks_per_sec);
+ TIMER_FREQ, get_ticks_per_sec());
}
static void mips_timer_cb (void *opaque)