#include "sysemu.h"
#include "block.h"
#include "boards.h"
-
-extern int loglevel;
-extern FILE *logfile;
+#include "qemu-log.h"
#define BIOS_FILENAME "ppc405_rom.bin"
#undef BIOS_SIZE
}
}
-static void ref405ep_init (int ram_size, int vga_ram_size,
+static void ref405ep_init (ram_addr_t ram_size, int vga_ram_size,
const char *boot_device, DisplayState *ds,
const char *kernel_filename,
const char *kernel_cmdline,
bdrv_get_device_name(drives_table[index].bdrv), fl_sectors);
#endif
pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,
- drives_table[index].bdrv, 65536, fl_sectors, 2,
- 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
+ drives_table[index].bdrv, 65536, fl_sectors, 1,
+ 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
fl_idx++;
} else
#endif
"ref405ep",
"ref405ep",
ref405ep_init,
+ (128 * 1024 * 1024 + 4096 + 512 * 1024 + BIOS_SIZE) | RAMSIZE_FIXED,
};
/*****************************************************************************/
}
}
-static void taihu_405ep_init(int ram_size, int vga_ram_size,
+static void taihu_405ep_init(ram_addr_t ram_size, int vga_ram_size,
const char *boot_device, DisplayState *ds,
const char *kernel_filename,
const char *kernel_cmdline,
bdrv_get_device_name(drives_table[index].bdrv), fl_sectors);
#endif
pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,
- drives_table[index].bdrv, 65536, fl_sectors, 4,
- 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
+ drives_table[index].bdrv, 65536, fl_sectors, 1,
+ 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
fl_idx++;
} else
#endif
bdrv_get_device_name(drives_table[index].bdrv));
#endif
pflash_cfi02_register(0xfc000000, bios_offset,
- drives_table[index].bdrv, 65536, fl_sectors, 4,
- 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
+ drives_table[index].bdrv, 65536, fl_sectors, 1,
+ 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
fl_idx++;
}
/* Register CLPD & LCD display */
"taihu",
"taihu",
taihu_405ep_init,
+ (128 * 1024 * 1024 + 4096 + BIOS_SIZE + 32 * 1024 * 1024) | RAMSIZE_FIXED,
};