static void pci_vpb_config_writew (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
-#ifdef TARGET_WORDS_BIGENDIAN
- val = bswap16(val);
-#endif
pci_data_write(opaque, vpb_pci_config_addr (addr), val, 2);
}
static void pci_vpb_config_writel (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
-#ifdef TARGET_WORDS_BIGENDIAN
- val = bswap32(val);
-#endif
pci_data_write(opaque, vpb_pci_config_addr (addr), val, 4);
}
{
uint32_t val;
val = pci_data_read(opaque, vpb_pci_config_addr (addr), 2);
-#ifdef TARGET_WORDS_BIGENDIAN
- val = bswap16(val);
-#endif
return val;
}
{
uint32_t val;
val = pci_data_read(opaque, vpb_pci_config_addr (addr), 4);
-#ifdef TARGET_WORDS_BIGENDIAN
- val = bswap32(val);
-#endif
return val;
}
}
bus = pci_register_bus(&dev->qdev, "pci",
pci_vpb_set_irq, pci_vpb_map_irq, s->irq,
- 11 << 3, 4);
+ PCI_DEVFN(11, 0), 4);
/* ??? Register memory space. */
s->mem_config = cpu_register_io_memory(pci_vpb_config_read,
- pci_vpb_config_write, bus);
+ pci_vpb_config_write, bus,
+ DEVICE_LITTLE_ENDIAN);
sysbus_init_mmio_cb(dev, 0x04000000, pci_vpb_map);
pci_create_simple(bus, -1, "versatile_pci_host");
static int versatile_pci_host_init(PCIDevice *d)
{
- pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_XILINX);
- /* Both boards have the same device ID. Oh well. */
- pci_config_set_device_id(d->config, PCI_DEVICE_ID_XILINX_XC2VP30);
pci_set_word(d->config + PCI_STATUS,
PCI_STATUS_66MHZ | PCI_STATUS_DEVSEL_MEDIUM);
- pci_config_set_class(d->config, PCI_CLASS_PROCESSOR_CO);
pci_set_byte(d->config + PCI_LATENCY_TIMER, 0x10);
return 0;
}
.qdev.name = "versatile_pci_host",
.qdev.size = sizeof(PCIDevice),
.init = versatile_pci_host_init,
+ .vendor_id = PCI_VENDOR_ID_XILINX,
+ /* Both boards have the same device ID. Oh well. */
+ .device_id = PCI_DEVICE_ID_XILINX_XC2VP30,
+ .class_id = PCI_CLASS_PROCESSOR_CO,
};
static void versatile_pci_register_devices(void)