xen_console: support the new extended xenstore protocol

[qemu.git] / hw / xilinx_timer.c

diff --git a/hw/xilinx_timer.c b/hw/xilinx_timer.c
index 68d6c1886e49c8124f8ab0c77c3dbe14d1500302..d398c18e9e137ef2fbddb384faa50a4a97b56f34 100644 (file)
--- a/hw/xilinx_timer.c
+++ b/hw/xilinx_timer.c
@@ -23,7 +23,6 @@
  */
 
 #include "sysbus.h"
-#include "sysemu.h"
 #include "qemu-timer.h"
 
 #define D(x)
@@ -66,7 +65,7 @@ struct timerblock
     struct xlx_timer *timers;
 };
 
-static inline unsigned int timer_from_addr(a_target_phys_addr addr)
+static inline unsigned int timer_from_addr(target_phys_addr_t addr)
 {
     /* Timers get a 4x32bit control reg area each.  */
     return addr >> 2;
@@ -86,7 +85,7 @@ static void timer_update_irq(struct timerblock *t)
     qemu_set_irq(t->irq, !!irq);
 }
 
-static uint32_t timer_readl (void *opaque, a_target_phys_addr addr)
+static uint32_t timer_readl (void *opaque, target_phys_addr_t addr)
 {
     struct timerblock *t = opaque;
     struct xlx_timer *xt;
@@ -135,7 +134,7 @@ static void timer_enable(struct xlx_timer *xt)
 }
 
 static void
-timer_writel (void *opaque, a_target_phys_addr addr, uint32_t value)
+timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
 {
     struct timerblock *t = opaque;
     struct xlx_timer *xt;
@@ -210,7 +209,8 @@ static int xilinx_timer_init(SysBusDevice *dev)
         ptimer_set_freq(xt->ptimer, t->freq_hz);
     }
 
-    timer_regs = cpu_register_io_memory(timer_read, timer_write, t);
+    timer_regs = cpu_register_io_memory(timer_read, timer_write, t,
+                                        DEVICE_NATIVE_ENDIAN);
     sysbus_init_mmio(dev, R_MAX * 4 * t->nr_timers, timer_regs);
     return 0;
 }