X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;ds=sidebyside;f=MdePkg%2FLibrary%2FBaseLib%2FIa32%2FFlushCacheLine.c;h=7ad12aba14cbbf07fb8d269ed3a4221b64bbe2be;hb=881813d7a93d9009c873515b043c41c4554779e4;hp=3b3a43324edd2fe832ac2a0d28f6c50724e78282;hpb=d2660fe32d000765cc5d370bdc4452fec9389b2a;p=mirror_edk2.git

diff --git a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c
index 3b3a43324e..7ad12aba14 100644
--- a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c
+++ b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c
@@ -1,7 +1,7 @@
 /** @file
   AsmFlushCacheLine function
 
-  Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -36,9 +36,23 @@ AsmFlushCacheLine (
   IN      VOID                      *LinearAddress
   )
 {
+  //
+  // If the CPU does not support CLFLUSH instruction, 
+  // then promote flush range to flush entire cache.
+  //
   _asm {
-    mov     eax, LinearAddress
+    mov     eax, 1
+    cpuid
+    test    edx, BIT19
+    jz      NoClflush
+    mov     eax, [esp + 4]
     clflush [eax]
+    jmp     Done
+NoClflush:
+    wbinvd
+Done:
   }
+  
+  return LinearAddress;
 }