X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=ArmPkg%2FInclude%2FLibrary%2FArmLib.h;h=23beb242749cfe41d5fb03098a684f324130ab7a;hb=5767f22fca7c337cdc113e14b411c1fd0ea7bd53;hp=f34ab42ced4329783775057c7aba631c4884b270;hpb=836c350061600e6cde14b73417b9d073b00b0f69;p=mirror_edk2.git diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h index f34ab42ced..23beb24274 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -77,6 +77,9 @@ typedef struct { typedef VOID (*CACHE_OPERATION)(VOID); typedef VOID (*LINE_OPERATION)(UINTN); +// +// ARM Processor Mode +// typedef enum { ARM_PROCESSOR_MODE_USER = 0x10, ARM_PROCESSOR_MODE_FIQ = 0x11, @@ -89,13 +92,35 @@ typedef enum { ARM_PROCESSOR_MODE_MASK = 0x1F } ARM_PROCESSOR_MODE; +// +// ARM Cpu IDs +// +#define ARM_CPU_IMPLEMENTER_MASK (0xFFU << 24) +#define ARM_CPU_IMPLEMENTER_ARMLTD (0x41U << 24) +#define ARM_CPU_IMPLEMENTER_DEC (0x44U << 24) +#define ARM_CPU_IMPLEMENTER_MOT (0x4DU << 24) +#define ARM_CPU_IMPLEMENTER_QUALCOMM (0x51U << 24) +#define ARM_CPU_IMPLEMENTER_MARVELL (0x56U << 24) + +#define ARM_CPU_PRIMARY_PART_MASK (0xFFF << 4) +#define ARM_CPU_PRIMARY_PART_CORTEXA5 (0xC05 << 4) +#define ARM_CPU_PRIMARY_PART_CORTEXA7 (0xC07 << 4) +#define ARM_CPU_PRIMARY_PART_CORTEXA8 (0xC08 << 4) +#define ARM_CPU_PRIMARY_PART_CORTEXA9 (0xC09 << 4) +#define ARM_CPU_PRIMARY_PART_CORTEXA15 (0xC0F << 4) + +// +// ARM MP Core IDs +// #define IS_PRIMARY_CORE(MpId) (((MpId) & PcdGet32(PcdArmPrimaryCoreMask)) == PcdGet32(PcdArmPrimaryCore)) -#define GET_CORE_ID(MpId) ((MpId) & 0xFF) -#define GET_CLUSTER_ID(MpId) (((MpId) >> 8) & 0xFF) +#define ARM_CORE_MASK 0xFF +#define ARM_CLUSTER_MASK (0xFF << 8) +#define GET_CORE_ID(MpId) ((MpId) & ARM_CORE_MASK) +#define GET_CLUSTER_ID(MpId) (((MpId) & ARM_CLUSTER_MASK) >> 8) // Get the position of the core for the Stack Offset (4 Core per Cluster) // Position = (ClusterId * 4) + CoreId -#define GET_CORE_POS(MpId) ((((MpId) >> 6) & 0xFF) + ((MpId) & 0xFF)) -#define PRIMARY_CORE_ID (PcdGet32(PcdArmPrimaryCore) & 0xFF) +#define GET_CORE_POS(MpId) ((((MpId) & ARM_CLUSTER_MASK) >> 6) + ((MpId) & ARM_CORE_MASK)) +#define PRIMARY_CORE_ID (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK) ARM_CACHE_TYPE EFIAPI