X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=ArmPkg%2FLibrary%2FArmLib%2FAArch64%2FArmLibSupportV8.S;h=341bbce76cbd064e52ce9f565c38d762074a91ee;hb=4af3dd80abb759f3c439f8d1369a57745db08d30;hp=8fd4194ab2bcb5d56741910f2a4d648312582326;hpb=51ad04cbd1ecb31aa91a611a251573ab72553b4e;p=mirror_edk2.git diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S index 8fd4194ab2..341bbce76c 100644 --- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S +++ b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S @@ -35,12 +35,14 @@ GCC_ASM_EXPORT (ReadCLIDR) .set MPIDR_U_BIT, (30) .set MPIDR_U_MASK, (1 << MPIDR_U_BIT) -.set DAIF_FIQ_BIT, (1 << 0) -.set DAIF_IRQ_BIT, (1 << 1) -.set DAIF_ABORT_BIT, (1 << 2) -.set DAIF_DEBUG_BIT, (1 << 3) -.set DAIF_INT_BITS, (DAIF_FIQ_BIT | DAIF_IRQ_BIT) -.set DAIF_ALL, (DAIF_DEBUG_BIT | DAIF_ABORT_BIT | DAIF_INT_BITS) + +// DAIF bit definitions for writing through msr daifclr/sr daifset +.set DAIF_WR_FIQ_BIT, (1 << 0) +.set DAIF_WR_IRQ_BIT, (1 << 1) +.set DAIF_WR_ABORT_BIT, (1 << 2) +.set DAIF_WR_DEBUG_BIT, (1 << 3) +.set DAIF_WR_INT_BITS, (DAIF_WR_FIQ_BIT | DAIF_WR_IRQ_BIT) +.set DAIF_WR_ALL, (DAIF_WR_DEBUG_BIT | DAIF_WR_ABORT_BIT | DAIF_WR_INT_BITS) ASM_PFX(ArmIsMpCore): @@ -52,55 +54,55 @@ ASM_PFX(ArmIsMpCore): ASM_PFX(ArmEnableAsynchronousAbort): - msr daifclr, #DAIF_ABORT_BIT + msr daifclr, #DAIF_WR_ABORT_BIT isb ret ASM_PFX(ArmDisableAsynchronousAbort): - msr daifset, #DAIF_ABORT_BIT + msr daifset, #DAIF_WR_ABORT_BIT isb ret ASM_PFX(ArmEnableIrq): - msr daifclr, #DAIF_IRQ_BIT + msr daifclr, #DAIF_WR_IRQ_BIT isb ret ASM_PFX(ArmDisableIrq): - msr daifset, #DAIF_IRQ_BIT + msr daifset, #DAIF_WR_IRQ_BIT isb ret ASM_PFX(ArmEnableFiq): - msr daifclr, #DAIF_FIQ_BIT + msr daifclr, #DAIF_WR_FIQ_BIT isb ret ASM_PFX(ArmDisableFiq): - msr daifset, #DAIF_FIQ_BIT + msr daifset, #DAIF_WR_FIQ_BIT isb ret ASM_PFX(ArmEnableInterrupts): - msr daifclr, #DAIF_INT_BITS + msr daifclr, #DAIF_WR_INT_BITS isb ret ASM_PFX(ArmDisableInterrupts): - msr daifset, #DAIF_INT_BITS + msr daifset, #DAIF_WR_INT_BITS isb ret ASM_PFX(ArmDisableAllExceptions): - msr daifset, #DAIF_ALL + msr daifset, #DAIF_WR_ALL isb ret