X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=ArmPlatformPkg%2FArmPlatformPkg.dec;h=b9f38b674700ba1fc2fe52b110856044811727af;hb=1e62c89c3ae0da2eeabb37c5ab299b928ebbbb30;hp=c36773dd890d3228cf311d882b38b9eff20c39d5;hpb=90d6a1bbf11487d679c21f54fb79e538574944ea;p=mirror_edk2.git diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec b/ArmPlatformPkg/ArmPlatformPkg.dec index c36773dd89..b9f38b6747 100644 --- a/ArmPlatformPkg/ArmPlatformPkg.dec +++ b/ArmPlatformPkg/ArmPlatformPkg.dec @@ -1,21 +1,21 @@ #/** @file # -# Copyright (c) 2011, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php +# Copyright (c) 2011-2014, ARM Limited. All rights reserved. # -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. # #**/ [Defines] DEC_SPECIFICATION = 0x00010005 PACKAGE_NAME = ArmPlatformPkg - PACKAGE_GUID = 3308e0a0-1d94-11e0-915c-0002a5d5c51b + PACKAGE_GUID = 3308e0a0-1d94-11e0-915c-0002a5d5c51b PACKAGE_VERSION = 0.1 ################################################################################ @@ -40,6 +40,8 @@ ## Include/Guid/ArmGlobalVariableHob.h gArmGlobalVariableGuid = { 0xc3253c90, 0xa24f, 0x4599, { 0xa6, 0x64, 0x1f, 0x88, 0x13, 0x77, 0x8f, 0xc9} } + gArmBootMonFsFileInfoGuid = { 0x41e26b9c, 0xada6, 0x45b3, { 0x80, 0x8e, 0x23, 0x57, 0xa3, 0x5b, 0x60, 0xd6 } } + [Ppis] ## Include/Ppi/ArmGlobalVariable.h gArmGlobalVariablePpiGuid = { 0xab1c1816, 0xd542, 0x4e6f, {0x9b, 0x1e, 0x8e, 0xcd, 0x92, 0x53, 0xe2, 0xe7} } @@ -47,30 +49,31 @@ [PcdsFeatureFlag.common] # Set this PCD to TRUE to map NORFlash at 0x0. FALSE means the DRAM is mapped at 0x0. gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping|FALSE|BOOLEAN|0x00000012 - + gArmPlatformTokenSpaceGuid.PcdStandalone|TRUE|BOOLEAN|0x00000001 gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|FALSE|BOOLEAN|0x00000002 gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|FALSE|BOOLEAN|0x00000004 + gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x0000003C + + # Disable the GOP controller on ExitBootServices(). By default the value is FALSE, + # we assume the OS will handle the FrameBuffer from the UEFI GOP information. + gArmPlatformTokenSpaceGuid.PcdGopDisableOnExitBootServices|FALSE|BOOLEAN|0x0000003D + [PcdsFixedAtBuild.common] - # These PCDs should be FeaturePcds. But we used these PCDs as an '#if' in an ASM file. - # Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor. + gArmPlatformTokenSpaceGuid.PcdCoreCount|1|UINT32|0x00000039 gArmPlatformTokenSpaceGuid.PcdClusterCount|1|UINT32|0x00000038 - + # Stack for CPU Cores in Secure Mode gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0|UINT32|0x00000005 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x10000|UINT32|0x00000036 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000|UINT32|0x00000006 - # Stack for CPU Cores in Secure Monitor Mode - gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0|UINT32|0x00000007 - gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x1000|UINT32|0x00000008 - # Stack for CPU Cores in Non Secure Mode - gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0|UINT32|0x00000009 + gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0|UINT64|0x00000009 gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000|UINT32|0x00000037 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000|UINT32|0x0000000A - + # Size of the region used by UEFI in permanent memory (Reserved 128MB by default) gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x08000000|UINT32|0x00000015 @@ -78,13 +81,16 @@ # = sizeof(UINTN) /* PcdPeiServicePtr or HobListPtr */ gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize|0x4|UINT32|0x00000016 # PeiServicePtr and HobListPtr shares the same location in the PEI Global Variable list - # PeiServicePtr is only valid with PEI Core and HobListPtr only when the PEI Core is skipped. + # PeiServicePtr is only valid with PEI Core and HobListPtr only when the PEI Core is skipped. gArmPlatformTokenSpaceGuid.PcdPeiServicePtrGlobalOffset|0x0|UINT32|0x00000017 gArmPlatformTokenSpaceGuid.PcdHobListPtrGlobalOffset|0x0|UINT32|0x00000018 # Size to reserve in the primary core stack for SEC Global Variables gArmPlatformTokenSpaceGuid.PcdSecGlobalVariableSize|0x0|UINT32|0x00000031 + # Boot Monitor FileSystem + gArmPlatformTokenSpaceGuid.PcdBootMonFsSupportedDevicePaths|L""|VOID*|0x0000003A + # # ARM Primecells # @@ -101,20 +107,17 @@ gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|32000|UINT32|0x00000021 ## PL011 UART - gArmPlatformTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0x00000000|UINT32|0x0000001F - gArmPlatformTokenSpaceGuid.PcdUartDefaultTimeout|0x00000000|UINT32|0x00000020 - - ## PL031 RealTimeClock - gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0|UINT32|0x00000024 - gArmPlatformTokenSpaceGuid.PcdPL031RtcPpmAccuracy|300000000|UINT32|0x00000022 + gArmPlatformTokenSpaceGuid.PL011UartClkInHz|24000000|UINT32|0x0000001F + gArmPlatformTokenSpaceGuid.PL011UartInteger|0|UINT32|0x00000020 + gArmPlatformTokenSpaceGuid.PL011UartFractional|0|UINT32|0x0000002D ## PL061 GPIO gArmPlatformTokenSpaceGuid.PcdPL061GpioBase|0x0|UINT32|0x00000025 - - ## PL111 Lcd + + ## PL111 Lcd & HdLcd gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x0|UINT32|0x00000026 gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase|0x0|UINT32|0x00000027 - + ## PL180 MCI gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x00000000|UINT32|0x00000028 gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x00000000|UINT32|0x00000029 @@ -126,18 +129,35 @@ gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"Default Boot Device"|VOID*|0x0000000C gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L""|VOID*|0x0000000D gArmPlatformTokenSpaceGuid.PcdDefaultBootInitrdPath|L""|VOID*|0x0000000E - gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|""|VOID*|0x000000F - # PcdDefaultBootType define the type of the binary pointed by PcdDefaultBootDevicePath: + gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|L""|VOID*|0x000000F + # PcdDefaultBootType define the type of the binary pointed by PcdDefaultBootDevicePath: # - 0 = an EFI application # - 1 = a Linux kernel with ATAG support # - 2 = a Linux kernel with FDT support gArmPlatformTokenSpaceGuid.PcdDefaultBootType|0|UINT32|0x00000010 gArmPlatformTokenSpaceGuid.PcdFdtDevicePath|L""|VOID*|0x00000011 - + ## Timeout value for displaying progressing bar in before boot OS. # According to UEFI 2.0 spec, the default TimeOut should be 0xffff. gArmPlatformTokenSpaceGuid.PcdPlatformBootTimeOut|0xffff|UINT16|0x0000001A - + gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L""|VOID*|0x0000001B gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L""|VOID*|0x0000001C - + +[PcdsFixedAtBuild.common,PcdsDynamic.common] + ## PL031 RealTimeClock + gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0|UINT32|0x00000024 + gArmPlatformTokenSpaceGuid.PcdPL031RtcPpmAccuracy|300000000|UINT32|0x00000022 + +[PcdsFixedAtBuild.ARM] + # Stack for CPU Cores in Secure Monitor Mode + gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0|UINT32|0x00000007 + gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x1000|UINT32|0x00000008 + +[PcdsFixedAtBuild.AARCH64] + # The Secure World is only running in EL3. Only one set of stacks is needed for AArch64. + # The Secure stacks are described by PcdCPUCoresSecStackBase, PcdCPUCoreSecPrimaryStackSize + # and PcdCPUCoreSecSecondaryStackSize + gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0|UINT32|0x00000007 + gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x0|UINT32|0x00000008 +