X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=ArmPlatformPkg%2FArmVExpressPkg%2FLibrary%2FArmVExpressLibCTA9x4%2FCTA9x4Sec.c;h=37140a4a58076c77df8c33325e8da294f8f552bb;hb=f437141a9cf4ce1052566a3b2bf656383f488d4a;hp=46ca8eaac487ad5896fbad9fbeaf66d79b364aba;hpb=5cc45b70c310f853f28b2351f3d93109ff858dcf;p=mirror_edk2.git

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Sec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Sec.c
index 46ca8eaac4..37140a4a58 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Sec.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Sec.c
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2011, ARM Limited. All rights reserved.
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
 *  
 *  This program and the accompanying materials                          
 *  are licensed and made available under the terms and conditions of the BSD License         
@@ -13,12 +13,12 @@
 **/
 
 #include <Library/ArmPlatformLib.h>
-#include <Library/ArmTrustZoneLib.h>
 #include <Library/ArmPlatformSysConfigLib.h>
 #include <Library/DebugLib.h>
 #include <Library/IoLib.h>
 #include <Library/PcdLib.h>
 
+#include <Drivers/ArmTrustzone.h>
 #include <Drivers/PL310L2Cache.h>
 
 #include <ArmPlatform.h>
@@ -32,13 +32,24 @@
 **/
 VOID
 ArmPlatformTrustzoneInit (
-  VOID
+  IN  UINTN                     MpId
   )
 {
+  // Nothing to do
+  if (!IS_PRIMARY_CORE(MpId)) {
+    return;
+  }
+
   //
   // Setup TZ Protection Controller
   //
 
+  if (MmioRead32(ARM_VE_SYS_CFGRW1_REG) & ARM_VE_CFGRW1_TZASC_EN_BIT_MASK) {
+    ASSERT (PcdGetBool (PcdTrustzoneSupport) == TRUE);
+  } else {
+    ASSERT (PcdGetBool (PcdTrustzoneSupport) == FALSE);
+  }
+
   // Set Non Secure access for all devices
   TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0, 0xFFFFFFFF);
   TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_1, 0xFFFFFFFF);
@@ -61,29 +72,29 @@ ArmPlatformTrustzoneInit (
       TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
 
   // NOR Flash 1. The first half of the NOR Flash1 must be secure for the secure firmware (sec_uefi.bin)
-#if EDK2_ARMVE_SECURE_SYSTEM
-  //Note: Your OS Kernel must be aware of the secure regions before to enable this region
-  TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
-      ARM_VE_SMB_NOR1_BASE + SIZE_32MB,0,
-      TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
-#else
-  TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
-      ARM_VE_SMB_NOR1_BASE,0,
-      TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
-#endif
+  if (PcdGetBool (PcdTrustzoneSupport) == TRUE) {
+    //Note: Your OS Kernel must be aware of the secure regions before to enable this region
+    TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
+        ARM_VE_SMB_NOR1_BASE + SIZE_32MB,0,
+        TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
+  } else {
+    TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
+        ARM_VE_SMB_NOR1_BASE,0,
+        TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
+  }
 
   // Base of SRAM. Only half of SRAM in Non Secure world
   // First half non secure (16MB) + Second Half secure (16MB) = 32MB of SRAM
-#if EDK2_ARMVE_SECURE_SYSTEM
-  //Note: Your OS Kernel must be aware of the secure regions before to enable this region
-  TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
-      ARM_VE_SMB_SRAM_BASE,0,
-      TZASC_REGION_SIZE_16MB, TZASC_REGION_SECURITY_NSRW);
-#else
-  TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
-      ARM_VE_SMB_SRAM_BASE,0,
-      TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
-#endif
+  if (PcdGetBool (PcdTrustzoneSupport) == TRUE) {
+    //Note: Your OS Kernel must be aware of the secure regions before to enable this region
+    TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
+        ARM_VE_SMB_SRAM_BASE,0,
+        TZASC_REGION_SIZE_16MB, TZASC_REGION_SECURITY_NSRW);
+  } else {
+    TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
+        ARM_VE_SMB_SRAM_BASE,0,
+        TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
+  }
 
   // Memory Mapped Peripherals. All in non secure world
   TZASCSetRegion(ARM_VE_TZASC_BASE,4,TZASC_REGION_ENABLED,