X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=ArmPlatformPkg%2FPrePeiCore%2FAArch64%2FHelper.S;h=b4f35b7ff5d389ecf61c025f85bb6cf8fcce793d;hb=f33d5d68abc02727dc828c1079e72ab65e1d63af;hp=14e9cb8d8b5d13377678630f93df368f54ad8da2;hpb=1bc8326695a2181cb5934c3dfb01b0a26c4096a0;p=mirror_edk2.git

diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S b/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S
index 14e9cb8d8b..b4f35b7ff5 100644
--- a/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S
+++ b/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S
@@ -1,5 +1,5 @@
 #========================================================================================
-#  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+#  Copyright (c) 2011-2017, ARM Limited. All rights reserved.
 #
 #  This program and the accompanying materials
 #  are licensed and made available under the terms and conditions of the BSD License
@@ -14,15 +14,8 @@
 #include <AsmMacroIoLibV8.h>
 #include <Chipset/AArch64.h>
 
-#start of the code section
-.text
-.align 3
-
-ASM_GLOBAL ASM_PFX(SetupExceptionLevel1)
-ASM_GLOBAL ASM_PFX(SetupExceptionLevel2)
-
 // Setup EL1 while in EL1
-ASM_PFX(SetupExceptionLevel1):
+ASM_FUNC(SetupExceptionLevel1)
    mov  x5, x30                   // Save LR
 
    mov  x0, #CPACR_CP_FULL_ACCESS
@@ -31,7 +24,7 @@ ASM_PFX(SetupExceptionLevel1):
    ret  x5
 
 // Setup EL2 while in EL2
-ASM_PFX(SetupExceptionLevel2):
+ASM_FUNC(SetupExceptionLevel2)
    msr     sctlr_el2, xzr
    mrs     x0, hcr_el2            // Read EL2 Hypervisor configuration Register
 
@@ -43,9 +36,13 @@ ASM_PFX(SetupExceptionLevel2):
 
    msr     cptr_el2, xzr          // Disable copro traps to EL2
 
-   ret
+   // Enable Timer access for non-secure EL1 and EL0
+   // The cnthctl_el2 register bits are architecturally
+   // UNKNOWN on reset.
+   // Disable event stream as it is not in use at this stage
+   mov     x0, #(CNTHCTL_EL2_EL1PCTEN | CNTHCTL_EL2_EL1PCEN)
+   msr     cnthctl_el2, x0
 
-dead:
-   b       dead
+   ret
 
 ASM_FUNCTION_REMOVE_IF_UNREFERENCED