X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=ArmPlatformPkg%2FPrePeiCore%2FPrePeiCore.c;h=3a81e2e23f2c77b3c20e5244bd8d6d4557b0ec7b;hb=8ee193e898854e27a676ebddb775188e20882a9f;hp=1abefaefd2991027ead3e89f9bdc9d90ea19c62b;hpb=6dafb3030d1f5a7c281a7cba6c6f7914b5a3b065;p=mirror_edk2.git diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c index 1abefaefd2..3a81e2e23f 100644 --- a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c +++ b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c @@ -1,7 +1,7 @@ /** @file * Main file supporting the transition to PEI Core in Normal World for Versatile Express * -* Copyright (c) 2011-2013, ARM Limited. All rights reserved. +* Copyright (c) 2011-2014, ARM Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the BSD License @@ -17,23 +17,15 @@ #include #include -#include - #include "PrePeiCore.h" -EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI mTemporaryRamSupportPpi = { PrePeiCoreTemporaryRamSupport }; -ARM_GLOBAL_VARIABLE_PPI mGlobalVariablePpi = { PrePeiCoreGetGlobalVariableMemory }; +CONST EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI mTemporaryRamSupportPpi = { PrePeiCoreTemporaryRamSupport }; -EFI_PEI_PPI_DESCRIPTOR gCommonPpiTable[] = { +CONST EFI_PEI_PPI_DESCRIPTOR gCommonPpiTable[] = { { EFI_PEI_PPI_DESCRIPTOR_PPI, &gEfiTemporaryRamSupportPpiGuid, - &mTemporaryRamSupportPpi - }, - { - EFI_PEI_PPI_DESCRIPTOR_PPI, - &gArmGlobalVariablePpiGuid, - &mGlobalVariablePpi + (VOID *) &mTemporaryRamSupportPpi } }; @@ -53,7 +45,7 @@ CreatePpiList ( ArmPlatformGetPlatformPpiList (&PlatformPpiListSize, &PlatformPpiList); // Copy the Common and Platform PPis in Temporrary Memory - ListBase = PcdGet32 (PcdCPUCoresStackBase); + ListBase = PcdGet64 (PcdCPUCoresStackBase); CopyMem ((VOID*)ListBase, gCommonPpiTable, sizeof(gCommonPpiTable)); CopyMem ((VOID*)(ListBase + sizeof(gCommonPpiTable)), PlatformPpiList, PlatformPpiListSize); @@ -86,8 +78,9 @@ CEntryPoint ( // // Write VBAR - The Exception Vector table must be aligned to its requirement - //TODO: Fix baseTools to ensure the Exception Vector Table is correctly aligned in AArch64 - //ASSERT(((UINTN)PeiVectorTable & ARM_VECTOR_TABLE_ALIGNMENT) == 0); + // Note: The AArch64 Vector table must be 2k-byte aligned - if this assertion fails ensure + // 'Align=4K' is defined into your FDF for this module. + ASSERT (((UINTN)PeiVectorTable & ARM_VECTOR_TABLE_ALIGNMENT) == 0); ArmWriteVBar ((UINTN)PeiVectorTable); //Note: The MMU will be enabled by MemoryPeim. Only the primary core will have the MMU on. @@ -124,39 +117,27 @@ PrePeiCoreTemporaryRamSupport ( VOID *NewHeap; VOID *OldStack; VOID *NewStack; + UINTN HeapSize; + + HeapSize = ALIGN_VALUE (CopySize / 2, CPU_STACK_ALIGNMENT); OldHeap = (VOID*)(UINTN)TemporaryMemoryBase; - NewHeap = (VOID*)((UINTN)PermanentMemoryBase + (CopySize >> 1)); + NewHeap = (VOID*)((UINTN)PermanentMemoryBase + (CopySize - HeapSize)); - OldStack = (VOID*)((UINTN)TemporaryMemoryBase + (CopySize >> 1)); + OldStack = (VOID*)((UINTN)TemporaryMemoryBase + HeapSize); NewStack = (VOID*)(UINTN)PermanentMemoryBase; // // Migrate the temporary memory stack to permanent memory stack. // - CopyMem (NewStack, OldStack, CopySize >> 1); + CopyMem (NewStack, OldStack, CopySize - HeapSize); // // Migrate the temporary memory heap to permanent memory heap. // - CopyMem (NewHeap, OldHeap, CopySize >> 1); - - SecSwitchStack ((UINTN)NewStack - (UINTN)OldStack); - - return EFI_SUCCESS; -} + CopyMem (NewHeap, OldHeap, HeapSize); -EFI_STATUS -PrePeiCoreGetGlobalVariableMemory ( - OUT EFI_PHYSICAL_ADDRESS *GlobalVariableBase - ) -{ - ASSERT (GlobalVariableBase != NULL); - - *GlobalVariableBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) + - (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - - (UINTN)PcdGet32 (PcdPeiGlobalVariableSize); + SecSwitchStack ((UINTN)NewStack - (UINTN)OldStack); return EFI_SUCCESS; } -