X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=IntelFrameworkPkg%2FLibrary%2FDxeIoLibCpuIo%2FIoLib.c;h=57a2335571035fcdf4c68a3363f8f19ff908f38f;hb=7459094d5f6904a0c8445d97519f4a99b654ef43;hp=096f899be6952810f5a2ae4075408e60e506ed7c;hpb=79964ac84ea0ca6c68d0dea38245fa83ff1945d1;p=mirror_edk2.git

diff --git a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c
index 096f899be6..57a2335571 100644
--- a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c
+++ b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c
@@ -1,6 +1,8 @@
 /** @file
   I/O Library.
-
+  The implementation of I/O operation for this library instance 
+  are based on EFI_CPU_IO_PROTOCOL.
+  
   Copyright (c) 2006, Intel Corporation<BR>
   All rights reserved. This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
@@ -14,6 +16,7 @@
 
 **/
 
+
 #include "DxeCpuIoLibInternal.h"
 
 //
@@ -43,9 +46,9 @@ IoLibConstructor (
 {
   EFI_STATUS                        Status;
 
-  Status = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, &mPciRootBridgeIo);
+  Status = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, (VOID **) &mPciRootBridgeIo);
   if (EFI_ERROR (Status)) {
-    Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, &mCpuIo);
+    Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID **) &mCpuIo);
   }
   ASSERT_EFI_ERROR (Status);
 
@@ -77,7 +80,7 @@ IoReadWorker (
   UINT64                            Data;
 
   if (mPciRootBridgeIo != NULL) {
-    Status = mPciRootBridgeIo->Io.Read (mPciRootBridgeIo, Width, Port, 1, &Data);
+    Status = mPciRootBridgeIo->Io.Read (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Port, 1, &Data);
   } else {
     Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);
   }
@@ -112,7 +115,7 @@ IoWriteWorker (
   EFI_STATUS                        Status;
 
   if (mPciRootBridgeIo != NULL) {
-    Status = mPciRootBridgeIo->Io.Write (mPciRootBridgeIo, Width, Port, 1, &Data);
+    Status = mPciRootBridgeIo->Io.Write (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Port, 1, &Data);
   } else {
     Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);
   }
@@ -146,7 +149,7 @@ MmioReadWorker (
   UINT64                            Data;
 
   if (mPciRootBridgeIo != NULL) {
-    Status = mPciRootBridgeIo.Mem.Read (mPciRootBridgeIo, Width, Address, 1, &Data);
+    Status = mPciRootBridgeIo->Mem.Read (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Address, 1, &Data);
   } else {
     Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);
   }
@@ -165,7 +168,8 @@ MmioReadWorker (
   @param  Address       The MMIO register to read.
                         The caller is responsible for aligning the Address if required.
   @param  Width         The width of the I/O operation.
-
+  @param  Data          The value to write to the I/O port.
+  
   @return Data read from registers in the EFI system memory space.
 
 **/
@@ -180,7 +184,7 @@ MmioWriteWorker (
   EFI_STATUS                        Status;
 
   if (mPciRootBridgeIo != NULL) {
-    Status = mPciRootBridgeIo->Mem.Write (mPciRootBridgeIo, Width, Address, 1, &Data);
+    Status = mPciRootBridgeIo->Mem.Write (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Address, 1, &Data);
   } else {
     Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);
   }