X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=IntelFsp2Pkg%2FInclude%2FFspGlobalData.h;h=697b20ed4ce3febf2d0c581570472f34614d26db;hb=48249243777882d7d89ca0b86c89e355b5f941f3;hp=445540abfa51b8b7c94e5bb6565d6a5e32db0f85;hpb=d40965b9877135028673884abc8f5a9b6b0ef5dc;p=mirror_edk2.git

diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h b/IntelFsp2Pkg/Include/FspGlobalData.h
index 445540abfa..697b20ed4c 100644
--- a/IntelFsp2Pkg/Include/FspGlobalData.h
+++ b/IntelFsp2Pkg/Include/FspGlobalData.h
@@ -10,9 +10,9 @@
 
 #include <FspEas.h>
 
-#define FSP_IN_API_MODE         0
-#define FSP_IN_DISPATCH_MODE    1
-#define FSP_GLOBAL_DATA_VERSION 1
+#define FSP_IN_API_MODE          0
+#define FSP_IN_DISPATCH_MODE     1
+#define FSP_GLOBAL_DATA_VERSION  1
 
 #pragma pack(1)
 
@@ -24,16 +24,17 @@ typedef enum {
   TempRamExitApiIndex,
   FspSiliconInitApiIndex,
   FspMultiPhaseSiInitApiIndex,
+  FspSmmInitApiIndex,
   FspApiIndexMax
 } FSP_API_INDEX;
 
 typedef struct  {
-  VOID      *DataPtr;
-  UINTN     MicrocodeRegionBase;
-  UINTN     MicrocodeRegionSize;
-  UINTN     CodeRegionBase;
-  UINTN     CodeRegionSize;
-  UINTN     Reserved;
+  VOID     *DataPtr;
+  UINTN    MicrocodeRegionBase;
+  UINTN    MicrocodeRegionSize;
+  UINTN    CodeRegionBase;
+  UINTN    CodeRegionSize;
+  UINTN    Reserved;
 } FSP_PLAT_DATA;
 
 #define FSP_GLOBAL_DATA_SIGNATURE        SIGNATURE_32 ('F', 'S', 'P', 'D')
@@ -41,28 +42,28 @@ typedef struct  {
 #define FSP_PERFORMANCE_DATA_TIMER_MASK  0xFFFFFFFFFFFFFF
 
 typedef struct  {
-  UINT32             Signature;
-  UINT8              Version;
-  UINT8              Reserved1[3];
+  UINT32    Signature;
+  UINT8     Version;
+  UINT8     Reserved1[3];
   ///
   /// Offset 0x08
   ///
-  UINTN              CoreStack;
-  UINTN              Reserved2;
+  UINTN     CoreStack;
+  UINTN     Reserved2;
   ///
   /// IA32: Offset 0x10; X64: Offset 0x18
   ///
-  UINT32             StatusCode;
-  UINT8              ApiIdx;
+  UINT32    StatusCode;
+  UINT8     ApiIdx;
   ///
   /// 0: FSP in API mode; 1: FSP in DISPATCH mode
   ///
-  UINT8              FspMode;
-  UINT8              OnSeparateStack;
-  UINT8              Reserved3;
-  UINT32             NumberOfPhases;
-  UINT32             PhasesExecuted;
-  UINT32             Reserved4[8];
+  UINT8     FspMode;
+  UINT8     OnSeparateStack;
+  UINT8     Reserved3;
+  UINT32    NumberOfPhases;
+  UINT32    PhasesExecuted;
+  UINT32    Reserved4[8];
   ///
   /// IA32: Offset 0x40; X64: Offset 0x48
   /// Start of UINTN and pointer section
@@ -75,21 +76,23 @@ typedef struct  {
   VOID               *TempRamInitUpdPtr;
   VOID               *MemoryInitUpdPtr;
   VOID               *SiliconInitUpdPtr;
+  VOID               *SmmInitUpdPtr;
   ///
-  /// IA32: Offset 0x64; X64: Offset 0x90
+  /// IA32: Offset 0x68; X64: Offset 0x98
   /// To store function parameters pointer
   /// so it can be retrieved after stack switched.
   ///
   VOID               *FunctionParameterPtr;
   FSP_INFO_HEADER    *FspInfoHeader;
   VOID               *UpdDataPtr;
+  UINTN              Reserved5;
   ///
   /// End of UINTN and pointer section
   ///
-  UINT8              Reserved5[16];
+  UINT8              Reserved6[16];
   UINT32             PerfSig;
   UINT16             PerfLen;
-  UINT16             Reserved6;
+  UINT16             Reserved7;
   UINT32             PerfIdx;
   UINT64             PerfData[32];
 } FSP_GLOBAL_DATA;