X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=IntelFsp2Pkg%2FInclude%2FFspGlobalData.h;h=697b20ed4ce3febf2d0c581570472f34614d26db;hb=48249243777882d7d89ca0b86c89e355b5f941f3;hp=7de26606a7fbca49e5d203ba057bbb260d2cd4ce;hpb=19d29d358f80a1f2b462d8a52943aae724b8702c;p=mirror_edk2.git
diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h b/IntelFsp2Pkg/Include/FspGlobalData.h
index 7de26606a7..697b20ed4c 100644
--- a/IntelFsp2Pkg/Include/FspGlobalData.h
+++ b/IntelFsp2Pkg/Include/FspGlobalData.h
@@ -1,13 +1,7 @@
/** @file
- Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -16,6 +10,10 @@
#include
+#define FSP_IN_API_MODE 0
+#define FSP_IN_DISPATCH_MODE 1
+#define FSP_GLOBAL_DATA_VERSION 1
+
#pragma pack(1)
typedef enum {
@@ -25,41 +23,78 @@ typedef enum {
FspMemoryInitApiIndex,
TempRamExitApiIndex,
FspSiliconInitApiIndex,
+ FspMultiPhaseSiInitApiIndex,
+ FspSmmInitApiIndex,
FspApiIndexMax
} FSP_API_INDEX;
typedef struct {
- VOID *DataPtr;
- UINT32 MicrocodeRegionBase;
- UINT32 MicrocodeRegionSize;
- UINT32 CodeRegionBase;
- UINT32 CodeRegionSize;
+ VOID *DataPtr;
+ UINTN MicrocodeRegionBase;
+ UINTN MicrocodeRegionSize;
+ UINTN CodeRegionBase;
+ UINTN CodeRegionSize;
+ UINTN Reserved;
} FSP_PLAT_DATA;
-#define FSP_GLOBAL_DATA_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'D')
-#define FSP_PERFORMANCE_DATA_SIGNATURE SIGNATURE_32 ('P', 'E', 'R', 'F')
-#define FSP_PERFORMANCE_DATA_TIMER_MASK 0xFFFFFFFFFFFFFF
+#define FSP_GLOBAL_DATA_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'D')
+#define FSP_PERFORMANCE_DATA_SIGNATURE SIGNATURE_32 ('P', 'E', 'R', 'F')
+#define FSP_PERFORMANCE_DATA_TIMER_MASK 0xFFFFFFFFFFFFFF
typedef struct {
- UINT32 Signature;
- UINT8 Version;
- UINT8 Reserved1[3];
- UINT32 CoreStack;
- UINT32 StatusCode;
- UINT32 Reserved2[8];
- FSP_PLAT_DATA PlatformData;
- FSP_INFO_HEADER *FspInfoHeader;
- VOID *UpdDataPtr;
- VOID *TempRamInitUpdPtr;
- VOID *MemoryInitUpdPtr;
- VOID *SiliconInitUpdPtr;
- UINT8 ApiIdx;
- UINT8 Reserved3[31];
- UINT32 PerfSig;
- UINT16 PerfLen;
- UINT16 Reserved4;
- UINT32 PerfIdx;
- UINT64 PerfData[32];
+ UINT32 Signature;
+ UINT8 Version;
+ UINT8 Reserved1[3];
+ ///
+ /// Offset 0x08
+ ///
+ UINTN CoreStack;
+ UINTN Reserved2;
+ ///
+ /// IA32: Offset 0x10; X64: Offset 0x18
+ ///
+ UINT32 StatusCode;
+ UINT8 ApiIdx;
+ ///
+ /// 0: FSP in API mode; 1: FSP in DISPATCH mode
+ ///
+ UINT8 FspMode;
+ UINT8 OnSeparateStack;
+ UINT8 Reserved3;
+ UINT32 NumberOfPhases;
+ UINT32 PhasesExecuted;
+ UINT32 Reserved4[8];
+ ///
+ /// IA32: Offset 0x40; X64: Offset 0x48
+ /// Start of UINTN and pointer section
+ /// All UINTN and pointer members must be put in this section
+ /// except CoreStack and Reserved2. In addition, the number of
+ /// UINTN and pointer members must be even for natural alignment
+ /// in both IA32 and X64.
+ ///
+ FSP_PLAT_DATA PlatformData;
+ VOID *TempRamInitUpdPtr;
+ VOID *MemoryInitUpdPtr;
+ VOID *SiliconInitUpdPtr;
+ VOID *SmmInitUpdPtr;
+ ///
+ /// IA32: Offset 0x68; X64: Offset 0x98
+ /// To store function parameters pointer
+ /// so it can be retrieved after stack switched.
+ ///
+ VOID *FunctionParameterPtr;
+ FSP_INFO_HEADER *FspInfoHeader;
+ VOID *UpdDataPtr;
+ UINTN Reserved5;
+ ///
+ /// End of UINTN and pointer section
+ ///
+ UINT8 Reserved6[16];
+ UINT32 PerfSig;
+ UINT16 PerfLen;
+ UINT16 Reserved7;
+ UINT32 PerfIdx;
+ UINT64 PerfData[32];
} FSP_GLOBAL_DATA;
#pragma pack()