X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=MdeModulePkg%2FBus%2FPci%2FPciBusDxe%2FPciDeviceSupport.c;h=5ace222e602886df5eb8f3fceec17038ad9c1704;hb=6e1e5405544724406f07344a5911298c3df44129;hp=81a79e6c86b2e882751839980cc99032a767c8ba;hpb=aa75dfeccdd9c88bd64431b1290faf7574854337;p=mirror_edk2.git diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c index 81a79e6c86..5ace222e60 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c @@ -1,8 +1,8 @@ /** @file Supporting functions implementaion for PCI devices management. -Copyright (c) 2006 - 2009, Intel Corporation -All rights reserved. This program and the accompanying materials +Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.
+This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at http://opensource.org/licenses/bsd-license.php @@ -214,11 +214,6 @@ RegisterPciDevice ( UINT8 PciExpressCapRegOffset; EFI_PCI_IO_PROTOCOL *PciIo; UINT8 Data8; - BOOLEAN HasEfiImage; - PCI_IO_DEVICE *ParrentPciIoDevice; - EFI_PCI_IO_PROTOCOL *ParrentPciIo; - UINT16 Data16; - UINT32 Data32; // // Install the pciio protocol, device path protocol @@ -255,35 +250,7 @@ RegisterPciDevice ( PciIo = &(PciIoDevice->PciIo); Data8 = PCI_INT_LINE_UNKNOWN; PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 0x3C, 1, &Data8); - - // - // PCI-IOV programming - // - if (((FeaturePcdGet(PcdAriSupport) & EFI_PCI_IOV_POLICY_ARI) != 0) && (PciIoDevice->AriCapabilityOffset != 0) && ((FeaturePcdGet(PcdSrIovSupport) & EFI_PCI_IOV_POLICY_SRIOV) != 0) && - (PciIoDevice->SrIovCapabilityOffset != 0)) { - // - // Check its parrent ARI forwarding capability - // - ParrentPciIoDevice = PciIoDevice->Parent; - ParrentPciIo = &(ParrentPciIoDevice->PciIo); - ParrentPciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, ParrentPciIoDevice->PciExpressCapabilityOffset + EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_OFFSET, 1, &Data32); - if ((Data32 & EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_ARI_FORWARDING) != 0) { - // - // ARI forward support in bridge, so enable it. - // - ParrentPciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, ParrentPciIoDevice->PciExpressCapabilityOffset + EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_OFFSET, 1, &Data32); - Data32 |= EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_ARI_FORWARDING; - ParrentPciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, ParrentPciIoDevice->PciExpressCapabilityOffset + EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_OFFSET, 1, &Data32); - - // - // Set ARI Capable Hierarchy for device - // - PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, PciIoDevice->SrIovCapabilityOffset + EFI_PCIE_CAPABILITY_ID_SRIOV_CONTROL, 1, &Data16); - Data16 |= EFI_PCIE_CAPABILITY_ID_SRIOV_CONTROL_ARI_HIERARCHY; - PciIo->Pci.Write (PciIo, EfiPciIoWidthUint16, PciIoDevice->SrIovCapabilityOffset + EFI_PCIE_CAPABILITY_ID_SRIOV_CONTROL, 1, &Data16); - } - } - + // // Process OpRom // @@ -300,6 +267,7 @@ RegisterPciDevice ( &PlatformOpRomSize ); if (!EFI_ERROR (Status)) { + PciIoDevice->EmbeddedRom = FALSE; PciIoDevice->RomSize = PlatformOpRomSize; PciIoDevice->PciIo.RomSize = PlatformOpRomSize; PciIoDevice->PciIo.RomImage = PlatformOpRomBuffer; @@ -325,6 +293,7 @@ RegisterPciDevice ( &PlatformOpRomSize ); if (!EFI_ERROR (Status)) { + PciIoDevice->EmbeddedRom = FALSE; PciIoDevice->RomSize = PlatformOpRomSize; PciIoDevice->PciIo.RomSize = PlatformOpRomSize; PciIoDevice->PciIo.RomImage = PlatformOpRomBuffer; @@ -345,12 +314,7 @@ RegisterPciDevice ( } } - // - // Determine if there are EFI images in the option rom - // - HasEfiImage = ContainEfiImage (PciIoDevice->PciIo.RomImage, PciIoDevice->PciIo.RomSize); - - if (HasEfiImage) { + if (PciIoDevice->HasEfiOpRom) { Status = gBS->InstallMultipleProtocolInterfaces ( &PciIoDevice->Handle, &gEfiLoadFile2ProtocolGuid, @@ -380,7 +344,7 @@ RegisterPciDevice ( // The OpRom is got from platform in the above code // or loaded from device in the previous round of bus enumeration // - if (HasEfiImage) { + if (PciIoDevice->HasEfiOpRom) { ProcessOpRomImage (PciIoDevice); } } @@ -404,7 +368,7 @@ RegisterPciDevice ( &PciIoDevice->PciIo, NULL ); - if (HasEfiImage) { + if (PciIoDevice->HasEfiOpRom) { gBS->UninstallMultipleProtocolInterfaces ( &PciIoDevice->Handle, &gEfiLoadFile2ProtocolGuid, @@ -726,7 +690,7 @@ StartPciDevicesOnBridge ( // // If it is a PPB // - if (!IsListEmpty (&PciIoDevice->ChildList)) { + if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) { Status = StartPciDevicesOnBridge ( Controller, PciIoDevice, @@ -741,7 +705,7 @@ StartPciDevicesOnBridge ( 0, &Supports ); - Supports &= EFI_PCI_DEVICE_ENABLE; + Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE; PciIoDevice->PciIo.Attributes ( &(PciIoDevice->PciIo), EfiPciIoAttributeOperationEnable, @@ -778,7 +742,7 @@ StartPciDevicesOnBridge ( (*NumberOfChildren)++; } - if (!IsListEmpty (&PciIoDevice->ChildList)) { + if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) { Status = StartPciDevicesOnBridge ( Controller, PciIoDevice, @@ -793,7 +757,7 @@ StartPciDevicesOnBridge ( 0, &Supports ); - Supports &= EFI_PCI_DEVICE_ENABLE; + Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE; PciIoDevice->PciIo.Attributes ( &(PciIoDevice->PciIo), EfiPciIoAttributeOperationEnable,