X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=MdeModulePkg%2FBus%2FPci%2FPciSioSerialDxe%2FSerial.h;h=5903ab5cd34e7cd4816a51c1238c8d2426879d97;hb=1436aea4d5707e672672a11bda72be2c63c936c3;hp=fa5aba07e1769803d5a8e25bd99661a4777c4ed3;hpb=7c7184e201a90a1d2376e615e55e3f4074731468;p=mirror_edk2.git diff --git a/MdeModulePkg/Bus/Pci/PciSioSerialDxe/Serial.h b/MdeModulePkg/Bus/Pci/PciSioSerialDxe/Serial.h index fa5aba07e1..5903ab5cd3 100644 --- a/MdeModulePkg/Bus/Pci/PciSioSerialDxe/Serial.h +++ b/MdeModulePkg/Bus/Pci/PciSioSerialDxe/Serial.h @@ -9,7 +9,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #ifndef _SERIAL_H_ #define _SERIAL_H_ - #include #include @@ -34,13 +33,13 @@ SPDX-License-Identifier: BSD-2-Clause-Patent // // Driver Binding Externs // -extern EFI_DRIVER_BINDING_PROTOCOL gSerialControllerDriver; -extern EFI_COMPONENT_NAME_PROTOCOL gPciSioSerialComponentName; -extern EFI_COMPONENT_NAME2_PROTOCOL gPciSioSerialComponentName2; +extern EFI_DRIVER_BINDING_PROTOCOL gSerialControllerDriver; +extern EFI_COMPONENT_NAME_PROTOCOL gPciSioSerialComponentName; +extern EFI_COMPONENT_NAME2_PROTOCOL gPciSioSerialComponentName2; -#define SIO_SERIAL_PORT_NAME L"SIO Serial Port #%d" -#define PCI_SERIAL_PORT_NAME L"PCI Serial Port #%d" -#define SERIAL_PORT_NAME_LEN (sizeof (SIO_SERIAL_PORT_NAME) / sizeof (CHAR16) + MAXIMUM_VALUE_CHARACTERS) +#define SIO_SERIAL_PORT_NAME L"SIO Serial Port #%d" +#define PCI_SERIAL_PORT_NAME L"PCI Serial Port #%d" +#define SERIAL_PORT_NAME_LEN (sizeof (SIO_SERIAL_PORT_NAME) / sizeof (CHAR16) + MAXIMUM_VALUE_CHARACTERS) // // Internal Data Structures @@ -61,73 +60,73 @@ extern EFI_COMPONENT_NAME2_PROTOCOL gPciSioSerialComponentName2; /// RegisterStride equals to 4. /// typedef struct { - UINT16 VendorId; ///< Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries. - UINT16 DeviceId; ///< Device ID to match the PCI device - UINT32 ClockRate; ///< UART clock rate. Set to 0 for default clock rate of 1843200 Hz - UINT64 Offset; ///< The byte offset into to the BAR - UINT8 BarIndex; ///< Which BAR to get the UART base address - UINT8 RegisterStride; ///< UART register stride in bytes. Set to 0 for default register stride of 1 byte. - UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes. - UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes. - UINT8 Reserved[2]; + UINT16 VendorId; ///< Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries. + UINT16 DeviceId; ///< Device ID to match the PCI device + UINT32 ClockRate; ///< UART clock rate. Set to 0 for default clock rate of 1843200 Hz + UINT64 Offset; ///< The byte offset into to the BAR + UINT8 BarIndex; ///< Which BAR to get the UART base address + UINT8 RegisterStride; ///< UART register stride in bytes. Set to 0 for default register stride of 1 byte. + UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes. + UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes. + UINT8 Reserved[2]; } PCI_SERIAL_PARAMETER; #pragma pack() -#define SERIAL_MAX_FIFO_SIZE 17 ///< Actual FIFO size is 16. FIFO based on circular wastes one unit. +#define SERIAL_MAX_FIFO_SIZE 17 ///< Actual FIFO size is 16. FIFO based on circular wastes one unit. typedef struct { - UINT16 Head; ///< Head pointer of the FIFO. Empty when (Head == Tail). - UINT16 Tail; ///< Tail pointer of the FIFO. Full when ((Tail + 1) % SERIAL_MAX_FIFO_SIZE == Head). - UINT8 Data[SERIAL_MAX_FIFO_SIZE]; ///< Store the FIFO data. + UINT16 Head; ///< Head pointer of the FIFO. Empty when (Head == Tail). + UINT16 Tail; ///< Tail pointer of the FIFO. Full when ((Tail + 1) % SERIAL_MAX_FIFO_SIZE == Head). + UINT8 Data[SERIAL_MAX_FIFO_SIZE]; ///< Store the FIFO data. } SERIAL_DEV_FIFO; typedef union { - EFI_PCI_IO_PROTOCOL *PciIo; - EFI_SIO_PROTOCOL *Sio; + EFI_PCI_IO_PROTOCOL *PciIo; + EFI_SIO_PROTOCOL *Sio; } PARENT_IO_PROTOCOL_PTR; typedef struct { - EFI_PCI_IO_PROTOCOL *PciIo; // Pointer to parent PciIo instance. - UINTN ChildCount; // Count of child SerialIo instance. - UINT64 PciAttributes; // Original PCI attributes. + EFI_PCI_IO_PROTOCOL *PciIo; // Pointer to parent PciIo instance. + UINTN ChildCount; // Count of child SerialIo instance. + UINT64 PciAttributes; // Original PCI attributes. } PCI_DEVICE_INFO; typedef struct { - UINT32 Signature; - EFI_HANDLE Handle; - EFI_SERIAL_IO_PROTOCOL SerialIo; - EFI_SERIAL_IO_MODE SerialMode; - EFI_DEVICE_PATH_PROTOCOL *DevicePath; - - EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath; - UART_DEVICE_PATH UartDevicePath; - - EFI_PHYSICAL_ADDRESS BaseAddress; ///< UART base address - BOOLEAN MmioAccess; ///< TRUE for MMIO, FALSE for IO - UINT8 RegisterStride; ///< UART Register Stride - UINT32 ClockRate; ///< UART clock rate - - UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. - SERIAL_DEV_FIFO Receive; ///< The FIFO used to store received data - - UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. - SERIAL_DEV_FIFO Transmit; ///< The FIFO used to store to-transmit data - - BOOLEAN SoftwareLoopbackEnable; - BOOLEAN HardwareFlowControl; - EFI_UNICODE_STRING_TABLE *ControllerNameTable; - BOOLEAN ContainsControllerNode; ///< TRUE if the device produced contains Controller node - UINT32 Instance; - PCI_DEVICE_INFO *PciDeviceInfo; + UINT32 Signature; + EFI_HANDLE Handle; + EFI_SERIAL_IO_PROTOCOL SerialIo; + EFI_SERIAL_IO_MODE SerialMode; + EFI_DEVICE_PATH_PROTOCOL *DevicePath; + + EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath; + UART_DEVICE_PATH UartDevicePath; + + EFI_PHYSICAL_ADDRESS BaseAddress; ///< UART base address + BOOLEAN MmioAccess; ///< TRUE for MMIO, FALSE for IO + UINT8 RegisterStride; ///< UART Register Stride + UINT32 ClockRate; ///< UART clock rate + + UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. + SERIAL_DEV_FIFO Receive; ///< The FIFO used to store received data + + UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. + SERIAL_DEV_FIFO Transmit; ///< The FIFO used to store to-transmit data + + BOOLEAN SoftwareLoopbackEnable; + BOOLEAN HardwareFlowControl; + EFI_UNICODE_STRING_TABLE *ControllerNameTable; + BOOLEAN ContainsControllerNode; ///< TRUE if the device produced contains Controller node + UINT32 Instance; + PCI_DEVICE_INFO *PciDeviceInfo; } SERIAL_DEV; -#define SERIAL_DEV_SIGNATURE SIGNATURE_32 ('s', 'e', 'r', 'd') -#define SERIAL_DEV_FROM_THIS(a) CR (a, SERIAL_DEV, SerialIo, SERIAL_DEV_SIGNATURE) +#define SERIAL_DEV_SIGNATURE SIGNATURE_32 ('s', 'e', 'r', 'd') +#define SERIAL_DEV_FROM_THIS(a) CR (a, SERIAL_DEV, SerialIo, SERIAL_DEV_SIGNATURE) // // Serial Driver Defaults // -#define SERIAL_PORT_DEFAULT_TIMEOUT 1000000 -#define SERIAL_PORT_SUPPORT_CONTROL_MASK (EFI_SERIAL_CLEAR_TO_SEND | \ +#define SERIAL_PORT_DEFAULT_TIMEOUT 1000000 +#define SERIAL_PORT_SUPPORT_CONTROL_MASK (EFI_SERIAL_CLEAR_TO_SEND | \ EFI_SERIAL_DATA_SET_READY | \ EFI_SERIAL_RING_INDICATE | \ EFI_SERIAL_CARRIER_DETECT | \ @@ -139,23 +138,23 @@ typedef struct { EFI_SERIAL_OUTPUT_BUFFER_EMPTY | \ EFI_SERIAL_INPUT_BUFFER_EMPTY) -#define SERIAL_PORT_MIN_TIMEOUT 1 // 1 uS -#define SERIAL_PORT_MAX_TIMEOUT 100000000 // 100 seconds +#define SERIAL_PORT_MIN_TIMEOUT 1 // 1 uS +#define SERIAL_PORT_MAX_TIMEOUT 100000000 // 100 seconds // // UART Registers // -#define SERIAL_REGISTER_THR 0 ///< WO Transmit Holding Register -#define SERIAL_REGISTER_RBR 0 ///< RO Receive Buffer Register -#define SERIAL_REGISTER_DLL 0 ///< R/W Divisor Latch LSB -#define SERIAL_REGISTER_DLM 1 ///< R/W Divisor Latch MSB -#define SERIAL_REGISTER_IER 1 ///< R/W Interrupt Enable Register -#define SERIAL_REGISTER_IIR 2 ///< RO Interrupt Identification Register -#define SERIAL_REGISTER_FCR 2 ///< WO FIFO Cotrol Register -#define SERIAL_REGISTER_LCR 3 ///< R/W Line Control Register -#define SERIAL_REGISTER_MCR 4 ///< R/W Modem Control Register -#define SERIAL_REGISTER_LSR 5 ///< R/W Line Status Register -#define SERIAL_REGISTER_MSR 6 ///< R/W Modem Status Register -#define SERIAL_REGISTER_SCR 7 ///< R/W Scratch Pad Register +#define SERIAL_REGISTER_THR 0 ///< WO Transmit Holding Register +#define SERIAL_REGISTER_RBR 0 ///< RO Receive Buffer Register +#define SERIAL_REGISTER_DLL 0 ///< R/W Divisor Latch LSB +#define SERIAL_REGISTER_DLM 1 ///< R/W Divisor Latch MSB +#define SERIAL_REGISTER_IER 1 ///< R/W Interrupt Enable Register +#define SERIAL_REGISTER_IIR 2 ///< RO Interrupt Identification Register +#define SERIAL_REGISTER_FCR 2 ///< WO FIFO Cotrol Register +#define SERIAL_REGISTER_LCR 3 ///< R/W Line Control Register +#define SERIAL_REGISTER_MCR 4 ///< R/W Modem Control Register +#define SERIAL_REGISTER_LSR 5 ///< R/W Line Status Register +#define SERIAL_REGISTER_MSR 6 ///< R/W Modem Status Register +#define SERIAL_REGISTER_SCR 7 ///< R/W Scratch Pad Register #pragma pack(1) /// @@ -163,13 +162,13 @@ typedef struct { /// typedef union { struct { - UINT8 Ravie : 1; ///< Receiver Data Available Interrupt Enable - UINT8 Theie : 1; ///< Transmistter Holding Register Empty Interrupt Enable - UINT8 Rie : 1; ///< Receiver Interrupt Enable - UINT8 Mie : 1; ///< Modem Interrupt Enable - UINT8 Reserved : 4; + UINT8 Ravie : 1; ///< Receiver Data Available Interrupt Enable + UINT8 Theie : 1; ///< Transmistter Holding Register Empty Interrupt Enable + UINT8 Rie : 1; ///< Receiver Interrupt Enable + UINT8 Mie : 1; ///< Modem Interrupt Enable + UINT8 Reserved : 4; } Bits; - UINT8 Data; + UINT8 Data; } SERIAL_PORT_IER; /// @@ -177,15 +176,15 @@ typedef union { /// typedef union { struct { - UINT8 TrFIFOE : 1; ///< Transmit and Receive FIFO Enable - UINT8 ResetRF : 1; ///< Reset Reciever FIFO - UINT8 ResetTF : 1; ///< Reset Transmistter FIFO - UINT8 Dms : 1; ///< DMA Mode Select - UINT8 Reserved : 1; - UINT8 TrFIFO64 : 1; ///< Enable 64 byte FIFO - UINT8 Rtb : 2; ///< Receive Trigger Bits + UINT8 TrFIFOE : 1; ///< Transmit and Receive FIFO Enable + UINT8 ResetRF : 1; ///< Reset Reciever FIFO + UINT8 ResetTF : 1; ///< Reset Transmistter FIFO + UINT8 Dms : 1; ///< DMA Mode Select + UINT8 Reserved : 1; + UINT8 TrFIFO64 : 1; ///< Enable 64 byte FIFO + UINT8 Rtb : 2; ///< Receive Trigger Bits } Bits; - UINT8 Data; + UINT8 Data; } SERIAL_PORT_FCR; /// @@ -193,15 +192,15 @@ typedef union { /// typedef union { struct { - UINT8 SerialDB : 2; ///< Number of Serial Data Bits - UINT8 StopB : 1; ///< Number of Stop Bits - UINT8 ParEn : 1; ///< Parity Enable - UINT8 EvenPar : 1; ///< Even Parity Select - UINT8 SticPar : 1; ///< Sticky Parity - UINT8 BrCon : 1; ///< Break Control - UINT8 DLab : 1; ///< Divisor Latch Access Bit + UINT8 SerialDB : 2; ///< Number of Serial Data Bits + UINT8 StopB : 1; ///< Number of Stop Bits + UINT8 ParEn : 1; ///< Parity Enable + UINT8 EvenPar : 1; ///< Even Parity Select + UINT8 SticPar : 1; ///< Sticky Parity + UINT8 BrCon : 1; ///< Break Control + UINT8 DLab : 1; ///< Divisor Latch Access Bit } Bits; - UINT8 Data; + UINT8 Data; } SERIAL_PORT_LCR; /// @@ -209,14 +208,14 @@ typedef union { /// typedef union { struct { - UINT8 DtrC : 1; ///< Data Terminal Ready Control - UINT8 Rts : 1; ///< Request To Send Control - UINT8 Out1 : 1; ///< Output1 - UINT8 Out2 : 1; ///< Output2, used to disable interrupt - UINT8 Lme : 1; ///< Loopback Mode Enable - UINT8 Reserved : 3; + UINT8 DtrC : 1; ///< Data Terminal Ready Control + UINT8 Rts : 1; ///< Request To Send Control + UINT8 Out1 : 1; ///< Output1 + UINT8 Out2 : 1; ///< Output2, used to disable interrupt + UINT8 Lme : 1; ///< Loopback Mode Enable + UINT8 Reserved : 3; } Bits; - UINT8 Data; + UINT8 Data; } SERIAL_PORT_MCR; /// @@ -224,16 +223,16 @@ typedef union { /// typedef union { struct { - UINT8 Dr : 1; ///< Receiver Data Ready Status - UINT8 Oe : 1; ///< Overrun Error Status - UINT8 Pe : 1; ///< Parity Error Status - UINT8 Fe : 1; ///< Framing Error Status - UINT8 Bi : 1; ///< Break Interrupt Status - UINT8 Thre : 1; ///< Transmistter Holding Register Status - UINT8 Temt : 1; ///< Transmitter Empty Status - UINT8 FIFOe : 1; ///< FIFO Error Status + UINT8 Dr : 1; ///< Receiver Data Ready Status + UINT8 Oe : 1; ///< Overrun Error Status + UINT8 Pe : 1; ///< Parity Error Status + UINT8 Fe : 1; ///< Framing Error Status + UINT8 Bi : 1; ///< Break Interrupt Status + UINT8 Thre : 1; ///< Transmistter Holding Register Status + UINT8 Temt : 1; ///< Transmitter Empty Status + UINT8 FIFOe : 1; ///< FIFO Error Status } Bits; - UINT8 Data; + UINT8 Data; } SERIAL_PORT_LSR; /// @@ -241,48 +240,49 @@ typedef union { /// typedef union { struct { - UINT8 DeltaCTS : 1; ///< Delta Clear To Send Status - UINT8 DeltaDSR : 1; ///< Delta Data Set Ready Status - UINT8 TrailingEdgeRI : 1; ///< Trailing Edge of Ring Indicator Status - UINT8 DeltaDCD : 1; ///< Delta Data Carrier Detect Status - UINT8 Cts : 1; ///< Clear To Send Status - UINT8 Dsr : 1; ///< Data Set Ready Status - UINT8 Ri : 1; ///< Ring Indicator Status - UINT8 Dcd : 1; ///< Data Carrier Detect Status + UINT8 DeltaCTS : 1; ///< Delta Clear To Send Status + UINT8 DeltaDSR : 1; ///< Delta Data Set Ready Status + UINT8 TrailingEdgeRI : 1; ///< Trailing Edge of Ring Indicator Status + UINT8 DeltaDCD : 1; ///< Delta Data Carrier Detect Status + UINT8 Cts : 1; ///< Clear To Send Status + UINT8 Dsr : 1; ///< Data Set Ready Status + UINT8 Ri : 1; ///< Ring Indicator Status + UINT8 Dcd : 1; ///< Data Carrier Detect Status } Bits; - UINT8 Data; + UINT8 Data; } SERIAL_PORT_MSR; #pragma pack() // // Define serial register I/O macros // -#define READ_RBR(S) SerialReadRegister (S, SERIAL_REGISTER_RBR) -#define READ_DLL(S) SerialReadRegister (S, SERIAL_REGISTER_DLL) -#define READ_DLM(S) SerialReadRegister (S, SERIAL_REGISTER_DLM) -#define READ_IER(S) SerialReadRegister (S, SERIAL_REGISTER_IER) -#define READ_IIR(S) SerialReadRegister (S, SERIAL_REGISTER_IIR) -#define READ_LCR(S) SerialReadRegister (S, SERIAL_REGISTER_LCR) -#define READ_MCR(S) SerialReadRegister (S, SERIAL_REGISTER_MCR) -#define READ_LSR(S) SerialReadRegister (S, SERIAL_REGISTER_LSR) -#define READ_MSR(S) SerialReadRegister (S, SERIAL_REGISTER_MSR) -#define READ_SCR(S) SerialReadRegister (S, SERIAL_REGISTER_SCR) - -#define WRITE_THR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_THR, D) -#define WRITE_DLL(S, D) SerialWriteRegister (S, SERIAL_REGISTER_DLL, D) -#define WRITE_DLM(S, D) SerialWriteRegister (S, SERIAL_REGISTER_DLM, D) -#define WRITE_IER(S, D) SerialWriteRegister (S, SERIAL_REGISTER_IER, D) -#define WRITE_FCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_FCR, D) -#define WRITE_LCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_LCR, D) -#define WRITE_MCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_MCR, D) -#define WRITE_LSR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_LSR, D) -#define WRITE_MSR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_MSR, D) -#define WRITE_SCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_SCR, D) +#define READ_RBR(S) SerialReadRegister (S, SERIAL_REGISTER_RBR) +#define READ_DLL(S) SerialReadRegister (S, SERIAL_REGISTER_DLL) +#define READ_DLM(S) SerialReadRegister (S, SERIAL_REGISTER_DLM) +#define READ_IER(S) SerialReadRegister (S, SERIAL_REGISTER_IER) +#define READ_IIR(S) SerialReadRegister (S, SERIAL_REGISTER_IIR) +#define READ_LCR(S) SerialReadRegister (S, SERIAL_REGISTER_LCR) +#define READ_MCR(S) SerialReadRegister (S, SERIAL_REGISTER_MCR) +#define READ_LSR(S) SerialReadRegister (S, SERIAL_REGISTER_LSR) +#define READ_MSR(S) SerialReadRegister (S, SERIAL_REGISTER_MSR) +#define READ_SCR(S) SerialReadRegister (S, SERIAL_REGISTER_SCR) + +#define WRITE_THR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_THR, D) +#define WRITE_DLL(S, D) SerialWriteRegister (S, SERIAL_REGISTER_DLL, D) +#define WRITE_DLM(S, D) SerialWriteRegister (S, SERIAL_REGISTER_DLM, D) +#define WRITE_IER(S, D) SerialWriteRegister (S, SERIAL_REGISTER_IER, D) +#define WRITE_FCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_FCR, D) +#define WRITE_LCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_LCR, D) +#define WRITE_MCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_MCR, D) +#define WRITE_LSR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_LSR, D) +#define WRITE_MSR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_MSR, D) +#define WRITE_SCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_SCR, D) // // Prototypes // Driver model protocol interface // + /** Check to see if this driver supports the given controller @@ -296,9 +296,9 @@ typedef union { EFI_STATUS EFIAPI SerialControllerDriverSupported ( - IN EFI_DRIVER_BINDING_PROTOCOL *This, - IN EFI_HANDLE Controller, - IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath ); /** @@ -313,9 +313,9 @@ SerialControllerDriverSupported ( EFI_STATUS EFIAPI SerialControllerDriverStart ( - IN EFI_DRIVER_BINDING_PROTOCOL *This, - IN EFI_HANDLE Controller, - IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath ); /** @@ -333,15 +333,16 @@ SerialControllerDriverStart ( EFI_STATUS EFIAPI SerialControllerDriverStop ( - IN EFI_DRIVER_BINDING_PROTOCOL *This, - IN EFI_HANDLE Controller, - IN UINTN NumberOfChildren, - IN EFI_HANDLE *ChildHandleBuffer + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN UINTN NumberOfChildren, + IN EFI_HANDLE *ChildHandleBuffer ); // // Serial I/O Protocol Interface // + /** Reset serial device. @@ -354,7 +355,7 @@ SerialControllerDriverStop ( EFI_STATUS EFIAPI SerialReset ( - IN EFI_SERIAL_IO_PROTOCOL *This + IN EFI_SERIAL_IO_PROTOCOL *This ); /** @@ -377,13 +378,13 @@ SerialReset ( EFI_STATUS EFIAPI SerialSetAttributes ( - IN EFI_SERIAL_IO_PROTOCOL *This, - IN UINT64 BaudRate, - IN UINT32 ReceiveFifoDepth, - IN UINT32 Timeout, - IN EFI_PARITY_TYPE Parity, - IN UINT8 DataBits, - IN EFI_STOP_BITS_TYPE StopBits + IN EFI_SERIAL_IO_PROTOCOL *This, + IN UINT64 BaudRate, + IN UINT32 ReceiveFifoDepth, + IN UINT32 Timeout, + IN EFI_PARITY_TYPE Parity, + IN UINT8 DataBits, + IN EFI_STOP_BITS_TYPE StopBits ); /** @@ -399,8 +400,8 @@ SerialSetAttributes ( EFI_STATUS EFIAPI SerialSetControl ( - IN EFI_SERIAL_IO_PROTOCOL *This, - IN UINT32 Control + IN EFI_SERIAL_IO_PROTOCOL *This, + IN UINT32 Control ); /** @@ -415,8 +416,8 @@ SerialSetControl ( EFI_STATUS EFIAPI SerialGetControl ( - IN EFI_SERIAL_IO_PROTOCOL *This, - OUT UINT32 *Control + IN EFI_SERIAL_IO_PROTOCOL *This, + OUT UINT32 *Control ); /** @@ -435,9 +436,9 @@ SerialGetControl ( EFI_STATUS EFIAPI SerialWrite ( - IN EFI_SERIAL_IO_PROTOCOL *This, - IN OUT UINTN *BufferSize, - IN VOID *Buffer + IN EFI_SERIAL_IO_PROTOCOL *This, + IN OUT UINTN *BufferSize, + IN VOID *Buffer ); /** @@ -456,14 +457,15 @@ SerialWrite ( EFI_STATUS EFIAPI SerialRead ( - IN EFI_SERIAL_IO_PROTOCOL *This, - IN OUT UINTN *BufferSize, - OUT VOID *Buffer + IN EFI_SERIAL_IO_PROTOCOL *This, + IN OUT UINTN *BufferSize, + OUT VOID *Buffer ); // // Internal Functions // + /** Use scratchpad register to test if this serial port is present. @@ -473,7 +475,7 @@ SerialRead ( **/ BOOLEAN SerialPresent ( - IN SERIAL_DEV *SerialDevice + IN SERIAL_DEV *SerialDevice ); /** @@ -486,7 +488,7 @@ SerialPresent ( **/ BOOLEAN SerialFifoFull ( - IN SERIAL_DEV_FIFO *Fifo + IN SERIAL_DEV_FIFO *Fifo ); /** @@ -499,7 +501,7 @@ SerialFifoFull ( **/ BOOLEAN SerialFifoEmpty ( - IN SERIAL_DEV_FIFO *Fifo + IN SERIAL_DEV_FIFO *Fifo ); /** @@ -514,8 +516,8 @@ SerialFifoEmpty ( **/ EFI_STATUS SerialFifoAdd ( - IN SERIAL_DEV_FIFO *Fifo, - IN UINT8 Data + IN SERIAL_DEV_FIFO *Fifo, + IN UINT8 Data ); /** @@ -530,8 +532,8 @@ SerialFifoAdd ( **/ EFI_STATUS SerialFifoRemove ( - IN SERIAL_DEV_FIFO *Fifo, - OUT UINT8 *Data + IN SERIAL_DEV_FIFO *Fifo, + OUT UINT8 *Data ); /** @@ -546,7 +548,7 @@ SerialFifoRemove ( **/ EFI_STATUS SerialReceiveTransmit ( - IN SERIAL_DEV *SerialDevice + IN SERIAL_DEV *SerialDevice ); /** @@ -559,8 +561,8 @@ SerialReceiveTransmit ( **/ UINT8 SerialReadRegister ( - IN SERIAL_DEV *SerialDev, - IN UINT32 Offset + IN SERIAL_DEV *SerialDev, + IN UINT32 Offset ); /** @@ -572,15 +574,15 @@ SerialReadRegister ( **/ VOID SerialWriteRegister ( - IN SERIAL_DEV *SerialDev, - IN UINT32 Offset, - IN UINT8 Data + IN SERIAL_DEV *SerialDev, + IN UINT32 Offset, + IN UINT8 Data ); - // // EFI Component Name Functions // + /** Retrieves a Unicode string that is the user readable name of the driver. @@ -628,7 +630,6 @@ SerialComponentNameGetDriverName ( OUT CHAR16 **DriverName ); - /** Retrieves a Unicode string that is the user readable name of the controller that is being managed by a driver. @@ -700,11 +701,11 @@ SerialComponentNameGetDriverName ( EFI_STATUS EFIAPI SerialComponentNameGetControllerName ( - IN EFI_COMPONENT_NAME_PROTOCOL *This, - IN EFI_HANDLE ControllerHandle, - IN EFI_HANDLE ChildHandle OPTIONAL, - IN CHAR8 *Language, - OUT CHAR16 **ControllerName + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_HANDLE ChildHandle OPTIONAL, + IN CHAR8 *Language, + OUT CHAR16 **ControllerName ); /** @@ -715,8 +716,8 @@ SerialComponentNameGetControllerName ( **/ VOID AddName ( - IN SERIAL_DEV *SerialDevice, - IN UINT32 Uid + IN SERIAL_DEV *SerialDevice, + IN UINT32 Uid ); /** @@ -741,13 +742,13 @@ AddName ( **/ BOOLEAN VerifyUartParameters ( - IN UINT32 ClockRate, - IN UINT64 BaudRate, - IN UINT8 DataBits, - IN EFI_PARITY_TYPE Parity, - IN EFI_STOP_BITS_TYPE StopBits, - OUT UINT64 *Divisor, - OUT UINT64 *ActualBaudRate + IN UINT32 ClockRate, + IN UINT64 BaudRate, + IN UINT8 DataBits, + IN EFI_PARITY_TYPE Parity, + IN EFI_STOP_BITS_TYPE StopBits, + OUT UINT64 *Divisor, + OUT UINT64 *ActualBaudRate ); /** @@ -762,9 +763,9 @@ VerifyUartParameters ( **/ UART_DEVICE_PATH * SkipControllerDevicePathNode ( - EFI_DEVICE_PATH_PROTOCOL *DevicePath, - BOOLEAN *ContainsControllerNode, - UINT32 *ControllerNumber + EFI_DEVICE_PATH_PROTOCOL *DevicePath, + BOOLEAN *ContainsControllerNode, + UINT32 *ControllerNumber ); /** @@ -778,6 +779,7 @@ SkipControllerDevicePathNode ( **/ BOOLEAN IsUartFlowControlDevicePathNode ( - IN UART_FLOW_CONTROL_DEVICE_PATH *FlowControl + IN UART_FLOW_CONTROL_DEVICE_PATH *FlowControl ); + #endif