X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=MdeModulePkg%2FBus%2FPci%2FUhciDxe%2FUhciReg.c;h=0fd16284b3b3069f259dfbd6e60b0068848e8d4a;hb=a829f08684e29ebb68009ff2bcbf9f8edaf4affa;hp=8bb0f2b19aa2c45523e5f994f316283dd2ed0ca7;hpb=c52fa98ca98ceaab75e8ddf9ebcfbcbd323bab13;p=mirror_edk2.git diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.c b/MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.c index 8bb0f2b19a..0fd16284b3 100644 --- a/MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.c +++ b/MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.c @@ -1,7 +1,9 @@ /** @file -Copyright (c) 2007, Intel Corporation -All rights reserved. This program and the accompanying materials + The UHCI register operation routines. + +Copyright (c) 2007, Intel Corporation. All rights reserved.
+This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at http://opensource.org/licenses/bsd-license.php @@ -9,29 +11,18 @@ http://opensource.org/licenses/bsd-license.php THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -Module Name: - - UhciReg.c - -Abstract: - - The UHCI register operation routines. - -Revision History - - **/ #include "Uhci.h" /** - Read a UHCI register + Read a UHCI register. - @param PciIo The EFI_PCI_IO_PROTOCOL to use - @param Offset Register offset to USB_BAR_INDEX + @param PciIo The EFI_PCI_IO_PROTOCOL to use. + @param Offset Register offset to USB_BAR_INDEX. - @return Content of register + @return Content of register. **/ UINT16 @@ -53,7 +44,7 @@ UhciReadReg ( ); if (EFI_ERROR (Status)) { - UHCI_ERROR (("UhciReadReg: PciIo Io.Read error: %r at offset %d\n", Status, Offset)); + DEBUG ((EFI_D_ERROR, "UhciReadReg: PciIo Io.Read error: %r at offset %d\n", Status, Offset)); Data = 0xFFFF; } @@ -63,13 +54,11 @@ UhciReadReg ( /** - Write data to UHCI register - - @param PciIo The EFI_PCI_IO_PROTOCOL to use - @param Offset Register offset to USB_BAR_INDEX - @param Data Data to write + Write data to UHCI register. - @return VOID + @param PciIo The EFI_PCI_IO_PROTOCOL to use. + @param Offset Register offset to USB_BAR_INDEX. + @param Data Data to write. **/ VOID @@ -91,19 +80,17 @@ UhciWriteReg ( ); if (EFI_ERROR (Status)) { - UHCI_ERROR (("UhciWriteReg: PciIo Io.Write error: %r at offset %d\n", Status, Offset)); + DEBUG ((EFI_D_ERROR, "UhciWriteReg: PciIo Io.Write error: %r at offset %d\n", Status, Offset)); } } /** - Set a bit of the UHCI Register + Set a bit of the UHCI Register. - @param PciIo The EFI_PCI_IO_PROTOCOL to use - @param Offset Register offset to USB_BAR_INDEX - @param Bit The bit to set - - @return None + @param PciIo The EFI_PCI_IO_PROTOCOL to use. + @param Offset Register offset to USB_BAR_INDEX. + @param Bit The bit to set. **/ VOID @@ -122,13 +109,11 @@ UhciSetRegBit ( /** - Clear a bit of the UHCI Register - - @param PciIo The PCI_IO protocol to access the PCI - @param Offset Register offset to USB_BAR_INDEX - @param Bit The bit to clear + Clear a bit of the UHCI Register. - @return None + @param PciIo The PCI_IO protocol to access the PCI. + @param Offset Register offset to USB_BAR_INDEX. + @param Bit The bit to clear. **/ VOID @@ -148,11 +133,9 @@ UhciClearRegBit ( /** Clear all the interrutp status bits, these bits - are Write-Clean + are Write-Clean. - @param Uhc The UHCI device - - @return None + @param Uhc The UHCI device. **/ VOID @@ -167,27 +150,26 @@ UhciAckAllInterrupt ( // is a temporary error status. // if (!UhciIsHcWorking (Uhc->PciIo)) { - UHCI_ERROR (("UhciAckAllInterrupt: re-enable the UHCI from system error\n")); - Uhc->UsbHc.SetState (&Uhc->UsbHc, EfiUsbHcStateOperational); + DEBUG ((EFI_D_ERROR, "UhciAckAllInterrupt: re-enable the UHCI from system error\n")); + Uhc->Usb2Hc.SetState (&Uhc->Usb2Hc, EfiUsbHcStateOperational); } } - /** - Stop the host controller + Stop the host controller. - @param Uhc The UHCI device - @param Timeout Max time allowed + @param Uhc The UHCI device. + @param Timeout Max time allowed. - @retval EFI_SUCCESS The host controller is stopped - @retval EFI_TIMEOUT Failed to stop the host controller + @retval EFI_SUCCESS The host controller is stopped. + @retval EFI_TIMEOUT Failed to stop the host controller. **/ EFI_STATUS UhciStopHc ( - IN USB_HC_DEV *Uhc, - IN UINTN Timeout + IN USB_HC_DEV *Uhc, + IN UINTN Timeout ) { UINT16 UsbSts; @@ -214,12 +196,12 @@ UhciStopHc ( /** - Check whether the host controller operates well + Check whether the host controller operates well. - @param PciIo The PCI_IO protocol to use + @param PciIo The PCI_IO protocol to use. - @retval TRUE Host controller is working - @retval FALSE Host controller is halted or system error + @retval TRUE Host controller is working. + @retval FALSE Host controller is halted or system error. **/ BOOLEAN @@ -231,8 +213,8 @@ UhciIsHcWorking ( UsbSts = UhciReadReg (PciIo, USBSTS_OFFSET); - if (UsbSts & (USBSTS_HCPE | USBSTS_HSE | USBSTS_HCH)) { - UHCI_ERROR (("UhciIsHcWorking: current USB state is %x\n", UsbSts)); + if ((UsbSts & (USBSTS_HCPE | USBSTS_HSE | USBSTS_HCH)) != 0) { + DEBUG ((EFI_D_ERROR, "UhciIsHcWorking: current USB state is %x\n", UsbSts)); return FALSE; } @@ -244,10 +226,8 @@ UhciIsHcWorking ( Set the UHCI frame list base address. It can't use UhciWriteReg which access memory in UINT16. - @param PciIo The EFI_PCI_IO_PROTOCOL to use - @param Addr Address to set - - @return VOID + @param PciIo The EFI_PCI_IO_PROTOCOL to use. + @param Addr Address to set. **/ VOID @@ -271,17 +251,15 @@ UhciSetFrameListBaseAddr ( ); if (EFI_ERROR (Status)) { - UHCI_ERROR (("UhciSetFrameListBaseAddr: PciIo Io.Write error: %r\n", Status)); + DEBUG ((EFI_D_ERROR, "UhciSetFrameListBaseAddr: PciIo Io.Write error: %r\n", Status)); } } /** - Disable USB Emulation - - @param PciIo The EFI_PCI_IO_PROTOCOL protocol to use + Disable USB Emulation. - @return VOID + @param PciIo The EFI_PCI_IO_PROTOCOL protocol to use. **/ VOID