X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=MdePkg%2FInclude%2FIndustryStandard%2FSmBios.h;h=0959247f5432f1c812b23e9d5862dff72c4de2a0;hb=8a2270a6ce2664fa8e727b391e7f06ac7ba39434;hp=834bb4092cb72c274fe616d3cb0634d48466615b;hpb=9df063a06aef048c042498e2f542fb693e93493a;p=mirror_edk2.git
diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include/IndustryStandard/SmBios.h
index 834bb4092c..0959247f54 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1,7 +1,7 @@
/** @file
- Industry Standard Definitions of SMBIOS Table Specification v2.6.1
+ Industry Standard Definitions of SMBIOS Table Specification v3.0.0.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
@@ -22,12 +22,34 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
#define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00
+///
+/// Reference SMBIOS 2.7, chapter 6.1.2.
+/// The UEFI Platform Initialization Specification reserves handle number FFFEh for its
+/// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."
+/// This number is not used for any other purpose by the SMBIOS specification.
+///
+#define SMBIOS_HANDLE_PI_RESERVED 0xFFFE
+
///
/// Reference SMBIOS 2.6, chapter 3.1.3.
/// Each text string is limited to 64 significant characters due to system MIF limitations.
+/// Reference SMBIOS 2.7, chapter 6.1.3.
+/// It will have no limit on the length of each individual text string.
///
#define SMBIOS_STRING_MAX_LENGTH 64
+//
+// The length of the entire structure table (including all strings) must be reported
+// in the Structure Table Length field of the SMBIOS Structure Table Entry Point,
+// which is a WORD field limited to 65,535 bytes.
+//
+#define SMBIOS_TABLE_MAX_LENGTH 0xFFFF
+
+//
+// For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes.
+//
+#define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF
+
///
/// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.
/// Upper-level software that interprets the SMBIOS structure-table should bypass an
@@ -62,6 +84,19 @@ typedef struct {
UINT8 SmbiosBcdRevision;
} SMBIOS_TABLE_ENTRY_POINT;
+typedef struct {
+ UINT8 AnchorString[5];
+ UINT8 EntryPointStructureChecksum;
+ UINT8 EntryPointLength;
+ UINT8 MajorVersion;
+ UINT8 MinorVersion;
+ UINT8 DocRev;
+ UINT8 EntryPointRevision;
+ UINT8 Reserved;
+ UINT32 TableMaximumSize;
+ UINT64 TableAddress;
+} SMBIOS_TABLE_3_0_ENTRY_POINT;
+
///
/// The Smbios structure header.
///
@@ -77,14 +112,14 @@ typedef struct {
typedef UINT8 SMBIOS_TABLE_STRING;
///
-/// BIOS Characteristics
-/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.
+/// BIOS Characteristics
+/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.
///
typedef struct {
UINT32 Reserved :2; ///< Bits 0-1.
- UINT32 Unknown :1;
- UINT32 BiosCharacteristicsNotSupported :1;
- UINT32 IsaIsSupported :1;
+ UINT32 Unknown :1;
+ UINT32 BiosCharacteristicsNotSupported :1;
+ UINT32 IsaIsSupported :1;
UINT32 McaIsSupported :1;
UINT32 EisaIsSupported :1;
UINT32 PciIsSupported :1;
@@ -117,15 +152,15 @@ typedef struct {
} MISC_BIOS_CHARACTERISTICS;
///
-/// BIOS Characteristics Extension Byte 1 .
-/// This information, available for SMBIOS version 2.1 and later, appears at offset 12h
-/// within the BIOS Information structure.
+/// BIOS Characteristics Extension Byte 1.
+/// This information, available for SMBIOS version 2.1 and later, appears at offset 12h
+/// within the BIOS Information structure.
///
typedef struct {
UINT8 AcpiIsSupported :1;
- UINT8 UsbLegacyIsSupported :1;
- UINT8 AgpIsSupported :1;
- UINT8 I20BootIsSupported :1;
+ UINT8 UsbLegacyIsSupported :1;
+ UINT8 AgpIsSupported :1;
+ UINT8 I2OBootIsSupported :1;
UINT8 Ls120BootIsSupported :1;
UINT8 AtapiZipDriveBootIsSupported :1;
UINT8 Boot1394IsSupported :1;
@@ -134,14 +169,16 @@ typedef struct {
///
/// BIOS Characteristics Extension Byte 2.
-/// This information, available for SMBIOS version 2.3 and later, appears at offset 13h
+/// This information, available for SMBIOS version 2.3 and later, appears at offset 13h
/// within the BIOS Information structure.
///
typedef struct {
UINT8 BiosBootSpecIsSupported :1;
- UINT8 FunctionKeyNetworkBootIsSupported :1;
- UINT8 TargetContentDistributionEnabled :1;
- UINT8 ExtensionByte2Reserved :1;
+ UINT8 FunctionKeyNetworkBootIsSupported :1;
+ UINT8 TargetContentDistributionEnabled :1;
+ UINT8 UefiSpecificationSupported :1;
+ UINT8 VirtualMachineSupported :1;
+ UINT8 ExtensionByte2Reserved :3;
} MBCE_SYSTEM_RESERVED;
///
@@ -150,7 +187,6 @@ typedef struct {
typedef struct {
MBCE_BIOS_RESERVED BiosReserved;
MBCE_SYSTEM_RESERVED SystemReserved;
- UINT8 Reserved;
} MISC_BIOS_CHARACTERISTICS_EXTENSION;
///
@@ -290,7 +326,10 @@ typedef enum {
MiscChassisCompactPCI = 0x1A,
MiscChassisAdvancedTCA = 0x1B,
MiscChassisBlade = 0x1C,
- MiscChassisBladeEnclosure = 0x1D
+ MiscChassisBladeEnclosure = 0x1D,
+ MiscChassisTablet = 0x1E,
+ MiscChassisConvertible = 0x1F,
+ MiscChassisDetachable = 0x20
} MISC_CHASSIS_TYPE;
///
@@ -389,10 +428,8 @@ typedef enum {
ProcessorFamilyPentiumIII = 0x11,
ProcessorFamilyM1 = 0x12,
ProcessorFamilyM2 = 0x13,
- ProcessorFamilyM1Reserved2 = 0x14,
- ProcessorFamilyM1Reserved3 = 0x15,
- ProcessorFamilyM1Reserved4 = 0x16,
- ProcessorFamilyM1Reserved5 = 0x17,
+ ProcessorFamilyIntelCeleronM = 0x14,
+ ProcessorFamilyIntelPentium4Ht = 0x15,
ProcessorFamilyAmdDuron = 0x18,
ProcessorFamilyK5 = 0x19,
ProcessorFamilyK6 = 0x1A,
@@ -413,7 +450,8 @@ typedef enum {
ProcessorFamilyIntelCoreDuoMobile = 0x29,
ProcessorFamilyIntelCoreSoloMobile = 0x2A,
ProcessorFamilyIntelAtom = 0x2B,
- ProcessorFamilyAlpha3 = 0x30,
+ ProcessorFamilyIntelCoreM = 0x2C,
+ ProcessorFamilyAlpha = 0x30,
ProcessorFamilyAlpha21064 = 0x31,
ProcessorFamilyAlpha21066 = 0x32,
ProcessorFamilyAlpha21164 = 0x33,
@@ -421,19 +459,37 @@ typedef enum {
ProcessorFamilyAlpha21164a = 0x35,
ProcessorFamilyAlpha21264 = 0x36,
ProcessorFamilyAlpha21364 = 0x37,
+ ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,
+ ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,
+ ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,
+ ProcessorFamilyAmdOpteron6100Series = 0x3B,
+ ProcessorFamilyAmdOpteron4100Series = 0x3C,
+ ProcessorFamilyAmdOpteron6200Series = 0x3D,
+ ProcessorFamilyAmdOpteron4200Series = 0x3E,
+ ProcessorFamilyAmdFxSeries = 0x3F,
ProcessorFamilyMips = 0x40,
ProcessorFamilyMIPSR4000 = 0x41,
ProcessorFamilyMIPSR4200 = 0x42,
ProcessorFamilyMIPSR4400 = 0x43,
ProcessorFamilyMIPSR4600 = 0x44,
ProcessorFamilyMIPSR10000 = 0x45,
+ ProcessorFamilyAmdCSeries = 0x46,
+ ProcessorFamilyAmdESeries = 0x47,
+ ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name
+ ProcessorFamilyAmdGSeries = 0x49,
+ ProcessorFamilyAmdZSeries = 0x4A,
+ ProcessorFamilyAmdRSeries = 0x4B,
+ ProcessorFamilyAmdOpteron4300 = 0x4C,
+ ProcessorFamilyAmdOpteron6300 = 0x4D,
+ ProcessorFamilyAmdOpteron3300 = 0x4E,
+ ProcessorFamilyAmdFireProSeries = 0x4F,
ProcessorFamilySparc = 0x50,
ProcessorFamilySuperSparc = 0x51,
ProcessorFamilymicroSparcII = 0x52,
ProcessorFamilymicroSparcIIep = 0x53,
ProcessorFamilyUltraSparc = 0x54,
ProcessorFamilyUltraSparcII = 0x55,
- ProcessorFamilyUltraSparcIIi = 0x56,
+ ProcessorFamilyUltraSparcIii = 0x56,
ProcessorFamilyUltraSparcIII = 0x57,
ProcessorFamilyUltraSparcIIIi = 0x58,
ProcessorFamily68040 = 0x60,
@@ -442,6 +498,9 @@ typedef enum {
ProcessorFamily68010 = 0x63,
ProcessorFamily68020 = 0x64,
ProcessorFamily68030 = 0x65,
+ ProcessorFamilyAmdAthlonX4QuadCore = 0x66,
+ ProcessorFamilyAmdOpteronX1000Series = 0x67,
+ ProcessorFamilyAmdOpteronX2000Series = 0x68,
ProcessorFamilyHobbit = 0x70,
ProcessorFamilyCrusoeTM5000 = 0x78,
ProcessorFamilyCrusoeTM3000 = 0x79,
@@ -497,7 +556,7 @@ typedef enum {
ProcessorFamilyIntelCeleronD = 0xBA,
ProcessorFamilyIntelPentiumD = 0xBB,
ProcessorFamilyIntelPentiumEx = 0xBC,
- ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 correct this value
+ ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value
ProcessorFamilyReserved = 0xBE,
ProcessorFamilyIntelCore2 = 0xBF,
ProcessorFamilyIntelCore2Solo = 0xC0,
@@ -512,7 +571,9 @@ typedef enum {
ProcessorFamilyG4 = 0xC9,
ProcessorFamilyG5 = 0xCA,
ProcessorFamilyG6 = 0xCB,
- ProcessorFamilyzArchitectur = 0xCC,
+ ProcessorFamilyzArchitecture = 0xCC,
+ ProcessorFamilyIntelCoreI5 = 0xCD,
+ ProcessorFamilyIntelCoreI3 = 0xCE,
ProcessorFamilyViaC7M = 0xD2,
ProcessorFamilyViaC7D = 0xD3,
ProcessorFamilyViaC7 = 0xD4,
@@ -520,23 +581,47 @@ typedef enum {
ProcessorFamilyMultiCoreIntelXeon = 0xD6,
ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,
ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,
+ ProcessorFamilyViaNano = 0xD9,
ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,
ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,
ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,
ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,
ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,
+ ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,
+ ProcessorFamilyAmdOpteron3000Series = 0xE4,
+ ProcessorFamilyAmdSempronII = 0xE5,
ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,
ProcessorFamilyAmdPhenomTripleCore = 0xE7,
ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,
ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,
ProcessorFamilyAmdAthlonDualCore = 0xEA,
ProcessorFamilyAmdSempronSI = 0xEB,
+ ProcessorFamilyAmdPhenomII = 0xEC,
+ ProcessorFamilyAmdAthlonII = 0xED,
+ ProcessorFamilySixCoreAmdOpteron = 0xEE,
+ ProcessorFamilyAmdSempronM = 0xEF,
ProcessorFamilyi860 = 0xFA,
ProcessorFamilyi960 = 0xFB,
ProcessorFamilyIndicatorFamily2 = 0xFE,
ProcessorFamilyReserved1 = 0xFF
} PROCESSOR_FAMILY_DATA;
+///
+/// Processor Information2 - Processor Family2.
+///
+typedef enum {
+ ProcessorFamilySH3 = 0x0104,
+ ProcessorFamilySH4 = 0x0105,
+ ProcessorFamilyARM = 0x0118,
+ ProcessorFamilyStrongARM = 0x0119,
+ ProcessorFamily6x86 = 0x012C,
+ ProcessorFamilyMediaGX = 0x012D,
+ ProcessorFamilyMII = 0x012E,
+ ProcessorFamilyWinChip = 0x0140,
+ ProcessorFamilyDSP = 0x015E,
+ ProcessorFamilyVideoProcessor = 0x01F4
+} PROCESSOR_FAMILY2_DATA;
+
///
/// Processor Information - Voltage.
///
@@ -577,7 +662,30 @@ typedef enum {
ProcessorUpgradeSocketS1 = 0x16,
ProcessorUpgradeAM2 = 0x17,
ProcessorUpgradeF1207 = 0x18,
- ProcessorSocketLGA1366 = 0x19
+ ProcessorSocketLGA1366 = 0x19,
+ ProcessorUpgradeSocketG34 = 0x1A,
+ ProcessorUpgradeSocketAM3 = 0x1B,
+ ProcessorUpgradeSocketC32 = 0x1C,
+ ProcessorUpgradeSocketLGA1156 = 0x1D,
+ ProcessorUpgradeSocketLGA1567 = 0x1E,
+ ProcessorUpgradeSocketPGA988A = 0x1F,
+ ProcessorUpgradeSocketBGA1288 = 0x20,
+ ProcessorUpgradeSocketrPGA988B = 0x21,
+ ProcessorUpgradeSocketBGA1023 = 0x22,
+ ProcessorUpgradeSocketBGA1224 = 0x23,
+ ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name
+ ProcessorUpgradeSocketLGA1356 = 0x25,
+ ProcessorUpgradeSocketLGA2011 = 0x26,
+ ProcessorUpgradeSocketFS1 = 0x27,
+ ProcessorUpgradeSocketFS2 = 0x28,
+ ProcessorUpgradeSocketFM1 = 0x29,
+ ProcessorUpgradeSocketFM2 = 0x2A,
+ ProcessorUpgradeSocketLGA2011_3 = 0x2B,
+ ProcessorUpgradeSocketLGA1356_3 = 0x2C,
+ ProcessorUpgradeSocketLGA1150 = 0x2D,
+ ProcessorUpgradeSocketBGA1168 = 0x2E,
+ ProcessorUpgradeSocketBGA1234 = 0x2F,
+ ProcessorUpgradeSocketBGA1364 = 0x30
} PROCESSOR_UPGRADE;
///
@@ -673,6 +781,12 @@ typedef struct {
// Add for smbios 2.6
//
UINT16 ProcessorFamily2;
+ //
+ // Add for smbios 3.0
+ //
+ UINT16 CoreCount2;
+ UINT16 EnabledCoreCount2;
+ UINT16 ThreadCount2;
} SMBIOS_TABLE_TYPE4;
///
@@ -810,8 +924,8 @@ typedef struct {
UINT16 NonBurst :1;
UINT16 Burst :1;
UINT16 PipelineBurst :1;
- UINT16 Asynchronous :1;
UINT16 Synchronous :1;
+ UINT16 Asynchronous :1;
UINT16 Reserved :9;
} CACHE_SRAM_TYPE_DATA;
@@ -854,7 +968,8 @@ typedef enum {
CacheAssociativity24Way = 0x0A,
CacheAssociativity32Way = 0x0B,
CacheAssociativity48Way = 0x0C,
- CacheAssociativity64Way = 0x0D
+ CacheAssociativity64Way = 0x0D,
+ CacheAssociativity20Way = 0x0E
} CACHE_ASSOCIATIVITY_DATA;
///
@@ -897,7 +1012,7 @@ typedef enum {
PortConnectorTypeRJ45 = 0x0B,
PortConnectorType50PinMiniScsi = 0x0C,
PortConnectorTypeMiniDin = 0x0D,
- PortConnectorTypeMicriDin = 0x0E,
+ PortConnectorTypeMicroDin = 0x0E,
PortConnectorTypePS2 = 0x0F,
PortConnectorTypeInfrared = 0x10,
PortConnectorTypeHpHil = 0x11,
@@ -917,6 +1032,7 @@ typedef enum {
PortConnectorTypeHeadPhoneMiniJack = 0x1F,
PortConnectorTypeBNC = 0x20,
PortConnectorType1394 = 0x21,
+ PortConnectorTypeSasSata = 0x22,
PortConnectorTypePC98 = 0xA0,
PortConnectorTypePC98Hireso = 0xA1,
PortConnectorTypePCH98 = 0xA2,
@@ -1004,7 +1120,20 @@ typedef enum {
SlotTypeApg2X = 0x10,
SlotTypeAgp4X = 0x11,
SlotTypePciX = 0x12,
- SlotTypeAgp4x = 0x13,
+ SlotTypeAgp8X = 0x13,
+ SlotTypeM2Socket1_DP = 0x14,
+ SlotTypeM2Socket1_SD = 0x15,
+ SlotTypeM2Socket2 = 0x16,
+ SlotTypeM2Socket3 = 0x17,
+ SlotTypeMxmTypeI = 0x18,
+ SlotTypeMxmTypeII = 0x19,
+ SlotTypeMxmTypeIIIStandard = 0x1A,
+ SlotTypeMxmTypeIIIHe = 0x1B,
+ SlotTypeMxmTypeIV = 0x1C,
+ SlotTypeMxm30TypeA = 0x1D,
+ SlotTypeMxm30TypeB = 0x1E,
+ SlotTypePciExpressGen2Sff_8639 = 0x1F,
+ SlotTypePciExpressGen3Sff_8639 = 0x20,
SlotTypePC98C20 = 0xA0,
SlotTypePC98C24 = 0xA1,
SlotTypePC98E = 0xA2,
@@ -1021,7 +1150,13 @@ typedef enum {
SlotTypePciExpressGen2X2 = 0xAD,
SlotTypePciExpressGen2X4 = 0xAE,
SlotTypePciExpressGen2X8 = 0xAF,
- SlotTypePciExpressGen2X16 = 0xB0
+ SlotTypePciExpressGen2X16 = 0xB0,
+ SlotTypePciExpressGen3 = 0xB1,
+ SlotTypePciExpressGen3X1 = 0xB2,
+ SlotTypePciExpressGen3X2 = 0xB3,
+ SlotTypePciExpressGen3X4 = 0xB4,
+ SlotTypePciExpressGen3X8 = 0xB5,
+ SlotTypePciExpressGen3X16 = 0xB6
} MISC_SLOT_TYPE;
///
@@ -1122,7 +1257,10 @@ typedef enum {
OnBoardDeviceTypeScsiController = 0x04,
OnBoardDeviceTypeEthernet = 0x05,
OnBoardDeviceTypeTokenRing = 0x06,
- OnBoardDeviceTypeSound = 0x07
+ OnBoardDeviceTypeSound = 0x07,
+ OnBoardDeviceTypePATAController = 0x08,
+ OnBoardDeviceTypeSATAController = 0x09,
+ OnBoardDeviceTypeSASController = 0x0A
} MISC_ONBOARD_DEVICE_TYPE;
///
@@ -1183,6 +1321,27 @@ typedef struct {
SMBIOS_TABLE_STRING CurrentLanguages;
} SMBIOS_TABLE_TYPE13;
+///
+/// Group Item Entry
+///
+typedef struct {
+ UINT8 ItemType;
+ UINT16 ItemHandle;
+} GROUP_STRUCT;
+
+///
+/// Group Associations (Type 14).
+///
+/// The Group Associations structure is provided for OEMs who want to specify
+/// the arrangement or hierarchy of certain components (including other Group Associations)
+/// within the system.
+///
+typedef struct {
+ SMBIOS_STRUCTURE Hdr;
+ SMBIOS_TABLE_STRING GroupName;
+ GROUP_STRUCT Group[1];
+} SMBIOS_TABLE_TYPE14;
+
///
/// System Event Log - Event Log Types.
///
@@ -1230,14 +1389,6 @@ typedef enum {
EventLogVariableOEMAssigned = 0x80
} EVENT_LOG_VARIABLE_DATA;
-///
-/// Group Item Entry
-///
-typedef struct {
- UINT8 ItemType;
- UINT16 ItemHandle;
-} GROUP_STRUCT;
-
///
/// Event Log Type Descriptors
///
@@ -1246,19 +1397,6 @@ typedef struct {
UINT8 DataFormatType;
} EVENT_LOG_TYPE;
-///
-/// Group Associations (Type 14).
-///
-/// The Group Associations structure is provided for OEMs who want to specify
-/// the arrangement or hierarchy of certain components (including other Group Associations)
-/// within the system.
-///
-typedef struct {
- SMBIOS_STRUCTURE Hdr;
- SMBIOS_TABLE_STRING GroupName;
- GROUP_STRUCT Group[1];
-} SMBIOS_TABLE_TYPE14;
-
///
/// System Event Log (Type 15).
///
@@ -1342,6 +1480,10 @@ typedef struct {
UINT32 MaximumCapacity;
UINT16 MemoryErrorInformationHandle;
UINT16 NumberOfMemoryDevices;
+ //
+ // Add for smbios 2.7
+ //
+ UINT64 ExtendedMaximumCapacity;
} SMBIOS_TABLE_TYPE16;
///
@@ -1390,7 +1532,12 @@ typedef enum {
MemoryTypeDdr2 = 0x13,
MemoryTypeDdr2FbDimm = 0x14,
MemoryTypeDdr3 = 0x18,
- MemoryTypeFbd2 = 0x19
+ MemoryTypeFbd2 = 0x19,
+ MemoryTypeDdr4 = 0x1A,
+ MemoryTypeLpddr = 0x1B,
+ MemoryTypeLpddr2 = 0x1C,
+ MemoryTypeLpddr3 = 0x1D,
+ MemoryTypeLpddr4 = 0x1E
} MEMORY_DEVICE_TYPE;
typedef struct {
@@ -1407,7 +1554,9 @@ typedef struct {
UINT16 WindowDram :1;
UINT16 CacheDram :1;
UINT16 Nonvolatile :1;
- UINT16 Reserved1 :3;
+ UINT16 Registered :1;
+ UINT16 Unbuffered :1;
+ UINT16 LrDimm :1;
} MEMORY_DEVICE_TYPE_DETAIL;
///
@@ -1440,7 +1589,18 @@ typedef struct {
//
// Add for smbios 2.6
//
- UINT8 Attributes;
+ UINT8 Attributes;
+ //
+ // Add for smbios 2.7
+ //
+ UINT32 ExtendedSize;
+ UINT16 ConfiguredMemoryClockSpeed;
+ //
+ // Add for smbios 2.8.0
+ //
+ UINT16 MinimumVoltage;
+ UINT16 MaximumVoltage;
+ UINT16 ConfiguredVoltage;
} SMBIOS_TABLE_TYPE17;
///
@@ -1513,6 +1673,11 @@ typedef struct {
UINT32 EndingAddress;
UINT16 MemoryArrayHandle;
UINT8 PartitionWidth;
+ //
+ // Add for smbios 2.7
+ //
+ UINT64 ExtendedStartingAddress;
+ UINT64 ExtendedEndingAddress;
} SMBIOS_TABLE_TYPE19;
///
@@ -1530,6 +1695,11 @@ typedef struct {
UINT8 PartitionRowPosition;
UINT8 InterleavePosition;
UINT8 InterleavedDataDepth;
+ //
+ // Add for smbios 2.7
+ //
+ UINT64 ExtendedStartingAddress;
+ UINT64 ExtendedEndingAddress;
} SMBIOS_TABLE_TYPE20;
///
@@ -1711,6 +1881,10 @@ typedef struct {
UINT8 CoolingUnitGroup;
UINT32 OEMDefined;
UINT16 NominalSpeed;
+ //
+ // Add for smbios 2.7
+ //
+ SMBIOS_TABLE_STRING Description;
} SMBIOS_TABLE_TYPE27;
///
@@ -1970,9 +2144,14 @@ typedef enum {
///
/// IPMI Device Information (Type 38).
///
-/// The information in this structure defines the attributes of an
+/// The information in this structure defines the attributes of an
/// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).
-///
+///
+/// The Type 42 structure can also be used to describe a physical management controller
+/// host interface and one or more protocols that share that interface. If IPMI is not
+/// shared with other protocols, either the Type 38 or Type 42 structures can be used.
+/// Providing Type 38 is recommended for backward compatibility.
+///
typedef struct {
SMBIOS_STRUCTURE Hdr;
UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.
@@ -2000,8 +2179,8 @@ typedef struct {
///
/// System Power Supply (Type 39).
///
-/// This structure identifies attributes of a system power supply. One instance
-/// of this record is present for each possible power supply in a system.
+/// This structure identifies attributes of a system power supply. One instance
+/// of this record is present for each possible power supply in a system.
///
typedef struct {
SMBIOS_STRUCTURE Hdr;
@@ -2074,9 +2253,32 @@ typedef struct {
UINT8 DeviceTypeInstance;
UINT16 SegmentGroupNum;
UINT8 BusNum;
- UINT8 DevFuncNum;
+ UINT8 DevFuncNum;
} SMBIOS_TABLE_TYPE41;
+///
+/// Management Controller Host Interface (Type 42).
+///
+/// The information in this structure defines the attributes of a Management
+/// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.
+///
+/// Type 42 should be used for management controller host interfaces that use protocols
+/// other than IPMI or that use multiple protocols on a single host interface type.
+///
+/// This structure should also be provided if IPMI is shared with other protocols
+/// over the same interface hardware. If IPMI is not shared with other protocols,
+/// either the Type 38 or Type 42 structures can be used. Providing Type 38 is
+/// recommended for backward compatibility. The structures are not required to
+/// be mutually exclusive. Type 38 and Type 42 structures may be implemented
+/// simultaneously to provide backward compatibility with IPMI applications or drivers
+/// that do not yet recognize the Type 42 structure.
+///
+typedef struct {
+ SMBIOS_STRUCTURE Hdr;
+ UINT8 InterfaceType;
+ UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes
+} SMBIOS_TABLE_TYPE42;
+
///
/// Inactive (Type 126)
///
@@ -2138,6 +2340,7 @@ typedef union {
SMBIOS_TABLE_TYPE39 *Type39;
SMBIOS_TABLE_TYPE40 *Type40;
SMBIOS_TABLE_TYPE41 *Type41;
+ SMBIOS_TABLE_TYPE42 *Type42;
SMBIOS_TABLE_TYPE126 *Type126;
SMBIOS_TABLE_TYPE127 *Type127;
UINT8 *Raw;