X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=MdePkg%2FInclude%2FLibrary%2FPciCf8Lib.h;h=52fb142a9cbea3a6773cb4a818a7786c62279385;hb=d658727b50ab772c7f6e814d26d7766df9ea0429;hp=e2ac1b2a0187637104cfeefb997eb4441ffbeb35;hpb=24e25d11c0460dfb39fade685375c0e58cbcb40e;p=mirror_edk2.git

diff --git a/MdePkg/Include/Library/PciCf8Lib.h b/MdePkg/Include/Library/PciCf8Lib.h
index e2ac1b2a01..52fb142a9c 100644
--- a/MdePkg/Include/Library/PciCf8Lib.h
+++ b/MdePkg/Include/Library/PciCf8Lib.h
@@ -1,23 +1,24 @@
 /** @file
-  PCI CF8 Library Services for PCI Segment #0
+  Provides services to access PCI Configuration Space using the I/O ports 0xCF8 and 0xCFC.
+  
+  This library is identical to the PCI Library, except the access method for performing PCI 
+  configuration cycles must be through I/O ports 0xCF8 and 0xCFC.  This library only allows 
+  access to PCI Segment #0.
 
-  Copyright (c) 2006, Intel Corporation
-  All rights reserved. This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
+Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution.  The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
 
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-  Module Name:  PciCf8Lib.h
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 
 **/
 
 #ifndef __PCI_CF8_LIB_H__
 #define __PCI_CF8_LIB_H__
 
-#include <Library/PciLib.h>
 
 /**
   Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an
@@ -36,7 +37,35 @@
 
 **/
 #define PCI_CF8_LIB_ADDRESS(Bus,Device,Function,Offset) \
-  PCI_LIB_ADDRESS (Bus, Device, Function, Offset)
+  (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))
+
+/**
+  Registers a PCI device so PCI configuration registers may be accessed after 
+  SetVirtualAddressMap().
+  
+  Registers the PCI device specified by Address so all the PCI configuration registers 
+  associated with that PCI device may be accessed after SetVirtualAddressMap() is called.
+  
+  If Address > 0x0FFFFFFF, then ASSERT().
+  If the register specified by Address >= 0x100, then ASSERT().
+
+  @param  Address Address that encodes the PCI Bus, Device, Function and
+                  Register.
+  
+  @retval RETURN_SUCCESS           The PCI device was registered for runtime access.
+  @retval RETURN_UNSUPPORTED       An attempt was made to call this function 
+                                   after ExitBootServices().
+  @retval RETURN_UNSUPPORTED       The resources required to access the PCI device
+                                   at runtime could not be mapped.
+  @retval RETURN_OUT_OF_RESOURCES  There are not enough resources available to
+                                   complete the registration.
+
+**/
+RETURN_STATUS
+EFIAPI
+PciCf8RegisterForRuntimeAccess (
+  IN UINTN  Address
+  );
 
 /**
   Reads an 8-bit PCI configuration register.
@@ -81,15 +110,15 @@ UINT8
 EFIAPI
 PciCf8Write8 (
   IN      UINTN                     Address,
-  IN      UINT8                     Data
+  IN      UINT8                     Value
   );
 
 /**
-  Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
+  Performs a bitwise OR of an 8-bit PCI configuration register with
   an 8-bit value.
 
   Reads the 8-bit PCI configuration register specified by Address, performs a
-  bitwise inclusive OR between the read result and the value specified by
+  bitwise OR between the read result and the value specified by
   OrData, and writes the result to the 8-bit PCI configuration register
   specified by Address. The value written to the PCI configuration register is
   returned. This function must guarantee that all PCI read and write operations
@@ -142,11 +171,11 @@ PciCf8And8 (
 
 /**
   Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
-  value, followed a  bitwise inclusive OR with another 8-bit value.
+  value, followed a  bitwise OR with another 8-bit value.
 
   Reads the 8-bit PCI configuration register specified by Address, performs a
   bitwise AND between the read result and the value specified by AndData,
-  performs a bitwise inclusive OR between the result of the AND operation and
+  performs a bitwise OR between the result of the AND operation and
   the value specified by OrData, and writes the result to the 8-bit PCI
   configuration register specified by Address. The value written to the PCI
   configuration register is returned. This function must guarantee that all PCI
@@ -214,6 +243,7 @@ PciCf8BitFieldRead8 (
   If StartBit is greater than 7, then ASSERT().
   If EndBit is greater than 7, then ASSERT().
   If EndBit is less than StartBit, then ASSERT().
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
 
   @param  Address   PCI configuration register to write.
   @param  StartBit  The ordinal of the least significant bit in the bit field.
@@ -239,7 +269,7 @@ PciCf8BitFieldWrite8 (
   writes the result back to the bit field in the 8-bit port.
 
   Reads the 8-bit PCI configuration register specified by Address, performs a
-  bitwise inclusive OR between the read result and the value specified by
+  bitwise OR between the read result and the value specified by
   OrData, and writes the result to the 8-bit PCI configuration register
   specified by Address. The value written to the PCI configuration register is
   returned. This function must guarantee that all PCI read and write operations
@@ -250,6 +280,7 @@ PciCf8BitFieldWrite8 (
   If StartBit is greater than 7, then ASSERT().
   If EndBit is greater than 7, then ASSERT().
   If EndBit is less than StartBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
 
   @param  Address   PCI configuration register to write.
   @param  StartBit  The ordinal of the least significant bit in the bit field.
@@ -286,6 +317,7 @@ PciCf8BitFieldOr8 (
   If StartBit is greater than 7, then ASSERT().
   If EndBit is greater than 7, then ASSERT().
   If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
 
   @param  Address   PCI configuration register to write.
   @param  StartBit  The ordinal of the least significant bit in the bit field.
@@ -308,11 +340,11 @@ PciCf8BitFieldAnd8 (
 
 /**
   Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
-  bitwise inclusive OR, and writes the result back to the bit field in the
+  bitwise OR, and writes the result back to the bit field in the
   8-bit port.
 
   Reads the 8-bit PCI configuration register specified by Address, performs a
-  bitwise AND followed by a bitwise inclusive OR between the read result and
+  bitwise AND followed by a bitwise OR between the read result and
   the value specified by AndData, and writes the result to the 8-bit PCI
   configuration register specified by Address. The value written to the PCI
   configuration register is returned. This function must guarantee that all PCI
@@ -324,6 +356,8 @@ PciCf8BitFieldAnd8 (
   If StartBit is greater than 7, then ASSERT().
   If EndBit is greater than 7, then ASSERT().
   If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
 
   @param  Address   PCI configuration register to write.
   @param  StartBit  The ordinal of the least significant bit in the bit field.
@@ -391,15 +425,15 @@ UINT16
 EFIAPI
 PciCf8Write16 (
   IN      UINTN                     Address,
-  IN      UINT16                    Data
+  IN      UINT16                    Value
   );
 
 /**
-  Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
+  Performs a bitwise OR of a 16-bit PCI configuration register with
   a 16-bit value.
 
   Reads the 16-bit PCI configuration register specified by Address, performs a
-  bitwise inclusive OR between the read result and the value specified by
+  bitwise OR between the read result and the value specified by
   OrData, and writes the result to the 16-bit PCI configuration register
   specified by Address. The value written to the PCI configuration register is
   returned. This function must guarantee that all PCI read and write operations
@@ -454,11 +488,11 @@ PciCf8And16 (
 
 /**
   Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
-  value, followed a  bitwise inclusive OR with another 16-bit value.
+  value, followed a  bitwise OR with another 16-bit value.
 
   Reads the 16-bit PCI configuration register specified by Address, performs a
   bitwise AND between the read result and the value specified by AndData,
-  performs a bitwise inclusive OR between the result of the AND operation and
+  performs a bitwise OR between the result of the AND operation and
   the value specified by OrData, and writes the result to the 16-bit PCI
   configuration register specified by Address. The value written to the PCI
   configuration register is returned. This function must guarantee that all PCI
@@ -529,6 +563,7 @@ PciCf8BitFieldRead16 (
   If StartBit is greater than 15, then ASSERT().
   If EndBit is greater than 15, then ASSERT().
   If EndBit is less than StartBit, then ASSERT().
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
 
   @param  Address   PCI configuration register to write.
   @param  StartBit  The ordinal of the least significant bit in the bit field.
@@ -554,7 +589,7 @@ PciCf8BitFieldWrite16 (
   writes the result back to the bit field in the 16-bit port.
 
   Reads the 16-bit PCI configuration register specified by Address, performs a
-  bitwise inclusive OR between the read result and the value specified by
+  bitwise OR between the read result and the value specified by
   OrData, and writes the result to the 16-bit PCI configuration register
   specified by Address. The value written to the PCI configuration register is
   returned. This function must guarantee that all PCI read and write operations
@@ -566,6 +601,7 @@ PciCf8BitFieldWrite16 (
   If StartBit is greater than 15, then ASSERT().
   If EndBit is greater than 15, then ASSERT().
   If EndBit is less than StartBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
 
   @param  Address   PCI configuration register to write.
   @param  StartBit  The ordinal of the least significant bit in the bit field.
@@ -603,6 +639,7 @@ PciCf8BitFieldOr16 (
   If StartBit is greater than 15, then ASSERT().
   If EndBit is greater than 15, then ASSERT().
   If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
 
   @param  Address   PCI configuration register to write.
   @param  StartBit  The ordinal of the least significant bit in the bit field.
@@ -625,11 +662,11 @@ PciCf8BitFieldAnd16 (
 
 /**
   Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
-  bitwise inclusive OR, and writes the result back to the bit field in the
+  bitwise OR, and writes the result back to the bit field in the
   16-bit port.
 
   Reads the 16-bit PCI configuration register specified by Address, performs a
-  bitwise AND followed by a bitwise inclusive OR between the read result and
+  bitwise AND followed by a bitwise OR between the read result and
   the value specified by AndData, and writes the result to the 16-bit PCI
   configuration register specified by Address. The value written to the PCI
   configuration register is returned. This function must guarantee that all PCI
@@ -642,6 +679,8 @@ PciCf8BitFieldAnd16 (
   If StartBit is greater than 15, then ASSERT().
   If EndBit is greater than 15, then ASSERT().
   If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
 
   @param  Address   PCI configuration register to write.
   @param  StartBit  The ordinal of the least significant bit in the bit field.
@@ -709,15 +748,15 @@ UINT32
 EFIAPI
 PciCf8Write32 (
   IN      UINTN                     Address,
-  IN      UINT32                    Data
+  IN      UINT32                    Value
   );
 
 /**
-  Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
+  Performs a bitwise OR of a 32-bit PCI configuration register with
   a 32-bit value.
 
   Reads the 32-bit PCI configuration register specified by Address, performs a
-  bitwise inclusive OR between the read result and the value specified by
+  bitwise OR between the read result and the value specified by
   OrData, and writes the result to the 32-bit PCI configuration register
   specified by Address. The value written to the PCI configuration register is
   returned. This function must guarantee that all PCI read and write operations
@@ -772,11 +811,11 @@ PciCf8And32 (
 
 /**
   Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
-  value, followed a  bitwise inclusive OR with another 32-bit value.
+  value, followed a  bitwise OR with another 32-bit value.
 
   Reads the 32-bit PCI configuration register specified by Address, performs a
   bitwise AND between the read result and the value specified by AndData,
-  performs a bitwise inclusive OR between the result of the AND operation and
+  performs a bitwise OR between the result of the AND operation and
   the value specified by OrData, and writes the result to the 32-bit PCI
   configuration register specified by Address. The value written to the PCI
   configuration register is returned. This function must guarantee that all PCI
@@ -847,6 +886,7 @@ PciCf8BitFieldRead32 (
   If StartBit is greater than 31, then ASSERT().
   If EndBit is greater than 31, then ASSERT().
   If EndBit is less than StartBit, then ASSERT().
+  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
 
   @param  Address   PCI configuration register to write.
   @param  StartBit  The ordinal of the least significant bit in the bit field.
@@ -872,7 +912,7 @@ PciCf8BitFieldWrite32 (
   writes the result back to the bit field in the 32-bit port.
 
   Reads the 32-bit PCI configuration register specified by Address, performs a
-  bitwise inclusive OR between the read result and the value specified by
+  bitwise OR between the read result and the value specified by
   OrData, and writes the result to the 32-bit PCI configuration register
   specified by Address. The value written to the PCI configuration register is
   returned. This function must guarantee that all PCI read and write operations
@@ -884,6 +924,7 @@ PciCf8BitFieldWrite32 (
   If StartBit is greater than 31, then ASSERT().
   If EndBit is greater than 31, then ASSERT().
   If EndBit is less than StartBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
 
   @param  Address   PCI configuration register to write.
   @param  StartBit  The ordinal of the least significant bit in the bit field.
@@ -921,6 +962,7 @@ PciCf8BitFieldOr32 (
   If StartBit is greater than 31, then ASSERT().
   If EndBit is greater than 31, then ASSERT().
   If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
 
   @param  Address   PCI configuration register to write.
   @param  StartBit  The ordinal of the least significant bit in the bit field.
@@ -943,11 +985,11 @@ PciCf8BitFieldAnd32 (
 
 /**
   Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
-  bitwise inclusive OR, and writes the result back to the bit field in the
+  bitwise OR, and writes the result back to the bit field in the
   32-bit port.
 
   Reads the 32-bit PCI configuration register specified by Address, performs a
-  bitwise AND followed by a bitwise inclusive OR between the read result and
+  bitwise AND followed by a bitwise OR between the read result and
   the value specified by AndData, and writes the result to the 32-bit PCI
   configuration register specified by Address. The value written to the PCI
   configuration register is returned. This function must guarantee that all PCI
@@ -960,6 +1002,8 @@ PciCf8BitFieldAnd32 (
   If StartBit is greater than 31, then ASSERT().
   If EndBit is greater than 31, then ASSERT().
   If EndBit is less than StartBit, then ASSERT().
+  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
 
   @param  Address   PCI configuration register to write.
   @param  StartBit  The ordinal of the least significant bit in the bit field.
@@ -996,15 +1040,14 @@ PciCf8BitFieldAndThenOr32 (
   If StartAddress > 0x0FFFFFFF, then ASSERT().
   If the register specified by StartAddress >= 0x100, then ASSERT().
   If ((StartAddress & 0xFFF) + Size) > 0x100, then ASSERT().
-  If (StartAddress + Size - 1)  > 0x0FFFFFFF, then ASSERT().
-  If Buffer is NULL, then ASSERT().
+  If Size > 0 and Buffer is NULL, then ASSERT().
 
   @param  StartAddress  Starting address that encodes the PCI Bus, Device,
                         Function and Register.
   @param  Size          Size in bytes of the transfer.
   @param  Buffer        Pointer to a buffer receiving the data read.
 
-  @return Size
+  @return Size read from StartAddress.
 
 **/
 UINTN
@@ -1030,15 +1073,14 @@ PciCf8ReadBuffer (
   If StartAddress > 0x0FFFFFFF, then ASSERT().
   If the register specified by StartAddress >= 0x100, then ASSERT().
   If ((StartAddress & 0xFFF) + Size) > 0x100, then ASSERT().
-  If (StartAddress + Size - 1)  > 0x0FFFFFFF, then ASSERT().
-  If Buffer is NULL, then ASSERT().
+  If Size > 0 and Buffer is NULL, then ASSERT().
 
   @param  StartAddress  Starting address that encodes the PCI Bus, Device,
                         Function and Register.
   @param  Size          Size in bytes of the transfer.
   @param  Buffer        Pointer to a buffer containing the data to write.
 
-  @return Size
+  @return Size written to StartAddress.
 
 **/
 UINTN