X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=MdePkg%2FInclude%2FLibrary%2FPciExpressLib.h;h=06deb65207e5a2029cdebbf92d6de837f2f368be;hb=HEAD;hp=a3c3ddae78421d3e868b24f31c51b63bcb3add43;hpb=57542665705a63460d993697966cbe254d844c19;p=mirror_edk2.git
diff --git a/MdePkg/Include/Library/PciExpressLib.h b/MdePkg/Include/Library/PciExpressLib.h
index a3c3ddae78..06deb65207 100644
--- a/MdePkg/Include/Library/PciExpressLib.h
+++ b/MdePkg/Include/Library/PciExpressLib.h
@@ -1,20 +1,21 @@
/** @file
- Pci Express Library Services for PCI Segment #0
+ Provides services to access PCI Configuration Space using the MMIO PCI Express window.
- Copyright (c) 2006 - 2008, Intel Corporation
- All rights reserved. This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
+ This library is identical to the PCI Library, except the access method for performing PCI
+ configuration cycles must be through the PCI Express MMIO window whose base address
+ is defined by PcdPciExpressBaseAddress and size defined by PcdPciExpressBaseSize.
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __PCI_EXPRESS_LIB_H__
#define __PCI_EXPRESS_LIB_H__
+#include
+
/**
Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an
address that can be passed to the PCI Library functions.
@@ -31,8 +32,35 @@
@return The encode PCI address.
**/
-#define PCI_EXPRESS_LIB_ADDRESS(Bus,Device,Function,Offset) \
- (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))
+#define PCI_EXPRESS_LIB_ADDRESS(Bus, Device, Function, Offset) PCI_ECAM_ADDRESS ((Bus), (Device), (Function), (Offset))
+
+/**
+ Registers a PCI device so PCI configuration registers may be accessed after
+ SetVirtualAddressMap().
+
+ Registers the PCI device specified by Address so all the PCI configuration
+ registers associated with that PCI device may be accessed after SetVirtualAddressMap()
+ is called.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @retval RETURN_SUCCESS The PCI device was registered for runtime access.
+ @retval RETURN_UNSUPPORTED An attempt was made to call this function
+ after ExitBootServices().
+ @retval RETURN_UNSUPPORTED The resources required to access the PCI device
+ at runtime could not be mapped.
+ @retval RETURN_OUT_OF_RESOURCES There are not enough resources available to
+ complete the registration.
+
+**/
+RETURN_STATUS
+EFIAPI
+PciExpressRegisterForRuntimeAccess (
+ IN UINTN Address
+ );
/**
Reads an 8-bit PCI configuration register.
@@ -52,7 +80,7 @@
UINT8
EFIAPI
PciExpressRead8 (
- IN UINTN Address
+ IN UINTN Address
);
/**
@@ -74,16 +102,16 @@ PciExpressRead8 (
UINT8
EFIAPI
PciExpressWrite8 (
- IN UINTN Address,
- IN UINT8 Value
+ IN UINTN Address,
+ IN UINT8 Value
);
/**
- Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
+ Performs a bitwise OR of an 8-bit PCI configuration register with
an 8-bit value.
Reads the 8-bit PCI configuration register specified by Address, performs a
- bitwise inclusive OR between the read result and the value specified by
+ bitwise OR between the read result and the value specified by
OrData, and writes the result to the 8-bit PCI configuration register
specified by Address. The value written to the PCI configuration register is
returned. This function must guarantee that all PCI read and write operations
@@ -101,8 +129,8 @@ PciExpressWrite8 (
UINT8
EFIAPI
PciExpressOr8 (
- IN UINTN Address,
- IN UINT8 OrData
+ IN UINTN Address,
+ IN UINT8 OrData
);
/**
@@ -128,17 +156,17 @@ PciExpressOr8 (
UINT8
EFIAPI
PciExpressAnd8 (
- IN UINTN Address,
- IN UINT8 AndData
+ IN UINTN Address,
+ IN UINT8 AndData
);
/**
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
- value, followed a bitwise inclusive OR with another 8-bit value.
+ value, followed a bitwise OR with another 8-bit value.
Reads the 8-bit PCI configuration register specified by Address, performs a
bitwise AND between the read result and the value specified by AndData,
- performs a bitwise inclusive OR between the result of the AND operation and
+ performs a bitwise OR between the result of the AND operation and
the value specified by OrData, and writes the result to the 8-bit PCI
configuration register specified by Address. The value written to the PCI
configuration register is returned. This function must guarantee that all PCI
@@ -157,9 +185,9 @@ PciExpressAnd8 (
UINT8
EFIAPI
PciExpressAndThenOr8 (
- IN UINTN Address,
- IN UINT8 AndData,
- IN UINT8 OrData
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
);
/**
@@ -186,9 +214,9 @@ PciExpressAndThenOr8 (
UINT8
EFIAPI
PciExpressBitFieldRead8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
);
/**
@@ -203,6 +231,7 @@ PciExpressBitFieldRead8 (
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -217,10 +246,10 @@ PciExpressBitFieldRead8 (
UINT8
EFIAPI
PciExpressBitFieldWrite8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 Value
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
);
/**
@@ -228,7 +257,7 @@ PciExpressBitFieldWrite8 (
writes the result back to the bit field in the 8-bit port.
Reads the 8-bit PCI configuration register specified by Address, performs a
- bitwise inclusive OR between the read result and the value specified by
+ bitwise OR between the read result and the value specified by
OrData, and writes the result to the 8-bit PCI configuration register
specified by Address. The value written to the PCI configuration register is
returned. This function must guarantee that all PCI read and write operations
@@ -238,6 +267,7 @@ PciExpressBitFieldWrite8 (
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -252,10 +282,10 @@ PciExpressBitFieldWrite8 (
UINT8
EFIAPI
PciExpressBitFieldOr8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
);
/**
@@ -273,6 +303,7 @@ PciExpressBitFieldOr8 (
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -287,19 +318,19 @@ PciExpressBitFieldOr8 (
UINT8
EFIAPI
PciExpressBitFieldAnd8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 AndData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
);
/**
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
- bitwise inclusive OR, and writes the result back to the bit field in the
+ bitwise OR, and writes the result back to the bit field in the
8-bit port.
Reads the 8-bit PCI configuration register specified by Address, performs a
- bitwise AND followed by a bitwise inclusive OR between the read result and
+ bitwise AND followed by a bitwise OR between the read result and
the value specified by AndData, and writes the result to the 8-bit PCI
configuration register specified by Address. The value written to the PCI
configuration register is returned. This function must guarantee that all PCI
@@ -310,6 +341,8 @@ PciExpressBitFieldAnd8 (
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -325,11 +358,11 @@ PciExpressBitFieldAnd8 (
UINT8
EFIAPI
PciExpressBitFieldAndThenOr8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 AndData,
- IN UINT8 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
);
/**
@@ -351,7 +384,7 @@ PciExpressBitFieldAndThenOr8 (
UINT16
EFIAPI
PciExpressRead16 (
- IN UINTN Address
+ IN UINTN Address
);
/**
@@ -374,16 +407,16 @@ PciExpressRead16 (
UINT16
EFIAPI
PciExpressWrite16 (
- IN UINTN Address,
- IN UINT16 Value
+ IN UINTN Address,
+ IN UINT16 Value
);
/**
- Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
+ Performs a bitwise OR of a 16-bit PCI configuration register with
a 16-bit value.
Reads the 16-bit PCI configuration register specified by Address, performs a
- bitwise inclusive OR between the read result and the value specified by
+ bitwise OR between the read result and the value specified by
OrData, and writes the result to the 16-bit PCI configuration register
specified by Address. The value written to the PCI configuration register is
returned. This function must guarantee that all PCI read and write operations
@@ -402,8 +435,8 @@ PciExpressWrite16 (
UINT16
EFIAPI
PciExpressOr16 (
- IN UINTN Address,
- IN UINT16 OrData
+ IN UINTN Address,
+ IN UINT16 OrData
);
/**
@@ -430,17 +463,17 @@ PciExpressOr16 (
UINT16
EFIAPI
PciExpressAnd16 (
- IN UINTN Address,
- IN UINT16 AndData
+ IN UINTN Address,
+ IN UINT16 AndData
);
/**
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
- value, followed a bitwise inclusive OR with another 16-bit value.
+ value, followed a bitwise OR with another 16-bit value.
Reads the 16-bit PCI configuration register specified by Address, performs a
bitwise AND between the read result and the value specified by AndData,
- performs a bitwise inclusive OR between the result of the AND operation and
+ performs a bitwise OR between the result of the AND operation and
the value specified by OrData, and writes the result to the 16-bit PCI
configuration register specified by Address. The value written to the PCI
configuration register is returned. This function must guarantee that all PCI
@@ -460,9 +493,9 @@ PciExpressAnd16 (
UINT16
EFIAPI
PciExpressAndThenOr16 (
- IN UINTN Address,
- IN UINT16 AndData,
- IN UINT16 OrData
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
);
/**
@@ -490,9 +523,9 @@ PciExpressAndThenOr16 (
UINT16
EFIAPI
PciExpressBitFieldRead16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
);
/**
@@ -508,6 +541,7 @@ PciExpressBitFieldRead16 (
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -522,10 +556,10 @@ PciExpressBitFieldRead16 (
UINT16
EFIAPI
PciExpressBitFieldWrite16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 Value
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
);
/**
@@ -533,7 +567,7 @@ PciExpressBitFieldWrite16 (
writes the result back to the bit field in the 16-bit port.
Reads the 16-bit PCI configuration register specified by Address, performs a
- bitwise inclusive OR between the read result and the value specified by
+ bitwise OR between the read result and the value specified by
OrData, and writes the result to the 16-bit PCI configuration register
specified by Address. The value written to the PCI configuration register is
returned. This function must guarantee that all PCI read and write operations
@@ -544,6 +578,7 @@ PciExpressBitFieldWrite16 (
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -558,10 +593,10 @@ PciExpressBitFieldWrite16 (
UINT16
EFIAPI
PciExpressBitFieldOr16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
);
/**
@@ -580,6 +615,7 @@ PciExpressBitFieldOr16 (
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -594,19 +630,19 @@ PciExpressBitFieldOr16 (
UINT16
EFIAPI
PciExpressBitFieldAnd16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 AndData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
);
/**
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
- bitwise inclusive OR, and writes the result back to the bit field in the
+ bitwise OR, and writes the result back to the bit field in the
16-bit port.
Reads the 16-bit PCI configuration register specified by Address, performs a
- bitwise AND followed by a bitwise inclusive OR between the read result and
+ bitwise AND followed by a bitwise OR between the read result and
the value specified by AndData, and writes the result to the 16-bit PCI
configuration register specified by Address. The value written to the PCI
configuration register is returned. This function must guarantee that all PCI
@@ -618,6 +654,8 @@ PciExpressBitFieldAnd16 (
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -633,11 +671,11 @@ PciExpressBitFieldAnd16 (
UINT16
EFIAPI
PciExpressBitFieldAndThenOr16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 AndData,
- IN UINT16 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
);
/**
@@ -659,7 +697,7 @@ PciExpressBitFieldAndThenOr16 (
UINT32
EFIAPI
PciExpressRead32 (
- IN UINTN Address
+ IN UINTN Address
);
/**
@@ -682,16 +720,16 @@ PciExpressRead32 (
UINT32
EFIAPI
PciExpressWrite32 (
- IN UINTN Address,
- IN UINT32 Value
+ IN UINTN Address,
+ IN UINT32 Value
);
/**
- Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
+ Performs a bitwise OR of a 32-bit PCI configuration register with
a 32-bit value.
Reads the 32-bit PCI configuration register specified by Address, performs a
- bitwise inclusive OR between the read result and the value specified by
+ bitwise OR between the read result and the value specified by
OrData, and writes the result to the 32-bit PCI configuration register
specified by Address. The value written to the PCI configuration register is
returned. This function must guarantee that all PCI read and write operations
@@ -710,8 +748,8 @@ PciExpressWrite32 (
UINT32
EFIAPI
PciExpressOr32 (
- IN UINTN Address,
- IN UINT32 OrData
+ IN UINTN Address,
+ IN UINT32 OrData
);
/**
@@ -738,17 +776,17 @@ PciExpressOr32 (
UINT32
EFIAPI
PciExpressAnd32 (
- IN UINTN Address,
- IN UINT32 AndData
+ IN UINTN Address,
+ IN UINT32 AndData
);
/**
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
- value, followed a bitwise inclusive OR with another 32-bit value.
+ value, followed a bitwise OR with another 32-bit value.
Reads the 32-bit PCI configuration register specified by Address, performs a
bitwise AND between the read result and the value specified by AndData,
- performs a bitwise inclusive OR between the result of the AND operation and
+ performs a bitwise OR between the result of the AND operation and
the value specified by OrData, and writes the result to the 32-bit PCI
configuration register specified by Address. The value written to the PCI
configuration register is returned. This function must guarantee that all PCI
@@ -768,9 +806,9 @@ PciExpressAnd32 (
UINT32
EFIAPI
PciExpressAndThenOr32 (
- IN UINTN Address,
- IN UINT32 AndData,
- IN UINT32 OrData
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
);
/**
@@ -798,9 +836,9 @@ PciExpressAndThenOr32 (
UINT32
EFIAPI
PciExpressBitFieldRead32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
);
/**
@@ -816,6 +854,7 @@ PciExpressBitFieldRead32 (
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -830,10 +869,10 @@ PciExpressBitFieldRead32 (
UINT32
EFIAPI
PciExpressBitFieldWrite32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 Value
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
);
/**
@@ -841,7 +880,7 @@ PciExpressBitFieldWrite32 (
writes the result back to the bit field in the 32-bit port.
Reads the 32-bit PCI configuration register specified by Address, performs a
- bitwise inclusive OR between the read result and the value specified by
+ bitwise OR between the read result and the value specified by
OrData, and writes the result to the 32-bit PCI configuration register
specified by Address. The value written to the PCI configuration register is
returned. This function must guarantee that all PCI read and write operations
@@ -852,6 +891,7 @@ PciExpressBitFieldWrite32 (
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -866,10 +906,10 @@ PciExpressBitFieldWrite32 (
UINT32
EFIAPI
PciExpressBitFieldOr32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
);
/**
@@ -888,6 +928,7 @@ PciExpressBitFieldOr32 (
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -902,19 +943,19 @@ PciExpressBitFieldOr32 (
UINT32
EFIAPI
PciExpressBitFieldAnd32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 AndData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
);
/**
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
- bitwise inclusive OR, and writes the result back to the bit field in the
+ bitwise OR, and writes the result back to the bit field in the
32-bit port.
Reads the 32-bit PCI configuration register specified by Address, performs a
- bitwise AND followed by a bitwise inclusive OR between the read result and
+ bitwise AND followed by a bitwise OR between the read result and
the value specified by AndData, and writes the result to the 32-bit PCI
configuration register specified by Address. The value written to the PCI
configuration register is returned. This function must guarantee that all PCI
@@ -926,6 +967,8 @@ PciExpressBitFieldAnd32 (
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -941,11 +984,11 @@ PciExpressBitFieldAnd32 (
UINT32
EFIAPI
PciExpressBitFieldAndThenOr32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 AndData,
- IN UINT32 OrData
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
);
/**
@@ -955,7 +998,7 @@ PciExpressBitFieldAndThenOr32 (
Size into the buffer specified by Buffer. This function only allows the PCI
configuration registers from a single PCI function to be read. Size is
returned. When possible 32-bit PCI configuration read cycles are used to read
- from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
+ from StartAddress to StartAddress + Size. Due to alignment restrictions, 8-bit
and 16-bit PCI configuration read cycles may be used at the beginning and the
end of the range.
@@ -968,15 +1011,15 @@ PciExpressBitFieldAndThenOr32 (
@param Size Size in bytes of the transfer.
@param Buffer Pointer to a buffer receiving the data read.
- @return Size read daata from StartAddress.
+ @return Size read data from StartAddress.
**/
UINTN
EFIAPI
PciExpressReadBuffer (
- IN UINTN StartAddress,
- IN UINTN Size,
- OUT VOID *Buffer
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ OUT VOID *Buffer
);
/**
@@ -987,7 +1030,7 @@ PciExpressReadBuffer (
Size from the buffer specified by Buffer. This function only allows the PCI
configuration registers from a single PCI function to be written. Size is
returned. When possible 32-bit PCI configuration write cycles are used to
- write from StartAdress to StartAddress + Size. Due to alignment restrictions,
+ write from StartAddress to StartAddress + Size. Due to alignment restrictions,
8-bit and 16-bit PCI configuration write cycles may be used at the beginning
and the end of the range.
@@ -1006,9 +1049,9 @@ PciExpressReadBuffer (
UINTN
EFIAPI
PciExpressWriteBuffer (
- IN UINTN StartAddress,
- IN UINTN Size,
- IN VOID *Buffer
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ IN VOID *Buffer
);
#endif