X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=MdePkg%2FInclude%2FLibrary%2FPciLib.h;h=b113ddf487830f7a80b6ea1e328d8205fec783e5;hb=d8af3301a648df3b4eea6933a46f56f1853367d6;hp=6acf13c7beb2ab8d5c854e93353f2b873d270b30;hpb=fb3df220f89e6eecaf1862b9241d8a1214eeda1c;p=mirror_edk2.git diff --git a/MdePkg/Include/Library/PciLib.h b/MdePkg/Include/Library/PciLib.h index 6acf13c7be..b113ddf487 100644 --- a/MdePkg/Include/Library/PciLib.h +++ b/MdePkg/Include/Library/PciLib.h @@ -1,16 +1,23 @@ /** @file - PCI Library Services for PCI Segment #0 - - Copyright (c) 2006, Intel Corporation - All rights reserved. This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - - Module Name: PciLib.h + Provides services to access PCI Configuration Space. + + These functions perform PCI configuration cycles using the default PCI configuration + access method. This may use I/O ports 0xCF8 and 0xCFC to perform PCI configuration accesses, + or it may use MMIO registers relative to the PcdPciExpressBaseAddress, or it may use some + alternate access method. Modules will typically use the PCI Library for its PCI configuration + accesses. However, if a module requires a mix of PCI access methods, the PCI CF8 Library or + PCI Express Library may be used in conjunction with the PCI Library. The functionality of + these three libraries is identical. The PCI CF8 Library and PCI Express Library simply use + explicit access methods. + +Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.
+This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. **/ @@ -30,8 +37,35 @@ @return The encoded PCI address. **/ -#define PCI_LIB_ADDRESS(Bus,Device,Function,Offset) \ - (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20)) +#define PCI_LIB_ADDRESS(Bus,Device,Function,Register) \ + (((Register) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20)) + +/** + Registers a PCI device so PCI configuration registers may be accessed after + SetVirtualAddressMap(). + + Registers the PCI device specified by Address so all the PCI configuration registers + associated with that PCI device may be accessed after SetVirtualAddressMap() is called. + + If Address > 0x0FFFFFFF, then ASSERT(). + + @param Address Address that encodes the PCI Bus, Device, Function and + Register. + + @retval RETURN_SUCCESS The PCI device was registered for runtime access. + @retval RETURN_UNSUPPORTED An attempt was made to call this function + after ExitBootServices(). + @retval RETURN_UNSUPPORTED The resources required to access the PCI device + at runtime could not be mapped. + @retval RETURN_OUT_OF_RESOURCES There are not enough resources available to + complete the registration. + +**/ +RETURN_STATUS +EFIAPI +PciRegisterForRuntimeAccess ( + IN UINTN Address + ); /** Reads an 8-bit PCI configuration register. @@ -74,15 +108,15 @@ UINT8 EFIAPI PciWrite8 ( IN UINTN Address, - IN UINT8 Data + IN UINT8 Value ); /** - Performs a bitwise inclusive OR of an 8-bit PCI configuration register with + Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value. Reads the 8-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -133,11 +167,11 @@ PciAnd8 ( /** Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit - value, followed a bitwise inclusive OR with another 8-bit value. + value, followed by a bitwise OR with another 8-bit value. Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, - performs a bitwise inclusive OR between the result of the AND operation and + performs a bitwise OR between the result of the AND operation and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -202,6 +236,7 @@ PciBitFieldRead8 ( If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -227,7 +262,7 @@ PciBitFieldWrite8 ( writes the result back to the bit field in the 8-bit port. Reads the 8-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -237,6 +272,7 @@ PciBitFieldWrite8 ( If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -272,6 +308,7 @@ PciBitFieldOr8 ( If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -294,11 +331,11 @@ PciBitFieldAnd8 ( /** Reads a bit field in an 8-bit port, performs a bitwise AND followed by a - bitwise inclusive OR, and writes the result back to the bit field in the + bitwise OR, and writes the result back to the bit field in the 8-bit port. Reads the 8-bit PCI configuration register specified by Address, performs a - bitwise AND followed by a bitwise inclusive OR between the read result and + bitwise AND followed by a bitwise OR between the read result and the value specified by AndData, and writes the result to the 8-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -309,6 +346,8 @@ PciBitFieldAnd8 ( If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -374,15 +413,15 @@ UINT16 EFIAPI PciWrite16 ( IN UINTN Address, - IN UINT16 Data + IN UINT16 Value ); /** - Performs a bitwise inclusive OR of a 16-bit PCI configuration register with + Performs a bitwise OR of a 16-bit PCI configuration register with a 16-bit value. Reads the 16-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -435,11 +474,11 @@ PciAnd16 ( /** Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit - value, followed a bitwise inclusive OR with another 16-bit value. + value, followed a bitwise OR with another 16-bit value. Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, - performs a bitwise inclusive OR between the result of the AND operation and + performs a bitwise OR between the result of the AND operation and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -507,6 +546,7 @@ PciBitFieldRead16 ( If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -532,7 +572,7 @@ PciBitFieldWrite16 ( writes the result back to the bit field in the 16-bit port. Reads the 16-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -543,6 +583,7 @@ PciBitFieldWrite16 ( If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -579,6 +620,7 @@ PciBitFieldOr16 ( If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -601,11 +643,11 @@ PciBitFieldAnd16 ( /** Reads a bit field in a 16-bit port, performs a bitwise AND followed by a - bitwise inclusive OR, and writes the result back to the bit field in the + bitwise OR, and writes the result back to the bit field in the 16-bit port. Reads the 16-bit PCI configuration register specified by Address, performs a - bitwise AND followed by a bitwise inclusive OR between the read result and + bitwise AND followed by a bitwise OR between the read result and the value specified by AndData, and writes the result to the 16-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -617,6 +659,8 @@ PciBitFieldAnd16 ( If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -682,15 +726,15 @@ UINT32 EFIAPI PciWrite32 ( IN UINTN Address, - IN UINT32 Data + IN UINT32 Value ); /** - Performs a bitwise inclusive OR of a 32-bit PCI configuration register with + Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit value. Reads the 32-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -743,11 +787,11 @@ PciAnd32 ( /** Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit - value, followed a bitwise inclusive OR with another 32-bit value. + value, followed a bitwise OR with another 32-bit value. Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified by AndData, - performs a bitwise inclusive OR between the result of the AND operation and + performs a bitwise OR between the result of the AND operation and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -815,6 +859,7 @@ PciBitFieldRead32 ( If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -840,7 +885,7 @@ PciBitFieldWrite32 ( writes the result back to the bit field in the 32-bit port. Reads the 32-bit PCI configuration register specified by Address, performs a - bitwise inclusive OR between the read result and the value specified by + bitwise OR between the read result and the value specified by OrData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations @@ -851,6 +896,7 @@ PciBitFieldWrite32 ( If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -887,6 +933,7 @@ PciBitFieldOr32 ( If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -909,11 +956,11 @@ PciBitFieldAnd32 ( /** Reads a bit field in a 32-bit port, performs a bitwise AND followed by a - bitwise inclusive OR, and writes the result back to the bit field in the + bitwise OR, and writes the result back to the bit field in the 32-bit port. Reads the 32-bit PCI configuration register specified by Address, performs a - bitwise AND followed by a bitwise inclusive OR between the read result and + bitwise AND followed by a bitwise OR between the read result and the value specified by AndData, and writes the result to the 32-bit PCI configuration register specified by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI @@ -925,6 +972,8 @@ PciBitFieldAnd32 ( If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). + If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). + If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit field. @@ -999,7 +1048,7 @@ PciReadBuffer ( @param Size Size in bytes of the transfer. @param Buffer Pointer to a buffer containing the data to write. - @return Size + @return Size written to StartAddress. **/ UINTN