X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=MdePkg%2FInclude%2FRegister%2FIntel%2FStmResourceDescriptor.h;h=8f29a7c8b705bd5cd191176775b6b4b829abaf4f;hb=2f88bd3a1296c522317f1c21377876de63de5be7;hp=3e426701e83c87b7c212892384cd4dea1a7cde6e;hpb=1436aea4d5707e672672a11bda72be2c63c936c3;p=mirror_edk2.git

diff --git a/MdePkg/Include/Register/Intel/StmResourceDescriptor.h b/MdePkg/Include/Register/Intel/StmResourceDescriptor.h
index 3e426701e8..8f29a7c8b7 100644
--- a/MdePkg/Include/Register/Intel/StmResourceDescriptor.h
+++ b/MdePkg/Include/Register/Intel/StmResourceDescriptor.h
@@ -18,11 +18,11 @@
   STM Resource Descriptor Header
 **/
 typedef struct {
-  UINT32  RscType;
-  UINT16  Length;
-  UINT16  ReturnStatus:1;
-  UINT16  Reserved:14;
-  UINT16  IgnoreResource:1;
+  UINT32    RscType;
+  UINT16    Length;
+  UINT16    ReturnStatus   : 1;
+  UINT16    Reserved       : 14;
+  UINT16    IgnoreResource : 1;
 } STM_RSC_DESC_HEADER;
 
 /**
@@ -45,20 +45,20 @@ typedef struct {
   STM Resource End Descriptor
 **/
 typedef struct {
-  STM_RSC_DESC_HEADER  Hdr;
-  UINT64               ResourceListContinuation;
+  STM_RSC_DESC_HEADER    Hdr;
+  UINT64                 ResourceListContinuation;
 } STM_RSC_END;
 
 /**
   STM Resource Memory Descriptor
 **/
 typedef struct {
-  STM_RSC_DESC_HEADER  Hdr;
-  UINT64               Base;
-  UINT64               Length;
-  UINT32               RWXAttributes:3;
-  UINT32               Reserved:29;
-  UINT32               Reserved_2;
+  STM_RSC_DESC_HEADER    Hdr;
+  UINT64                 Base;
+  UINT64                 Length;
+  UINT32                 RWXAttributes : 3;
+  UINT32                 Reserved      : 29;
+  UINT32                 Reserved_2;
 } STM_RSC_MEM_DESC;
 
 /**
@@ -74,22 +74,22 @@ typedef struct {
   STM Resource I/O Descriptor
 **/
 typedef struct {
-  STM_RSC_DESC_HEADER  Hdr;
-  UINT16               Base;
-  UINT16               Length;
-  UINT32               Reserved;
+  STM_RSC_DESC_HEADER    Hdr;
+  UINT16                 Base;
+  UINT16                 Length;
+  UINT32                 Reserved;
 } STM_RSC_IO_DESC;
 
 /**
   STM Resource MMIO Descriptor
 **/
 typedef struct {
-  STM_RSC_DESC_HEADER  Hdr;
-  UINT64               Base;
-  UINT64               Length;
-  UINT32               RWXAttributes:3;
-  UINT32               Reserved:29;
-  UINT32               Reserved_2;
+  STM_RSC_DESC_HEADER    Hdr;
+  UINT64                 Base;
+  UINT64                 Length;
+  UINT32                 RWXAttributes : 3;
+  UINT32                 Reserved      : 29;
+  UINT32                 Reserved_2;
 } STM_RSC_MMIO_DESC;
 
 /**
@@ -105,12 +105,12 @@ typedef struct {
   STM Resource MSR Descriptor
 **/
 typedef struct {
-  STM_RSC_DESC_HEADER  Hdr;
-  UINT32               MsrIndex;
-  UINT32               KernelModeProcessing:1;
-  UINT32               Reserved:31;
-  UINT64               ReadMask;
-  UINT64               WriteMask;
+  STM_RSC_DESC_HEADER    Hdr;
+  UINT32                 MsrIndex;
+  UINT32                 KernelModeProcessing : 1;
+  UINT32                 Reserved             : 31;
+  UINT64                 ReadMask;
+  UINT64                 WriteMask;
 } STM_RSC_MSR_DESC;
 
 /**
@@ -121,32 +121,32 @@ typedef struct {
   ///
   /// Must be 1, indicating Hardware Device Path
   ///
-  UINT8   Type;
+  UINT8     Type;
   ///
   /// Must be 1, indicating PCI
   ///
-  UINT8   Subtype;
+  UINT8     Subtype;
   ///
   /// sizeof(STM_PCI_DEVICE_PATH_NODE) which is 6
   ///
-  UINT16  Length;
-  UINT8   PciFunction;
-  UINT8   PciDevice;
+  UINT16    Length;
+  UINT8     PciFunction;
+  UINT8     PciDevice;
 } STM_PCI_DEVICE_PATH_NODE;
 
 /**
   STM Resource PCI Configuration Descriptor
 **/
 typedef struct {
-  STM_RSC_DESC_HEADER       Hdr;
-  UINT16                    RWAttributes:2;
-  UINT16                    Reserved:14;
-  UINT16                    Base;
-  UINT16                    Length;
-  UINT8                     OriginatingBusNumber;
-  UINT8                     LastNodeIndex;
-  STM_PCI_DEVICE_PATH_NODE  PciDevicePath[1];
-//STM_PCI_DEVICE_PATH_NODE  PciDevicePath[LastNodeIndex + 1];
+  STM_RSC_DESC_HEADER         Hdr;
+  UINT16                      RWAttributes : 2;
+  UINT16                      Reserved     : 14;
+  UINT16                      Base;
+  UINT16                      Length;
+  UINT8                       OriginatingBusNumber;
+  UINT8                       LastNodeIndex;
+  STM_PCI_DEVICE_PATH_NODE    PciDevicePath[1];
+  // STM_PCI_DEVICE_PATH_NODE  PciDevicePath[LastNodeIndex + 1];
 } STM_RSC_PCI_CFG_DESC;
 
 /**
@@ -161,32 +161,32 @@ typedef struct {
   STM Resource Trapped I/O Descriptor
 **/
 typedef struct {
-  STM_RSC_DESC_HEADER  Hdr;
-  UINT16               Base;
-  UINT16               Length;
-  UINT16               In:1;
-  UINT16               Out:1;
-  UINT16               Api:1;
-  UINT16               Reserved1:13;
-  UINT16               Reserved2;
+  STM_RSC_DESC_HEADER    Hdr;
+  UINT16                 Base;
+  UINT16                 Length;
+  UINT16                 In        : 1;
+  UINT16                 Out       : 1;
+  UINT16                 Api       : 1;
+  UINT16                 Reserved1 : 13;
+  UINT16                 Reserved2;
 } STM_RSC_TRAPPED_IO_DESC;
 
 /**
   STM Resource All Descriptor
 **/
 typedef struct {
-  STM_RSC_DESC_HEADER  Hdr;
+  STM_RSC_DESC_HEADER    Hdr;
 } STM_RSC_ALL_RESOURCES_DESC;
 
 /**
   STM Register Violation Descriptor
 **/
 typedef struct {
-  STM_RSC_DESC_HEADER  Hdr;
-  UINT32               RegisterType;
-  UINT32               Reserved;
-  UINT64               ReadMask;
-  UINT64               WriteMask;
+  STM_RSC_DESC_HEADER    Hdr;
+  UINT32                 RegisterType;
+  UINT32                 Reserved;
+  UINT64                 ReadMask;
+  UINT64                 WriteMask;
 } STM_REGISTER_VIOLATION_DESC;
 
 /**
@@ -205,16 +205,16 @@ typedef enum {
   Union of all STM resource types
 **/
 typedef union {
-  STM_RSC_DESC_HEADER          Header;
-  STM_RSC_END                  End;
-  STM_RSC_MEM_DESC             Mem;
-  STM_RSC_IO_DESC              Io;
-  STM_RSC_MMIO_DESC            Mmio;
-  STM_RSC_MSR_DESC             Msr;
-  STM_RSC_PCI_CFG_DESC         PciCfg;
-  STM_RSC_TRAPPED_IO_DESC      TrappedIo;
-  STM_RSC_ALL_RESOURCES_DESC   All;
-  STM_REGISTER_VIOLATION_DESC  RegisterViolation;
+  STM_RSC_DESC_HEADER            Header;
+  STM_RSC_END                    End;
+  STM_RSC_MEM_DESC               Mem;
+  STM_RSC_IO_DESC                Io;
+  STM_RSC_MMIO_DESC              Mmio;
+  STM_RSC_MSR_DESC               Msr;
+  STM_RSC_PCI_CFG_DESC           PciCfg;
+  STM_RSC_TRAPPED_IO_DESC        TrappedIo;
+  STM_RSC_ALL_RESOURCES_DESC     All;
+  STM_REGISTER_VIOLATION_DESC    RegisterViolation;
 } STM_RSC;
 
 #pragma pack ()