X-Git-Url: https://git.proxmox.com/?a=blobdiff_plain;f=MdePkg%2FLibrary%2FBaseLib%2FBaseLib.inf;h=3a38f2ba1cac3360a27a857d4a5eb58382718f11;hb=77f863ee03d516d61d9af9141a1b63da169128a3;hp=f345fcadceccc63089283a9476660f1c779dca20;hpb=835849540d390a7dceabf8dab387243ca0158f23;p=mirror_edk2.git diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf index f345fcadce..3a38f2ba1c 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -1,7 +1,6 @@ #/** @file -# Component description file for Base Library -# # Base Library implementation. +# # Copyright (c) 2007 - 2008, Intel Corporation. # # All rights reserved. This program and the accompanying materials @@ -21,9 +20,6 @@ MODULE_TYPE = BASE VERSION_STRING = 1.0 LIBRARY_CLASS = BaseLib - EDK_RELEASE_VERSION = 0x00020000 - EFI_SPECIFICATION_VERSION = 0x00020000 - # # VALID_ARCHITECTURES = IA32 X64 IPF EBC @@ -158,6 +154,10 @@ Ia32/CpuId.c | MSFT Ia32/CpuBreakpoint.c | MSFT Ia32/ARShiftU64.c | MSFT + Ia32/Thunk16.asm | MSFT + Ia32/EnablePaging64.asm | MSFT + Ia32/EnableCache.c | MSFT + Ia32/DisableCache.c | MSFT SynchronizationMsc.c | MSFT Ia32/Wbinvd.asm | INTEL @@ -252,11 +252,12 @@ Ia32/CpuId.asm | INTEL Ia32/CpuBreakpoint.asm | INTEL Ia32/ARShiftU64.asm | INTEL + Ia32/Thunk16.asm | INTEL + Ia32/EnablePaging64.asm | INTEL + Ia32/EnableCache.asm | INTEL + Ia32/DisableCache.asm | INTEL Synchronization.c | INTEL - Ia32/Thunk16.asm - Ia32/EnablePaging64.asm - Ia32/Thunk16.S | GCC Ia32/CpuBreakpoint.S | GCC Ia32/CpuPause.S | GCC @@ -351,26 +352,28 @@ Ia32/ARShiftU64.S | GCC Ia32/RShiftU64.S | GCC Ia32/LShiftU64.S | GCC + Ia32/EnableCache.S | GCC + Ia32/DisableCache.S | GCC SynchronizationGcc.c | GCC - Ia32DivS64x64Remainder.c + Ia32/DivS64x64Remainder.c Ia32/InternalSwitchStack.c Ia32/Non-existing.c Unaligned.c - x86WriteIdtr.c - x86WriteGdtr.c - x86Thunk.c - x86ReadIdtr.c - x86ReadGdtr.c - x86Msr.c - x86MemoryFence.c - x86GetInterruptState.c - x86FxSave.c - x86FxRestore.c - x86EnablePaging64.c - x86EnablePaging32.c - x86DisablePaging64.c - x86DisablePaging32.c + X86WriteIdtr.c + X86WriteGdtr.c + X86Thunk.c + X86ReadIdtr.c + X86ReadGdtr.c + X86Msr.c + X86MemoryFence.c + X86GetInterruptState.c + X86FxSave.c + X86FxRestore.c + X86EnablePaging64.c + X86EnablePaging32.c + X86DisablePaging64.c + X86DisablePaging32.c [Sources.X64] X64/Thunk16.asm @@ -450,6 +453,8 @@ X64/SwitchStack.asm X64/InterlockedCompareExchange64.asm X64/InterlockedCompareExchange32.asm + X64/EnableCache.asm + X64/DisableCache.asm X64/InterlockedDecrement.c | MSFT X64/InterlockedIncrement.c | MSFT @@ -468,20 +473,20 @@ X64/Non-existing.c Math64.c Unaligned.c - x86WriteIdtr.c - x86WriteGdtr.c - x86Thunk.c - x86ReadIdtr.c - x86ReadGdtr.c - x86Msr.c - x86MemoryFence.c - x86GetInterruptState.c - x86FxSave.c - x86FxRestore.c - x86EnablePaging64.c - x86EnablePaging32.c - x86DisablePaging64.c - x86DisablePaging32.c + X86WriteIdtr.c + X86WriteGdtr.c + X86Thunk.c + X86ReadIdtr.c + X86ReadGdtr.c + X86Msr.c + X86MemoryFence.c + X86GetInterruptState.c + X86FxSave.c + X86FxRestore.c + X86EnablePaging64.c + X86EnablePaging32.c + X86DisablePaging64.c + X86DisablePaging32.c X64/WriteMsr64.S | GCC X64/WriteMm7.S | GCC X64/WriteMm6.S | GCC @@ -565,6 +570,8 @@ X64/CpuIdEx.S | GCC X64/CpuBreakpoint.S | GCC SynchronizationGcc.c | GCC + X64/EnableCache.S | GCC + X64/DisableCache.S | GCC ChkStkGcc.c | GCC [Sources.IPF] @@ -590,11 +597,14 @@ Ipf/CpuBreakpointMsc.c | MSFT Ipf/Unaligned.c Ipf/SwitchStack.s - Ipf/longjmp.s - Ipf/setjmp.s - Ipf/PalCallStatic.s - Ipf/ia_64gen.h - Ipf/asm.h + Ipf/LongJmp.s + Ipf/SetJmp.s + Ipf/ReadCr.s + Ipf/ReadControlRegister.c + Ipf/ReadAr.s + Ipf/ReadApplicationRegister.c + Ipf/Ia64gen.h + Ipf/Asm.h Math64.c Synchronization.c | INTEL SynchronizationMsc.c | MSFT